a51ab8ddf6
This supports both 0.11 and 0.13 versions of the debug spec. Support for `-rtos riscv` will come in a separate commit since it was easy to separate out, and is likely to be more controversial. Flash support for the SiFive boards will also come in a later commit. Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4578 Tested-by: jenkins Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
35 lines
971 B
INI
35 lines
971 B
INI
adapter_khz 10000
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interface ftdi
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ftdi_device_desc "Dual RS232-HS"
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ftdi_vid_pid 0x0403 0x6010
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ftdi_layout_init 0x0008 0x001b
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ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
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#Reset Stretcher logic on FE310 is ~1 second long
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#This doesn't apply if you use
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# ftdi_set_signal, but still good to document
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#adapter_nsrst_delay 1500
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set _CHIPNAME riscv
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jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
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flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
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init
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#reset -- This type of reset is not implemented yet
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if {[ info exists pulse_srst]} {
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ftdi_set_signal nSRST 0
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ftdi_set_signal nSRST z
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#Wait for the reset stretcher
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#It will work without this, but
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#will incur lots of delays for later commands.
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sleep 1500
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}
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halt
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flash protect 0 64 last off
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