1eae39b40d
This patch introduces RTOS support for uC/OS-III. Currently, only FPU-less ARM Cortex-M targets are supported. Due to the configurability of the RTOS, an OpenOCD-specific file must be linked along with the project to determine the correct offsets within the OS_TCB structure. In addition to the above, a crash was fixed in rtos_get_gdb_reg_list such that RTOS support could be used between resets without restarting OpenOCD and support for the Hg packet was cleaned up. Change-Id: Ide004a689e6b886185df665c00fb644629eb31d1 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3556 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
54 lines
2.3 KiB
C
54 lines
2.3 KiB
C
/***************************************************************************
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* Copyright (C) 2016 by Square, Inc. *
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* Steven Stallion <stallion@squareup.com> *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "rtos.h"
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#include "rtos_standard_stackings.h"
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#include "target/armv7m.h"
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static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
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{ 0x20, 32 }, /* r0 */
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{ 0x24, 32 }, /* r1 */
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{ 0x28, 32 }, /* r2 */
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{ 0x2c, 32 }, /* r3 */
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{ 0x00, 32 }, /* r4 */
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{ 0x04, 32 }, /* r5 */
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{ 0x08, 32 }, /* r6 */
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{ 0x0c, 32 }, /* r7 */
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{ 0x10, 32 }, /* r8 */
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{ 0x14, 32 }, /* r9 */
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{ 0x18, 32 }, /* r10 */
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{ 0x1c, 32 }, /* r11 */
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{ 0x30, 32 }, /* r12 */
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{ -2, 32 }, /* sp */
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{ 0x34, 32 }, /* lr */
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{ 0x38, 32 }, /* pc */
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{ 0x3c, 32 }, /* xPSR */
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};
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const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = {
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0x40, /* stack_registers_size */
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-1, /* stack_growth_direction */
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ARMV7M_NUM_CORE_REGS, /* num_output_registers */
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rtos_generic_stack_align8, /* stack_alignment */
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rtos_uCOS_III_Cortex_M_stack_offsets /* register_offsets */
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};
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