93a3a82e49
This add support to the Xilinx BSCAN_* virtual JTAG interface. This is the Xilinx equivalent of the Altera sld_virtual_jtag interface, it allows a user to connect to the debug unit through the main FPGA JTAG connection. Change-Id: Ia438e910650cff9cbc8f810b719fc1d5de5a8188 Signed-off-by: Sergio Chico <sergio.chico@gmail.com> Reviewed-on: http://openocd.zylin.com/1806 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
45 lines
1.9 KiB
C
45 lines
1.9 KiB
C
/***************************************************************************
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* Copyright (C) 2012 by Franck Jullien *
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* elec4fun@gmail.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifndef _OR1K_TAP_H_
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#define _OR1K_TAP_H_
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <helper/list.h>
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#include "or1k.h"
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int or1k_tap_vjtag_register(void);
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int or1k_tap_xilinx_bscan_register(void);
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int or1k_tap_mohor_register(void);
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/* Linear list over all available or1k taps */
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extern struct list_head tap_list;
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struct or1k_tap_ip {
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struct list_head list;
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int (*init)(struct or1k_jtag *jtag_info);
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const char *name;
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};
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#endif
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