a1bbf4b75b
It depends on the particular target whether it can work with SRST asserted or not, so this belongs to the target config rather than the board config. Also, this allows for simple openocd -f myboard.cfg -c "reset_config connect_assert_srst" command to be used whenever a user feels a need to connect to an unresponsive target. Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2459 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
56 lines
1.3 KiB
INI
56 lines
1.3 KiB
INI
# script for stm32f0x family
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#
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# stm32 devices support SWD transports only.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32f0x
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}
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set _ENDIAN little
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# See STM Document RM0091
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# Section 29.5.3
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set _CPUTAPID 0x0bb11477
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
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# adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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adapter_khz 1000
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adapter_nsrst_delay 100
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reset_config srst_nogate
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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