85 lines
2.9 KiB
Markdown
85 lines
2.9 KiB
Markdown
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# ESP Nano Hosted
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## Introduction
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This project is trying to interface with `esp-hosted` firmware using a MCU-friendly method.
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## SPI Frame Format
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* Each SPI transaction is fixed 1600 bytes
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* Each transaction is prefixed by a 12-byte header, defined as follows:
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```c
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struct esp_payload_header {
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uint8_t if_type:4;
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uint8_t if_num:4;
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uint8_t flags;
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uint16_t len;
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uint16_t offset;
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uint16_t checksum;
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uint16_t seq_num;
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uint8_t reserved2;
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union {
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uint8_t reserved3;
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uint8_t hci_pkt_type;
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uint8_t priv_pkt_type;
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};
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} __attribute__((packed));
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```
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* The `if_type` field is one of the following enum:
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```c
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typedef enum {
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ESP_STA_IF,
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ESP_AP_IF,
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ESP_SERIAL_IF,
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ESP_HCI_IF,
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ESP_PRIV_IF,
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ESP_TEST_IF,
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ESP_MAX_IF,
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} ESP_INTERFACE_TYPE;
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```
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* Control requests and responses are handled through `ESP_SERIAL_IF`, which has the following TLV structure:
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```c
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/*
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* TLV (Type - Length - Value) structure is as follows:
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* --------------------------------------------------------------------------------------------
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* Endpoint Type | Endpoint Length | Endpoint Value | Data Type | Data Length | Data Value |
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* --------------------------------------------------------------------------------------------
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*
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* Bytes used per field as follows:
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* --------------------------------------------------------------------------------------------
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* 1 | 2 | Endpoint length | 1 | 2 | Data length |
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* --------------------------------------------------------------------------------------------
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*/
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/* For type fields: */
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#define PROTO_PSER_TLV_T_EPNAME 0x01
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#define PROTO_PSER_TLV_T_DATA 0x02
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/* Some stupid constraints in the original code expects the length should be same... even they don't have to */
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#define CTRL_EP_NAME_RESP "ctrlResp"
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#define CTRL_EP_NAME_EVENT "ctrlEvnt"
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```
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* The control messages are encapsulated in protobuf, in the data field of the above TLV.
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* For Host-to-ESP messages, the endpoint name `CTRL_EP_NAME_RESP` is used.
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* For ESP-to-Host messages, the endpoint name `CTRL_EP_NAME_EVENT` or `CTRL_EP_NAME_RESP` are used.
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## Issues
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Who owns the buffers? How many buffers should we allocate?
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* Minimize the memory block operations (malloc and free)
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* Control plane and data plane can be async
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* Control API can be blocking until responded
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* At least 2 full-sized buffers are required (for full duplex operations)
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* To re-use the bus while a request is underway, control plane and data plane RX buffers should be copied
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* Bus TX operation should be blocking, however the previous RX data (if any) can be received.
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* The response for the request being transmitted will never arrive within the same transaction
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## License
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Not decided yet, please be patient. At least not before the project is usable.
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