generated from Embedded_Projects/CH32V307_Template
Rewrite startup for D8.
This commit is contained in:
parent
7a78a24a2a
commit
669ca62ee2
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@ -8,366 +8,177 @@
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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.section .init,"ax",@progbits
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.global _start
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.align 1
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.section .vectors,"ax",@progbits
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.global _start
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.align 4
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_start:
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j handle_reset
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00000013
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.word 0x00100073
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.section .vector,"ax",@progbits
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.align 1
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_vector_base:
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.option norvc;
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.word _start
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.word 0
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.word NMI_Handler /* NMI */
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.word HardFault_Handler /* Hard Fault */
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.word 0
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.word Ecall_M_Mode_Handler /* Ecall M Mode */
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.word 0
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.word 0
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.word Ecall_U_Mode_Handler /* Ecall U Mode */
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.word Break_Point_Handler /* Break Point */
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.word 0
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.word 0
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.word SysTick_Handler /* SysTick */
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.word 0
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.word SW_Handler /* SW */
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.word 0
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/* External Interrupts */
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.word WWDG_IRQHandler /* Window Watchdog */
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.word PVD_IRQHandler /* PVD through EXTI Line detect */
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.word TAMPER_IRQHandler /* TAMPER */
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.word RTC_IRQHandler /* RTC */
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.word FLASH_IRQHandler /* Flash */
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.word RCC_IRQHandler /* RCC */
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.word EXTI0_IRQHandler /* EXTI Line 0 */
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.word EXTI1_IRQHandler /* EXTI Line 1 */
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.word EXTI2_IRQHandler /* EXTI Line 2 */
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.word EXTI3_IRQHandler /* EXTI Line 3 */
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.word EXTI4_IRQHandler /* EXTI Line 4 */
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.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
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.word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
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.word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
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.word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
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.word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
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.word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
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.word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
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.word ADC1_2_IRQHandler /* ADC1_2 */
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.word USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */
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.word USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* CAN1 SCE */
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.word EXTI9_5_IRQHandler /* EXTI Line 9..5 */
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.word TIM1_BRK_IRQHandler /* TIM1 Break */
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.word TIM1_UP_IRQHandler /* TIM1 Update */
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.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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.word TIM4_IRQHandler /* TIM4 */
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.word I2C1_EV_IRQHandler /* I2C1 Event */
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.word I2C1_ER_IRQHandler /* I2C1 Error */
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.word I2C2_EV_IRQHandler /* I2C2 Event */
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.word I2C2_ER_IRQHandler /* I2C2 Error */
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.word SPI1_IRQHandler /* SPI1 */
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.word SPI2_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word USART3_IRQHandler /* USART3 */
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.word EXTI15_10_IRQHandler /* EXTI Line 15..10 */
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.word RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */
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.word 0
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.word TIM8_BRK_IRQHandler /* TIM8 Break */
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.word TIM8_UP_IRQHandler /* TIM8 Update */
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.word TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */
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.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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.word RNG_IRQHandler /* RNG */
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.word FSMC_IRQHandler /* FSMC */
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.word SDIO_IRQHandler /* SDIO */
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.word TIM5_IRQHandler /* TIM5 */
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.word SPI3_IRQHandler /* SPI3 */
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.word UART4_IRQHandler /* UART4 */
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.word UART5_IRQHandler /* UART5 */
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.word TIM6_IRQHandler /* TIM6 */
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.word TIM7_IRQHandler /* TIM7 */
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.word DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
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.word DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
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.word DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
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.word DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
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.word DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word OTG_FS_IRQHandler /* OTGFS */
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.word 0
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.word 0
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.word 0
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.word UART6_IRQHandler /* UART6 */
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.word UART7_IRQHandler /* UART7 */
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.word UART8_IRQHandler /* UART8 */
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.word TIM9_BRK_IRQHandler /* TIM9 Break */
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.word TIM9_UP_IRQHandler /* TIM9 Update */
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.word TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */
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.word TIM9_CC_IRQHandler /* TIM9 Capture Compare */
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.word TIM10_BRK_IRQHandler /* TIM10 Break */
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.word TIM10_UP_IRQHandler /* TIM10 Update */
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.word TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */
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.word TIM10_CC_IRQHandler /* TIM10 Capture Compare */
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.word DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
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.word DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
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.word DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */
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.word DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */
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.word DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */
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.word DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */
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j Reset_Handler /* Go! */
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.option rvc;
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.align 8
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.option push
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.option norvc
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_vectors:
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.word Fault_Handler /* 0: Exception */
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.word Default_Handler /* 1: Reserved */
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.word NMI_Handler /* 2: NMI */
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.word Default_Handler /* 3: Reserved */
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.word Default_Handler /* 4: Reserved */
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.word Ecall_M_Handler /* 5: M mode Ecall */
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.word Default_Handler /* 6: Reserved */
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.word Default_Handler /* 7: Reserved */
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.word Ecall_U_Handler /* 8: U mode Ecall */
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.word Default_Handler /* 9: Reserved */
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.word Default_Handler /* 10: Reserved */
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.word Default_Handler /* 11: Reserved */
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.word SysTick_Handler /* 12: SysTick */
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.word Default_Handler /* 13: Reserved */
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.word SW_Handler /* 14: Software */
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.word Default_Handler /* 15: Reserved */
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.word WWDG_IRQHandler /* 16: Window Watchdog */
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.word PVD_IRQHandler /* 17: PVD through EXTI Line detect */
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.word TAMPER_IRQHandler /* 18: TAMPER */
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.word RTC_IRQHandler /* 19: RTC */
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.word FLASH_IRQHandler /* 20: Flash */
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.word RCC_IRQHandler /* 21: RCC */
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.word EXTI0_IRQHandler /* 22: EXTI Line 0 */
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.word EXTI1_IRQHandler /* 23: EXTI Line 1 */
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.word EXTI2_IRQHandler /* 24: EXTI Line 2 */
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.word EXTI3_IRQHandler /* 25: EXTI Line 3 */
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.word EXTI4_IRQHandler /* 26: EXTI Line 4 */
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.word DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */
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.word DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */
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.word DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */
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.word DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */
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.word DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */
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.word DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */
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.word DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */
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.word ADC1_2_IRQHandler /* 34: ADC1_2 */
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.word USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */
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.word USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */
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.word CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* 38: CAN1 SCE */
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.word EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */
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.word TIM1_BRK_IRQHandler /* 40: TIM1 Break */
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.word TIM1_UP_IRQHandler /* 41: TIM1 Update */
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.word TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */
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.word TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */
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.word TIM2_IRQHandler /* 44: TIM2 */
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.word TIM3_IRQHandler /* 45: TIM3 */
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.word TIM4_IRQHandler /* 46: TIM4 */
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.word I2C1_EV_IRQHandler /* 47: I2C1 Event */
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.word I2C1_ER_IRQHandler /* 48: I2C1 Error */
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.word I2C2_EV_IRQHandler /* 49: I2C2 Event */
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.word I2C2_ER_IRQHandler /* 50: I2C2 Error */
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.word SPI1_IRQHandler /* 51: SPI1 */
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.word SPI2_IRQHandler /* 52: SPI2 */
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.word USART1_IRQHandler /* 53: USART1 */
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.word USART2_IRQHandler /* 54: USART2 */
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.word USART3_IRQHandler /* 55: USART3 */
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.word EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */
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.word RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */
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.word Default_Handler /* 58: Reserved */
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.word TIM8_BRK_IRQHandler /* 59: TIM8 Break */
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.word TIM8_UP_IRQHandler /* 60: TIM8 Update */
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.word TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */
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.word TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */
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.word RNG_IRQHandler /* 63: RNG */
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.word FSMC_IRQHandler /* 64: FSMC */
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.word SDIO_IRQHandler /* 65: SDIO */
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.word TIM5_IRQHandler /* 66: TIM5 */
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.word SPI3_IRQHandler /* 67: SPI3 */
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.word UART4_IRQHandler /* 68: UART4 */
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.word UART5_IRQHandler /* 69: UART5 */
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.word TIM6_IRQHandler /* 70: TIM6 */
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.word TIM7_IRQHandler /* 71: TIM7 */
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.word DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */
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.word DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */
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.word DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */
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.word DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */
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.word DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */
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.word Default_Handler /* 77: Reserved */
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.word Default_Handler /* 78: Reserved */
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.word Default_Handler /* 79: Reserved */
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.word Default_Handler /* 80: Reserved */
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.word Default_Handler /* 81: Reserved */
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.word Default_Handler /* 82: Reserved */
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.word OTG_FS_IRQHandler /* 83: OTGFS */
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.word Default_Handler /* 84: Reserved */
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.word Default_Handler /* 85: Reserved */
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.word Default_Handler /* 86: Reserved */
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.word UART6_IRQHandler /* 87: UART6 */
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.word UART7_IRQHandler /* 88: UART7 */
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.word UART8_IRQHandler /* 89: UART8 */
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.word TIM9_BRK_IRQHandler /* 90: TIM9 Break */
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.word TIM9_UP_IRQHandler /* 91: TIM9 Update */
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.word TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */
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.word TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */
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.word TIM10_BRK_IRQHandler /* 94: TIM10 Break */
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.word TIM10_UP_IRQHandler /* 95: TIM10 Update */
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.word TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */
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.word TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */
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.word DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */
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.word DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */
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.word DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */
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.word DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */
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.word DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */
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.word DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */
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.option pop
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.section .text.vector_handler, "ax", @progbits
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.weak NMI_Handler /* NMI */
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.weak HardFault_Handler /* Hard Fault */
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.weak Ecall_M_Mode_Handler /* Ecall M Mode */
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.weak Ecall_U_Mode_Handler /* Ecall U Mode */
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.weak Break_Point_Handler /* Break Point */
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.weak SysTick_Handler /* SysTick */
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.weak SW_Handler /* SW */
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.weak WWDG_IRQHandler /* Window Watchdog */
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.weak PVD_IRQHandler /* PVD through EXTI Line detect */
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.weak TAMPER_IRQHandler /* TAMPER */
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.weak RTC_IRQHandler /* RTC */
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.weak FLASH_IRQHandler /* Flash */
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.weak RCC_IRQHandler /* RCC */
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.weak EXTI0_IRQHandler /* EXTI Line 0 */
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.weak EXTI1_IRQHandler /* EXTI Line 1 */
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.weak EXTI2_IRQHandler /* EXTI Line 2 */
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.weak EXTI3_IRQHandler /* EXTI Line 3 */
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.weak EXTI4_IRQHandler /* EXTI Line 4 */
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.weak DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
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.weak DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */
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.weak DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */
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.weak DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */
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.weak DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */
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.weak DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */
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.weak DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */
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.weak ADC1_2_IRQHandler /* ADC1_2 */
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.weak USB_HP_CAN1_TX_IRQHandler /* USB HP and CAN1 TX */
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.weak USB_LP_CAN1_RX0_IRQHandler /* USB LP and CAN1RX0 */
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.weak CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.weak CAN1_SCE_IRQHandler /* CAN1 SCE */
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.weak EXTI9_5_IRQHandler /* EXTI Line 9..5 */
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.weak TIM1_BRK_IRQHandler /* TIM1 Break */
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.weak TIM1_UP_IRQHandler /* TIM1 Update */
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.weak TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */
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.weak TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.weak TIM2_IRQHandler /* TIM2 */
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.weak TIM3_IRQHandler /* TIM3 */
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.weak TIM4_IRQHandler /* TIM4 */
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.weak I2C1_EV_IRQHandler /* I2C1 Event */
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.weak I2C1_ER_IRQHandler /* I2C1 Error */
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.weak I2C2_EV_IRQHandler /* I2C2 Event */
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.weak I2C2_ER_IRQHandler /* I2C2 Error */
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.weak SPI1_IRQHandler /* SPI1 */
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.weak SPI2_IRQHandler /* SPI2 */
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.weak USART1_IRQHandler /* USART1 */
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.weak USART2_IRQHandler /* USART2 */
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.weak USART3_IRQHandler /* USART3 */
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.weak EXTI15_10_IRQHandler /* EXTI Line 15..10 */
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.weak RTCAlarm_IRQHandler /* RTC Alarm through EXTI Line */
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.weak TIM8_BRK_IRQHandler /* TIM8 Break */
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.weak TIM8_UP_IRQHandler /* TIM8 Update */
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.weak TIM8_TRG_COM_IRQHandler /* TIM8 Trigger and Commutation */
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.weak TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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.weak RNG_IRQHandler /* RNG */
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.weak FSMC_IRQHandler /* FSMC */
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.weak SDIO_IRQHandler /* SDIO */
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.weak TIM5_IRQHandler /* TIM5 */
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.weak SPI3_IRQHandler /* SPI3 */
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.weak UART4_IRQHandler /* UART4 */
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.weak UART5_IRQHandler /* UART5 */
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.weak TIM6_IRQHandler /* TIM6 */
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.weak TIM7_IRQHandler /* TIM7 */
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.weak DMA2_Channel1_IRQHandler /* DMA2 Channel 1 */
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.weak DMA2_Channel2_IRQHandler /* DMA2 Channel 2 */
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.weak DMA2_Channel3_IRQHandler /* DMA2 Channel 3 */
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.weak DMA2_Channel4_IRQHandler /* DMA2 Channel 4 */
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.weak DMA2_Channel5_IRQHandler /* DMA2 Channel 5 */
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.weak OTG_FS_IRQHandler /* OTGFS */
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.weak UART6_IRQHandler /* UART6 */
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.weak UART7_IRQHandler /* UART7 */
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.weak UART8_IRQHandler /* UART8 */
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.weak TIM9_BRK_IRQHandler /* TIM9 Break */
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.weak TIM9_UP_IRQHandler /* TIM9 Update */
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.weak TIM9_TRG_COM_IRQHandler /* TIM9 Trigger and Commutation */
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.weak TIM9_CC_IRQHandler /* TIM9 Capture Compare */
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.weak TIM10_BRK_IRQHandler /* TIM10 Break */
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.weak TIM10_UP_IRQHandler /* TIM10 Update */
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.weak TIM10_TRG_COM_IRQHandler /* TIM10 Trigger and Commutation */
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.weak TIM10_CC_IRQHandler /* TIM10 Capture Compare */
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.weak DMA2_Channel6_IRQHandler /* DMA2 Channel 6 */
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.weak DMA2_Channel7_IRQHandler /* DMA2 Channel 7 */
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.weak DMA2_Channel8_IRQHandler /* DMA2 Channel 8 */
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.weak DMA2_Channel9_IRQHandler /* DMA2 Channel 9 */
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.weak DMA2_Channel10_IRQHandler /* DMA2 Channel 10 */
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.weak DMA2_Channel11_IRQHandler /* DMA2 Channel 11 */
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.section .text,"ax",@progbits
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Reset_Handler:
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NMI_Handler: 1: j 1b
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HardFault_Handler: 1: j 1b
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Ecall_M_Mode_Handler: 1: j 1b
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Ecall_U_Mode_Handler: 1: j 1b
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Break_Point_Handler: 1: j 1b
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SysTick_Handler: 1: j 1b
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SW_Handler: 1: j 1b
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WWDG_IRQHandler: 1: j 1b
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PVD_IRQHandler: 1: j 1b
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TAMPER_IRQHandler: 1: j 1b
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RTC_IRQHandler: 1: j 1b
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FLASH_IRQHandler: 1: j 1b
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RCC_IRQHandler: 1: j 1b
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EXTI0_IRQHandler: 1: j 1b
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EXTI1_IRQHandler: 1: j 1b
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EXTI2_IRQHandler: 1: j 1b
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EXTI3_IRQHandler: 1: j 1b
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EXTI4_IRQHandler: 1: j 1b
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DMA1_Channel1_IRQHandler: 1: j 1b
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DMA1_Channel2_IRQHandler: 1: j 1b
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DMA1_Channel3_IRQHandler: 1: j 1b
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DMA1_Channel4_IRQHandler: 1: j 1b
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DMA1_Channel5_IRQHandler: 1: j 1b
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DMA1_Channel6_IRQHandler: 1: j 1b
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DMA1_Channel7_IRQHandler: 1: j 1b
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ADC1_2_IRQHandler: 1: j 1b
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USB_HP_CAN1_TX_IRQHandler: 1: j 1b
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USB_LP_CAN1_RX0_IRQHandler: 1: j 1b
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CAN1_RX1_IRQHandler: 1: j 1b
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CAN1_SCE_IRQHandler: 1: j 1b
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EXTI9_5_IRQHandler: 1: j 1b
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TIM1_BRK_IRQHandler: 1: j 1b
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TIM1_UP_IRQHandler: 1: j 1b
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TIM1_TRG_COM_IRQHandler: 1: j 1b
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TIM1_CC_IRQHandler: 1: j 1b
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TIM2_IRQHandler: 1: j 1b
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TIM3_IRQHandler: 1: j 1b
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TIM4_IRQHandler: 1: j 1b
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I2C1_EV_IRQHandler: 1: j 1b
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I2C1_ER_IRQHandler: 1: j 1b
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I2C2_EV_IRQHandler: 1: j 1b
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I2C2_ER_IRQHandler: 1: j 1b
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SPI1_IRQHandler: 1: j 1b
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SPI2_IRQHandler: 1: j 1b
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USART1_IRQHandler: 1: j 1b
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USART2_IRQHandler: 1: j 1b
|
||||
USART3_IRQHandler: 1: j 1b
|
||||
EXTI15_10_IRQHandler: 1: j 1b
|
||||
RTCAlarm_IRQHandler: 1: j 1b
|
||||
TIM8_BRK_IRQHandler: 1: j 1b
|
||||
TIM8_UP_IRQHandler: 1: j 1b
|
||||
TIM8_TRG_COM_IRQHandler: 1: j 1b
|
||||
TIM8_CC_IRQHandler: 1: j 1b
|
||||
RNG_IRQHandler: 1: j 1b
|
||||
FSMC_IRQHandler: 1: j 1b
|
||||
SDIO_IRQHandler: 1: j 1b
|
||||
TIM5_IRQHandler: 1: j 1b
|
||||
SPI3_IRQHandler: 1: j 1b
|
||||
UART4_IRQHandler: 1: j 1b
|
||||
UART5_IRQHandler: 1: j 1b
|
||||
TIM6_IRQHandler: 1: j 1b
|
||||
TIM7_IRQHandler: 1: j 1b
|
||||
DMA2_Channel1_IRQHandler: 1: j 1b
|
||||
DMA2_Channel2_IRQHandler: 1: j 1b
|
||||
DMA2_Channel3_IRQHandler: 1: j 1b
|
||||
DMA2_Channel4_IRQHandler: 1: j 1b
|
||||
DMA2_Channel5_IRQHandler: 1: j 1b
|
||||
OTG_FS_IRQHandler: 1: j 1b
|
||||
UART6_IRQHandler: 1: j 1b
|
||||
UART7_IRQHandler: 1: j 1b
|
||||
UART8_IRQHandler: 1: j 1b
|
||||
TIM9_BRK_IRQHandler: 1: j 1b
|
||||
TIM9_UP_IRQHandler: 1: j 1b
|
||||
TIM9_TRG_COM_IRQHandler: 1: j 1b
|
||||
TIM9_CC_IRQHandler: 1: j 1b
|
||||
TIM10_BRK_IRQHandler: 1: j 1b
|
||||
TIM10_UP_IRQHandler: 1: j 1b
|
||||
TIM10_TRG_COM_IRQHandler: 1: j 1b
|
||||
TIM10_CC_IRQHandler: 1: j 1b
|
||||
DMA2_Channel6_IRQHandler: 1: j 1b
|
||||
DMA2_Channel7_IRQHandler: 1: j 1b
|
||||
DMA2_Channel8_IRQHandler: 1: j 1b
|
||||
DMA2_Channel9_IRQHandler: 1: j 1b
|
||||
DMA2_Channel10_IRQHandler: 1: j 1b
|
||||
DMA2_Channel11_IRQHandler: 1: j 1b
|
||||
.option push
|
||||
.option norelax
|
||||
la gp, __global_pointer$
|
||||
.option pop
|
||||
|
||||
la sp, _eusrstack
|
||||
copy_data:
|
||||
/* Load data section from flash to RAM */
|
||||
la a0, _sidata
|
||||
la a1, _sdata
|
||||
la a2, _edata
|
||||
bgeu a1, a2, clear_bss
|
||||
|
||||
.section .text.handle_reset,"ax",@progbits
|
||||
.weak handle_reset
|
||||
.align 1
|
||||
handle_reset:
|
||||
.option push
|
||||
.option norelax
|
||||
la gp, __global_pointer$
|
||||
.option pop
|
||||
1:
|
||||
la sp, _eusrstack
|
||||
2:
|
||||
/* Load data section from flash to RAM */
|
||||
la a0, _data_lma
|
||||
la a1, _data_vma
|
||||
la a2, _edata
|
||||
bgeu a1, a2, 2f
|
||||
1:
|
||||
lw t0, (a0)
|
||||
sw t0, (a1)
|
||||
addi a0, a0, 4
|
||||
addi a1, a1, 4
|
||||
bltu a1, a2, 1b
|
||||
2:
|
||||
/* Clear bss section */
|
||||
la a0, _sbss
|
||||
la a1, _ebss
|
||||
bgeu a0, a1, 2f
|
||||
1:
|
||||
sw zero, (a0)
|
||||
addi a0, a0, 4
|
||||
bltu a0, a1, 1b
|
||||
2:
|
||||
loop_copy_data:
|
||||
lw t0, (a0)
|
||||
sw t0, (a1)
|
||||
addi a0, a0, 4
|
||||
addi a1, a1, 4
|
||||
bltu a1, a2, loop_copy_data
|
||||
|
||||
clear_bss:
|
||||
/* Clear bss section */
|
||||
la a0, _sbss
|
||||
la a1, _ebss
|
||||
bgeu a0, a1, setup_interrupts
|
||||
loop_clear_bss:
|
||||
sw zero, (a0)
|
||||
addi a0, a0, 4
|
||||
bltu a0, a1, loop_clear_bss
|
||||
|
||||
setup_interrupts:
|
||||
li t0, 0x1f
|
||||
csrw 0xbc0, t0
|
||||
|
||||
/* Enable nested and hardware stack */
|
||||
/* li t0, 0x1f */ /* For MRS proprietary GCC compilers */
|
||||
/* li t0, 0x1f */ /* For MRS proprietary GCC compilers */
|
||||
|
||||
/* Enable nested interrupt, disable hardware stack */
|
||||
li t0, 0x1e /* Refer to RISC-V4 PFIC manual */
|
||||
|
||||
csrw 0x804, t0
|
||||
|
||||
/* Enable floating point and interrupt */
|
||||
li t0, 0x6088
|
||||
csrs mstatus, t0
|
||||
|
||||
la t0, _vector_base
|
||||
ori t0, t0, 3
|
||||
csrw mtvec, t0
|
||||
|
||||
jal SystemInit
|
||||
la t0, main
|
||||
csrw mepc, t0
|
||||
mret
|
||||
csrw 0x804, t0
|
||||
|
||||
/* FS: Initial, MPP: M mode, MPIE: EN, MIE: EN */
|
||||
li t0, 0x3888
|
||||
csrs mstatus, t0
|
||||
|
||||
la t0, _vectors
|
||||
ori t0, t0, 3 /* PFIC exception handling */
|
||||
csrw mtvec, t0
|
||||
|
||||
jal SystemInit
|
||||
jal main
|
||||
|
||||
dead_loop:
|
||||
j dead_loop
|
||||
|
|
Loading…
Reference in New Issue