Initial commit.
Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
commit
3f1f3aaf8b
GPG Key ID:
DB982239424FF8AC
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@ -0,0 +1,12 @@
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BasedOnStyle: Google
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IndentWidth: 4
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AlignConsecutiveMacros: Consecutive
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AlignConsecutiveDeclarations: Consecutive
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||||
AlignConsecutiveAssignments: Consecutive
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||||
AllowShortFunctionsOnASingleLine: None
|
||||
BreakBeforeBraces: Custom
|
||||
BraceWrapping:
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||||
AfterEnum: false
|
||||
AfterStruct: false
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SplitEmptyFunction: false
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ColumnLimit: 120
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@ -0,0 +1,5 @@
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/cmake-build-*
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/build
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/board/*.bak
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/.vscode
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@ -0,0 +1,3 @@
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[submodule "SDK"]
|
||||
path = SDK
|
||||
url = https://git.minori.work/Embedded_SDK/MCUXpresso_MCXN947.git
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||||
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@ -0,0 +1,208 @@
|
|||
CMAKE_MINIMUM_REQUIRED(VERSION 3.10)
|
||||
|
||||
project(mcxn947_template)
|
||||
|
||||
# ENABLE ASM
|
||||
ENABLE_LANGUAGE(ASM)
|
||||
|
||||
# Linker scripts
|
||||
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/MCXN947/gcc/MCXN947_cm33_core0_flash.ld")
|
||||
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/MCXN947/gcc/MCXN947_cm33_core0_ram.ld")
|
||||
|
||||
# Sources
|
||||
set(TARGET_C_SOURCES
|
||||
"SDK/components/serial_manager/fsl_component_serial_manager.c"
|
||||
"SDK/components/serial_manager/fsl_component_serial_port_uart.c"
|
||||
"SDK/components/uart/fsl_adapter_lpuart.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_cache.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_cache_lpcac.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_cdog.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_clock.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_cmc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_common.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_common_arm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_crc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_ctimer.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_dac.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_dac14.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_edma_soc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_eim.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_enc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_enet.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_erm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_evtg.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_ewm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexcan.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_i2c_master.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_mculcd.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_mculcd_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_spi.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_spi_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_uart.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexio_uart_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexspi.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_flexspi_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_freqme.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_gpio.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_i3c.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_inputmux.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_intm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_irtc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_itrc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpadc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpcmp.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpflexcomm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpi2c.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpi2c_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpspi.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpspi_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lptmr.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpuart.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_lpuart_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_mrt.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_opamp.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_ostimer.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_pdm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_pdm_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_pint.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_plu.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_power.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_basic.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_cmsis.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_data.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_filter.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_math.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_matrix.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_powerquad_transform.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_puf_v3.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_pwm.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_reset.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_sai.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_sai_edma.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_sctimer.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_smartcard_emvsim.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_smartcard_phy_emvsim.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_spc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_tsi_v6.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_usdhc.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_utick.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_vbat.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_vref.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_wuu.c"
|
||||
"SDK/devices/MCXN947/drivers/fsl_wwdt.c"
|
||||
"SDK/devices/MCXN947/drivers/romapi/flash/src/fsl_flash.c"
|
||||
"SDK/devices/MCXN947/drivers/romapi/mem_interface/src/fsl_mem_interface.c"
|
||||
"SDK/devices/MCXN947/drivers/romapi/runbootloader/src/fsl_runbootloader.c"
|
||||
"SDK/devices/MCXN947/gcc/startup_MCXN947_cm33_core0.S"
|
||||
"SDK/devices/MCXN947/system_MCXN947_cm33_core0.c"
|
||||
"SDK/devices/MCXN947/utilities/debug_console/fsl_debug_console.c"
|
||||
"SDK/devices/MCXN947/utilities/str/fsl_str.c"
|
||||
"board/board.c"
|
||||
"board/clock_config.c"
|
||||
"board/pin_mux.c"
|
||||
"src/main.c"
|
||||
)
|
||||
|
||||
# Include directories (private, excl. SDK)
|
||||
set(TARGET_INCLUDE_DIRS
|
||||
"SDK/CMSIS/Core/Include"
|
||||
"SDK/CMSIS/DSP/Include"
|
||||
"SDK/components/serial_manager"
|
||||
"SDK/components/uart"
|
||||
"SDK/devices/MCXN947"
|
||||
"SDK/devices/MCXN947/drivers"
|
||||
"SDK/devices/MCXN947/drivers/romapi/flash"
|
||||
"SDK/devices/MCXN947/drivers/romapi/mem_interface"
|
||||
"SDK/devices/MCXN947/drivers/romapi/nboot"
|
||||
"SDK/devices/MCXN947/drivers/romapi/runbootloader"
|
||||
"SDK/devices/MCXN947/utilities/debug_console"
|
||||
"SDK/devices/MCXN947/utilities/str"
|
||||
"board"
|
||||
"include"
|
||||
)
|
||||
|
||||
set(TARGET_DEFINITIONS
|
||||
"CPU_MCXN947VDF_cm33_core0"
|
||||
"FFR_INCLUDE=\"fsl_iap_ffr.h\""
|
||||
"MCUXPRESSO_SDK"
|
||||
"SDK_DEBUGCONSOLE=1"
|
||||
"SERIAL_PORT_TYPE_UART=1"
|
||||
)
|
||||
|
||||
set(TARGET_LIBRARY_DIRS
|
||||
"SDK/devices/MCXN947/gcc"
|
||||
)
|
||||
|
||||
set(TARGET_LIBRARIES
|
||||
"c"
|
||||
"m"
|
||||
"nosys"
|
||||
)
|
||||
|
||||
# Flags for debug
|
||||
set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -g -O0")
|
||||
set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -g -O0")
|
||||
set(CMAKE_EXE_LINKER_FLAGS_DEBUG "")
|
||||
|
||||
# Flags for release
|
||||
set(CMAKE_C_FLAGS_RELEASE "-DNDEBUG -flto -O2")
|
||||
set(CMAKE_CXX_FLAGS_RELEASE "-DNDEBUG -flto -O2")
|
||||
set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
|
||||
|
||||
# Final flags
|
||||
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fno-common -ffunction-sections -fdata-sections -ffreestanding -fno-builtin")
|
||||
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -ffunction-sections -fdata-sections -ffreestanding -fno-builtin")
|
||||
set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -xassembler-with-cpp")
|
||||
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
|
||||
|
||||
# Add subdirectories here.
|
||||
|
||||
# Main targets
|
||||
# Common definitions and include directories are added here,
|
||||
# to prevent subdirectory from including them.
|
||||
include_directories(${TARGET_INCLUDE_DIRS})
|
||||
add_compile_definitions(${TARGET_DEFINITIONS})
|
||||
link_directories(${TARGET_LIBRARY_DIRS})
|
||||
link_libraries(${TARGET_LIBRARIES})
|
||||
|
||||
# Link to FLASH
|
||||
add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_C_SOURCES})
|
||||
target_link_options(${CMAKE_PROJECT_NAME}_FLASH.elf
|
||||
PRIVATE -T${TARGET_LDSCRIPT_FLASH}
|
||||
PRIVATE -Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map
|
||||
)
|
||||
set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
|
||||
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
|
||||
)
|
||||
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
|
||||
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
|
||||
DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
)
|
||||
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
|
||||
if(DEFINED TARGET_TOOLCHAIN_SIZE)
|
||||
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
|
||||
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
|
||||
)
|
||||
endif()
|
||||
|
||||
# Link to RAM
|
||||
add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_C_SOURCES})
|
||||
target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
PRIVATE -T${TARGET_LDSCRIPT_RAM}
|
||||
PRIVATE -Wl,--Map=${CMAKE_PROJECT_NAME}_RAM.map
|
||||
)
|
||||
set_property(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" APPEND
|
||||
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_RAM.map"
|
||||
)
|
||||
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
|
||||
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_RAM.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
|
||||
DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
)
|
||||
add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")
|
||||
if(DEFINED TARGET_TOOLCHAIN_SIZE)
|
||||
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" POST_BUILD
|
||||
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_RAM.elf"
|
||||
)
|
||||
endif()
|
||||
File diff suppressed because it is too large
Load Diff
|
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@ -0,0 +1 @@
|
|||
Subproject commit 177673b3dce8e8385c325a12cea9abd438ad360b
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
# Poor old Windows...
|
||||
if(WIN32)
|
||||
set(CMAKE_SYSTEM_NAME "Generic")
|
||||
endif()
|
||||
|
||||
set(CMAKE_C_COMPILER arm-none-eabi-gcc)
|
||||
set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
|
||||
|
||||
# Optionally set size binary name, for elf section size reporting.
|
||||
set(TARGET_TOOLCHAIN_SIZE arm-none-eabi-size)
|
||||
|
||||
set(CMAKE_C_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard")
|
||||
set(CMAKE_CXX_FLAGS_INIT "-mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard")
|
||||
set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nano.specs -specs=nosys.specs -Wl,--print-memory-usage -Wl,--no-warn-rwx-segments")
|
||||
|
||||
# Make CMake happy about those compilers
|
||||
set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")
|
||||
|
|
@ -0,0 +1,245 @@
|
|||
/*
|
||||
* Copyright 2022 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_debug_console.h"
|
||||
#include "board.h"
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
#include "fsl_lpi2c.h"
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
#if defined(LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER) && LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER
|
||||
#include "fsl_lpflexcomm.h"
|
||||
#endif /* LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER */
|
||||
#include "fsl_spc.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
/* Initialize debug console. */
|
||||
void BOARD_InitDebugConsole(void)
|
||||
{
|
||||
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
|
||||
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
|
||||
|
||||
RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
|
||||
|
||||
uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
|
||||
|
||||
#if defined(LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER) && LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER
|
||||
LP_FLEXCOMM_Init(BOARD_DEBUG_UART_INSTANCE, LP_FLEXCOMM_PERIPH_LPUART);
|
||||
#endif /* LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER */
|
||||
|
||||
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
|
||||
}
|
||||
|
||||
void BOARD_InitDebugConsole_Core1(void)
|
||||
{
|
||||
/* attach 12 MHz clock to FLEXCOMM1 (debug console) */
|
||||
// CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
|
||||
|
||||
RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
|
||||
|
||||
uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
|
||||
|
||||
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
|
||||
uartClkSrcFreq);
|
||||
}
|
||||
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz)
|
||||
{
|
||||
lpi2c_master_config_t lpi2cConfig = {0};
|
||||
|
||||
/*
|
||||
* lpi2cConfig.debugEnable = false;
|
||||
* lpi2cConfig.ignoreAck = false;
|
||||
* lpi2cConfig.pinConfig = kLPI2C_2PinOpenDrain;
|
||||
* lpi2cConfig.baudRate_Hz = 100000U;
|
||||
* lpi2cConfig.busIdleTimeout_ns = 0;
|
||||
* lpi2cConfig.pinLowTimeout_ns = 0;
|
||||
* lpi2cConfig.sdaGlitchFilterWidth_ns = 0;
|
||||
* lpi2cConfig.sclGlitchFilterWidth_ns = 0;
|
||||
*/
|
||||
LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
|
||||
LPI2C_MasterInit(base, &lpi2cConfig, clkSrc_Hz);
|
||||
}
|
||||
|
||||
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subAddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize)
|
||||
{
|
||||
lpi2c_master_transfer_t xfer;
|
||||
|
||||
xfer.flags = kLPI2C_TransferDefaultFlag;
|
||||
xfer.slaveAddress = deviceAddress;
|
||||
xfer.direction = kLPI2C_Write;
|
||||
xfer.subaddress = subAddress;
|
||||
xfer.subaddressSize = subAddressSize;
|
||||
xfer.data = txBuff;
|
||||
xfer.dataSize = txBuffSize;
|
||||
|
||||
return LPI2C_MasterTransferBlocking(base, &xfer);
|
||||
}
|
||||
|
||||
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subAddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize)
|
||||
{
|
||||
lpi2c_master_transfer_t xfer;
|
||||
|
||||
xfer.flags = kLPI2C_TransferDefaultFlag;
|
||||
xfer.slaveAddress = deviceAddress;
|
||||
xfer.direction = kLPI2C_Read;
|
||||
xfer.subaddress = subAddress;
|
||||
xfer.subaddressSize = subAddressSize;
|
||||
xfer.data = rxBuff;
|
||||
xfer.dataSize = rxBuffSize;
|
||||
|
||||
return LPI2C_MasterTransferBlocking(base, &xfer);
|
||||
}
|
||||
|
||||
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subAddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Send(base, deviceAddress, subAddress, subAddressSize, txBuff, txBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subAddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize)
|
||||
{
|
||||
status_t status;
|
||||
lpi2c_master_transfer_t xfer;
|
||||
|
||||
xfer.flags = kLPI2C_TransferDefaultFlag;
|
||||
xfer.slaveAddress = deviceAddress;
|
||||
xfer.direction = kLPI2C_Write;
|
||||
xfer.subaddress = subAddress;
|
||||
xfer.subaddressSize = subAddressSize;
|
||||
xfer.data = NULL;
|
||||
xfer.dataSize = 0;
|
||||
|
||||
status = LPI2C_MasterTransferBlocking(base, &xfer);
|
||||
|
||||
if (kStatus_Success == status)
|
||||
{
|
||||
xfer.subaddressSize = 0;
|
||||
xfer.direction = kLPI2C_Read;
|
||||
xfer.data = rxBuff;
|
||||
xfer.dataSize = rxBuffSize;
|
||||
|
||||
status = LPI2C_MasterTransferBlocking(base, &xfer);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
void BOARD_Accel_I2C_Init(void)
|
||||
{
|
||||
BOARD_LPI2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
|
||||
}
|
||||
|
||||
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
|
||||
{
|
||||
uint8_t data = (uint8_t)txBuff;
|
||||
|
||||
return BOARD_LPI2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
|
||||
}
|
||||
|
||||
status_t BOARD_Accel_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
|
||||
}
|
||||
|
||||
void BOARD_Codec_I2C_Init(void)
|
||||
{
|
||||
BOARD_LPI2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
|
||||
}
|
||||
|
||||
status_t BOARD_Codec_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
|
||||
txBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_Codec_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
|
||||
}
|
||||
|
||||
void BOARD_Camera_I2C_Init(void)
|
||||
{
|
||||
LP_FLEXCOMM_Init(BOARD_CAMERA_I2C_INSTANCE, LP_FLEXCOMM_PERIPH_LPI2C);
|
||||
BOARD_LPI2C_Init(BOARD_CAMERA_I2C_BASEADDR, BOARD_CAMERA_I2C_CLOCK_FREQ);
|
||||
}
|
||||
|
||||
status_t BOARD_Camera_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Send(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
|
||||
txBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_Camera_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_Receive(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
|
||||
rxBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_Camera_I2C_SendSCCB(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_SendSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
|
||||
txBuffSize);
|
||||
}
|
||||
|
||||
status_t BOARD_Camera_I2C_ReceiveSCCB(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
|
||||
{
|
||||
return BOARD_LPI2C_ReceiveSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
|
||||
rxBuffSize);
|
||||
}
|
||||
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
|
||||
/* Update Active mode voltage for OverDrive mode. */
|
||||
void BOARD_PowerMode_OD(void)
|
||||
{
|
||||
spc_active_mode_dcdc_option_t opt = {
|
||||
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
|
||||
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength,
|
||||
};
|
||||
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &opt);
|
||||
|
||||
spc_sram_voltage_config_t cfg = {
|
||||
.operateVoltage = kSPC_sramOperateAt1P2V,
|
||||
.requestVoltageUpdate = true,
|
||||
};
|
||||
SPC_SetSRAMOperateVoltage(SPC0, &cfg);
|
||||
}
|
||||
|
|
@ -0,0 +1,261 @@
|
|||
/*
|
||||
* Copyright 2022-2023 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#include "clock_config.h"
|
||||
#include "fsl_gpio.h"
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
/*! @brief The board name */
|
||||
#define BOARD_NAME "FRDM-MCXN947"
|
||||
|
||||
/*! @brief The UART to use for debug messages. */
|
||||
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
|
||||
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART4
|
||||
#define BOARD_DEBUG_UART_INSTANCE 4U
|
||||
#define BOARD_DEBUG_UART_CLK_FREQ 12000000U
|
||||
#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM4
|
||||
#define BOARD_DEBUG_UART_RST kFC4_RST_SHIFT_RSTn
|
||||
#define BOARD_DEBUG_UART_CLKSRC kCLOCK_FlexComm4
|
||||
#define BOARD_UART_IRQ_HANDLER LP_FLEXCOMM4_IRQHandler
|
||||
#define BOARD_UART_IRQ LP_FLEXCOMM4_IRQn
|
||||
|
||||
#define BOARD_DEBUG_UART_TYPE_CORE1 kSerialPort_Uart
|
||||
#define BOARD_DEBUG_UART_BASEADDR_CORE1 (uint32_t) USART1
|
||||
#define BOARD_DEBUG_UART_INSTANCE_CORE1 1U
|
||||
#define BOARD_DEBUG_UART_CLK_FREQ_CORE1 12000000U
|
||||
#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
|
||||
#define BOARD_DEBUG_UART_RST_CORE1 kFC1_RST_SHIFT_RSTn
|
||||
#define BOARD_DEBUG_UART_CLKSRC_CORE1 kCLOCK_Flexcomm1
|
||||
#define BOARD_UART_IRQ_HANDLER_CORE1 FLEXCOMM1_IRQHandler
|
||||
#define BOARD_UART_IRQ_CORE1 FLEXCOMM1_IRQn
|
||||
|
||||
#ifndef BOARD_DEBUG_UART_BAUDRATE
|
||||
#define BOARD_DEBUG_UART_BAUDRATE 115200U
|
||||
#endif /* BOARD_DEBUG_UART_BAUDRATE */
|
||||
|
||||
#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
|
||||
#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
|
||||
#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
|
||||
|
||||
/*! @brief The UART to use for Bluetooth M.2 interface. */
|
||||
#define BOARD_BT_UART_INSTANCE 2
|
||||
#define BOARD_BT_UART_BAUDRATE 3000000
|
||||
#define BOARD_BT_UART_CLK_FREQ 12000000U
|
||||
#define BOARD_BT_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM2
|
||||
|
||||
/*! @brief The ENET PHY address. */
|
||||
#define BOARD_ENET0_PHY_ADDRESS (0x00U) /* Phy address of enet port 0. */
|
||||
|
||||
/*! @brief Memory ranges not usable by the ENET DMA. */
|
||||
#ifndef BOARD_ENET_NON_DMA_MEMORY_ARRAY
|
||||
#define BOARD_ENET_NON_DMA_MEMORY_ARRAY \
|
||||
{ \
|
||||
{0x00000000U, 0x0007FFFFU}, {0x10000000U, 0x17FFFFFFU}, {0x80000000U, 0xDFFFFFFFU}, \
|
||||
{0x00000000U, 0x00000000U}, \
|
||||
}
|
||||
#endif /* BOARD_ENET_NON_DMA_MEMORY_ARRAY */
|
||||
|
||||
#define BOARD_ACCEL_I2C_BASEADDR LPI2C2
|
||||
#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
|
||||
|
||||
#define BOARD_CODEC_I2C_BASEADDR LPI2C2
|
||||
#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
|
||||
#define BOARD_CODEC_I2C_INSTANCE 2
|
||||
|
||||
/*! @brief Indexes of the TSI channels for on-board electrodes */
|
||||
#ifndef BOARD_TSI_ELECTRODE_1
|
||||
#define BOARD_TSI_ELECTRODE_1 3U
|
||||
#endif
|
||||
|
||||
/*! @brief Indexes of the TSI mutual channels for FRDM-TOUCH board */
|
||||
#define BOARD_TSI_MUTUAL_TX_ELECTRODE_1 0U
|
||||
#define BOARD_TSI_MUTUAL_RX_ELECTRODE_1 14U
|
||||
|
||||
#ifndef BOARD_LED_RED_GPIO
|
||||
#define BOARD_LED_RED_GPIO GPIO0
|
||||
#endif
|
||||
#ifndef BOARD_LED_RED_GPIO_PIN
|
||||
#define BOARD_LED_RED_GPIO_PIN 10U
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_LED_BLUE_GPIO
|
||||
#define BOARD_LED_BLUE_GPIO GPIO1
|
||||
#endif
|
||||
#ifndef BOARD_LED_BLUE_GPIO_PIN
|
||||
#define BOARD_LED_BLUE_GPIO_PIN 2U
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_LED_GREEN_GPIO
|
||||
#define BOARD_LED_GREEN_GPIO GPIO0
|
||||
#endif
|
||||
#ifndef BOARD_LED_GREEN_GPIO_PIN
|
||||
#define BOARD_LED_GREEN_GPIO_PIN 27U
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_SW2_GPIO
|
||||
#define BOARD_SW2_GPIO GPIO0
|
||||
#endif
|
||||
#ifndef BOARD_SW2_GPIO_PIN
|
||||
#define BOARD_SW2_GPIO_PIN 23U
|
||||
#endif
|
||||
#define BOARD_SW2_NAME "SW2"
|
||||
#define BOARD_SW2_IRQ GPIO00_IRQn
|
||||
#define BOARD_SW2_IRQ_HANDLER GPIO00_IRQHandler
|
||||
|
||||
#ifndef BOARD_SW3_GPIO
|
||||
#define BOARD_SW3_GPIO GPIO0
|
||||
#endif
|
||||
#ifndef BOARD_SW3_GPIO_PIN
|
||||
#define BOARD_SW3_GPIO_PIN 6U
|
||||
#endif
|
||||
#define BOARD_SW3_NAME "SW3"
|
||||
#define BOARD_SW3_IRQ GPIO00_IRQn
|
||||
#define BOARD_SW3_IRQ_HANDLER GPIO00_IRQHandler
|
||||
|
||||
/* USB PHY condfiguration */
|
||||
#define BOARD_USB_PHY_D_CAL (0x04U)
|
||||
#define BOARD_USB_PHY_TXCAL45DP (0x07U)
|
||||
#define BOARD_USB_PHY_TXCAL45DM (0x07U)
|
||||
|
||||
#define BOARD_HAS_NO_CTIMER_OUTPUT_PIN_CONNECTED_TO_LED (1)
|
||||
|
||||
/* Board led color mapping */
|
||||
#define LOGIC_LED_ON 0U
|
||||
#define LOGIC_LED_OFF 1U
|
||||
|
||||
#define LED_RED_INIT(output) \
|
||||
GPIO_PinWrite(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PIN, output); \
|
||||
BOARD_LED_RED_GPIO->PDDR |= (1U << BOARD_LED_RED_GPIO_PIN) /*!< Enable target LED_RED */
|
||||
#define LED_RED_ON() GPIO_PortClear(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
|
||||
#define LED_RED_OFF() GPIO_PortSet(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
|
||||
#define LED_RED_TOGGLE() GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
|
||||
|
||||
#define LED_BLUE_INIT(output) \
|
||||
GPIO_PinWrite(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output); \
|
||||
BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */
|
||||
#define LED_BLUE_ON() GPIO_PortClear(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
|
||||
#define LED_BLUE_OFF() GPIO_PortSet(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
|
||||
#define LED_BLUE_TOGGLE() GPIO_PortToggle(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
|
||||
|
||||
#define LED_GREEN_INIT(output) \
|
||||
GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \
|
||||
BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */
|
||||
#define LED_GREEN_ON() GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
|
||||
#define LED_GREEN_OFF() GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
|
||||
#define LED_GREEN_TOGGLE() GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
|
||||
|
||||
/* Display. */
|
||||
#define BOARD_LCD_DC_GPIO GPIO0
|
||||
#define BOARD_LCD_DC_GPIO_PORT 0U
|
||||
#define BOARD_LCD_DC_GPIO_PIN 10U
|
||||
|
||||
/* Camera */
|
||||
#define BOARD_CAMERA_I2C_BASEADDR LPI2C7
|
||||
#define BOARD_CAMERA_I2C_INSTANCE 7
|
||||
#define BOARD_CAMERA_I2C_CLOCK_FREQ CLOCK_GetLPFlexCommClkFreq(BOARD_CAMERA_I2C_INSTANCE)
|
||||
|
||||
/* Serial MWM WIFI */
|
||||
#define BOARD_SERIAL_MWM_PORT_CLK_FREQ CLOCK_GetFlexCommClkFreq(2)
|
||||
#define BOARD_SERIAL_MWM_PORT USART2
|
||||
#define BOARD_SERIAL_MWM_PORT_IRQn FLEXCOMM2_IRQn
|
||||
#define BOARD_SERIAL_MWM_RST_WRITE(output)
|
||||
|
||||
/*! @brief The EMVSIM SMARTCARD PHY configuration. */
|
||||
#define BOARD_SMARTCARD_MODULE (EMVSIM0) /*!< SMARTCARD communicational module instance */
|
||||
#define BOARD_SMARTCARD_MODULE_IRQ (EMVSIM0_IRQn) /*!< SMARTCARD communicational module IRQ handler */
|
||||
#define BOARD_SMARTCARD_CLOCK_MODULE_CLK_FREQ (CLOCK_GetEmvsimClkFreq(0U))
|
||||
#define BOARD_SMARTCARD_CLOCK_VALUE (4000000U) /*!< SMARTCARD clock frequency */
|
||||
|
||||
/* ERPC LPSPI configuration */
|
||||
#define ERPC_BOARD_LPSPI_SLAVE_READY_USE_GPIO (1)
|
||||
#define ERPC_BOARD_LPSPI_BASEADDR LPSPI3
|
||||
#define ERPC_BOARD_LPSPI_BAUDRATE 500000U
|
||||
#define ERPC_BOARD_LPSPI_CLKSRC kCLOCK_Flexcomm3
|
||||
#define ERPC_BOARD_LPSPI_CLK_FREQ 12000000 // CLOCK_GetFlexCommClkFreq(1)
|
||||
#define ERPC_BOARD_LPSPI_INT_GPIO GPIO0
|
||||
#define ERPC_BOARD_LPSPI_INT_PIN 16U
|
||||
#define ERPC_BOARD_LPSPI_INT_PIN_IRQ PIN_INT0_IRQn
|
||||
#define ERPC_BOARD_LPSPI_INT_PIN_IRQ_HANDLER PIN_INT0_IRQHandler
|
||||
|
||||
/* ERPC LPI2C configuration */
|
||||
#define ERPC_BOARD_LPI2C_BASEADDR LPI2C0_BASE
|
||||
#define ERPC_BOARD_LPI2C_BAUDRATE 100000U
|
||||
#define ERPC_BOARD_LPI2C_CLKSRC kCLOCK_Flexcomm0
|
||||
#define ERPC_BOARD_LPI2C_CLK_FREQ 12000000 // CLOCK_GetFlexCommClkFreq(2)
|
||||
#define ERPC_BOARD_LPI2C_INT_GPIO GPIO1
|
||||
#define ERPC_BOARD_LPI2C_INT_PIN 0U
|
||||
#define ERPC_BOARD_LPI2C_INT_PIN_IRQ PIN_INT1_IRQn
|
||||
#define ERPC_BOARD_LPI2C_INT_PIN_IRQ_HANDLER PIN_INT1_IRQHandler
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
void BOARD_InitDebugConsole(void);
|
||||
void BOARD_InitDebugConsole_Core1(void);
|
||||
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
|
||||
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz);
|
||||
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize);
|
||||
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize);
|
||||
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *txBuff,
|
||||
uint8_t txBuffSize);
|
||||
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
|
||||
uint8_t deviceAddress,
|
||||
uint32_t subAddress,
|
||||
uint8_t subaddressSize,
|
||||
uint8_t *rxBuff,
|
||||
uint8_t rxBuffSize);
|
||||
void BOARD_Accel_I2C_Init(void);
|
||||
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
|
||||
status_t BOARD_Accel_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
|
||||
void BOARD_Codec_I2C_Init(void);
|
||||
status_t BOARD_Codec_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
|
||||
status_t BOARD_Codec_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
|
||||
void BOARD_Camera_I2C_Init(void);
|
||||
status_t BOARD_Camera_I2C_Send(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
|
||||
status_t BOARD_Camera_I2C_Receive(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
|
||||
|
||||
status_t BOARD_Camera_I2C_SendSCCB(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
|
||||
status_t BOARD_Camera_I2C_ReceiveSCCB(
|
||||
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
|
||||
#endif /* SDK_I2C_BASED_COMPONENT_USED */
|
||||
|
||||
void BOARD_PowerMode_OD(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
/*
|
||||
* How to setup clock using clock driver functions:
|
||||
*
|
||||
* 1. Setup clock sources.
|
||||
*
|
||||
* 2. Set up wait states of the flash.
|
||||
*
|
||||
* 3. Set up all dividers.
|
||||
*
|
||||
* 4. Set up all selectors to provide selected clocks.
|
||||
*
|
||||
*/
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Clocks v13.0
|
||||
processor: MCXN947
|
||||
package_id: MCXN947VDF
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 15.1.0
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
#include "fsl_clock.h"
|
||||
#include "clock_config.h"
|
||||
#include "fsl_spc.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
/* System clock frequency. */
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
void BOARD_InitBootClocks(void)
|
||||
{
|
||||
BOARD_BootClockPLL150M();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockPLL150M *********************
|
||||
******************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!Configuration
|
||||
name: BOARD_BootClockPLL150M
|
||||
called_from_default_init: true
|
||||
outputs:
|
||||
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
|
||||
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
|
||||
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
|
||||
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
|
||||
- {id: MAIN_clock.outFreq, value: 150 MHz}
|
||||
- {id: PLL0_CLK_clock.outFreq, value: 150 MHz}
|
||||
- {id: Slow_clock.outFreq, value: 37.5 MHz}
|
||||
- {id: System_clock.outFreq, value: 150 MHz}
|
||||
- {id: gdet_clock.outFreq, value: 48 MHz}
|
||||
- {id: trng_clock.outFreq, value: 48 MHz}
|
||||
settings:
|
||||
- {id: PLL0_Mode, value: Normal}
|
||||
- {id: RunPowerMode, value: OD}
|
||||
- {id: SCGMode, value: PLL0}
|
||||
- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true}
|
||||
- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M}
|
||||
- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true}
|
||||
- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK}
|
||||
- {id: SYSCON.FLEXSPICLKSEL.sel, value: NO_CLOCK}
|
||||
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
|
||||
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Code for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
void BOARD_BootClockPLL150M(void)
|
||||
{
|
||||
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
|
||||
|
||||
/* FRO OSC setup - begin, attach FRO12M to MainClock for safety switching */
|
||||
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */
|
||||
|
||||
/* Set the DCDC VDD regulator to 1.2 V voltage level */
|
||||
spc_active_mode_dcdc_option_t dcdcOpt = {
|
||||
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
|
||||
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength,
|
||||
};
|
||||
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &dcdcOpt);
|
||||
/* Set the LDO_CORE VDD regulator to 1.2 V voltage level */
|
||||
spc_active_mode_core_ldo_option_t ldoOpt = {
|
||||
.CoreLDOVoltage = kSPC_CoreLDO_OverDriveVoltage,
|
||||
.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength,
|
||||
};
|
||||
SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOpt);
|
||||
/* Configure Flash wait-states to support 1.2V voltage level and 150000000Hz frequency */;
|
||||
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x3U));
|
||||
/* Specifies the 1.2V operating voltage for the SRAM's read/write timing margin */
|
||||
spc_sram_voltage_config_t sramCfg = {
|
||||
.operateVoltage = kSPC_sramOperateAt1P2V,
|
||||
.requestVoltageUpdate = true,
|
||||
};
|
||||
SPC_SetSRAMOperateVoltage(SPC0, &sramCfg);
|
||||
|
||||
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
|
||||
/*!< Set up PLL0 */
|
||||
const pll_setup_t pll0Setup = {
|
||||
.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U),
|
||||
.pllndiv = SCG_APLLNDIV_NDIV(8U),
|
||||
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
|
||||
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
|
||||
.pllRate = 150000000U
|
||||
};
|
||||
CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
|
||||
CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */
|
||||
|
||||
/*!< Set up clock selectors */
|
||||
CLOCK_AttachClk(kPLL0_to_MAIN_CLK);
|
||||
|
||||
/*!< Set up dividers */
|
||||
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
|
||||
|
||||
/* Set SystemCoreClock variable */
|
||||
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _CLOCK_CONFIG_H_
|
||||
#define _CLOCK_CONFIG_H_
|
||||
|
||||
#include "fsl_common.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
************************ BOARD_InitBootClocks function ************************
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes default configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootClocks(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*******************************************************************************
|
||||
******************** Configuration BOARD_BootClockPLL150M *********************
|
||||
******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* Definitions for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
|
||||
#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* API for BOARD_BootClockPLL150M configuration
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
/*!
|
||||
* @brief This function executes configuration of clocks.
|
||||
*
|
||||
*/
|
||||
void BOARD_BootClockPLL150M(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
#endif /* _CLOCK_CONFIG_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Peripherals v14.0
|
||||
processor: MCXN947
|
||||
package_id: MCXN947VDF
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 15.1.0
|
||||
functionalGroups:
|
||||
- name: BOARD_InitPeripherals
|
||||
UUID: d81bd7c9-7989-4ab0-a36e-0428ebb64fd6
|
||||
called_from_default_init: true
|
||||
selectedCore: cm33_core0
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
component:
|
||||
- type: 'system'
|
||||
- type_id: 'system_54b53072540eeeb8f8e9343e71f28176'
|
||||
- global_system_definitions:
|
||||
- user_definitions: ''
|
||||
- user_includes: ''
|
||||
- global_init: ''
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
component:
|
||||
- type: 'gpio_adapter_common'
|
||||
- type_id: 'gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6'
|
||||
- global_gpio_adapter_common:
|
||||
- quick_selection: 'default'
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
component:
|
||||
- type: 'uart_cmsis_common'
|
||||
- type_id: 'uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8'
|
||||
- global_USART_CMSIS_common:
|
||||
- quick_selection: 'default'
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Included files
|
||||
**********************************************************************************************************************/
|
||||
#include "peripherals.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitPeripherals functional group
|
||||
**********************************************************************************************************************/
|
||||
/***********************************************************************************************************************
|
||||
* NVIC initialization code
|
||||
**********************************************************************************************************************/
|
||||
/* clang-format off */
|
||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
instance:
|
||||
- name: 'NVIC'
|
||||
- type: 'nvic'
|
||||
- mode: 'general'
|
||||
- custom_name_enabled: 'false'
|
||||
- type_id: 'nvic_57b5eef3774cc60acaede6f5b8bddc67'
|
||||
- functional_group: 'BOARD_InitPeripherals'
|
||||
- peripheral: 'NVIC'
|
||||
- config_sets:
|
||||
- nvic:
|
||||
- interrupt_table: []
|
||||
- interrupts: []
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/* Empty initialization function (commented out)
|
||||
static void NVIC_init(void) {
|
||||
} */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialization functions
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitPeripherals(void)
|
||||
{
|
||||
/* Initialize components */
|
||||
}
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitBootPeripherals function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitBootPeripherals(void)
|
||||
{
|
||||
BOARD_InitPeripherals();
|
||||
}
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PERIPHERALS_H_
|
||||
#define _PERIPHERALS_H_
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Included files
|
||||
**********************************************************************************************************************/
|
||||
#include "fsl_common.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialization functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
void BOARD_InitPeripherals(void);
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitBootPeripherals function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitBootPeripherals(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _PERIPHERALS_H_ */
|
||||
|
|
@ -0,0 +1,135 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Pins v15.0
|
||||
processor: MCXN947
|
||||
package_id: MCXN947VDF
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 15.1.0
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_port.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitBootPins
|
||||
* Description : Calls initialization functions.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitBootPins(void)
|
||||
{
|
||||
BOARD_InitDbgUARTPins();
|
||||
}
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
BOARD_InitDbgUARTPins:
|
||||
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
|
||||
- pin_list:
|
||||
- {pin_num: A1, peripheral: LP_FLEXCOMM4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8,
|
||||
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable,
|
||||
invert_input: normal}
|
||||
- {pin_num: B1, peripheral: LP_FLEXCOMM4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9,
|
||||
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
|
||||
- {pin_num: B16, peripheral: SWD, signal: SWO, pin_signal: PIO0_2/TDO/SWO/FC1_P2/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable, drive_strength: high,
|
||||
pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitDbgUARTPins
|
||||
* Description : Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitDbgUARTPins(void)
|
||||
{
|
||||
/* Enables the clock for PORT0 controller: Enables clock */
|
||||
CLOCK_EnableClock(kCLOCK_Port0);
|
||||
/* Enables the clock for PORT1: Enables clock */
|
||||
CLOCK_EnableClock(kCLOCK_Port1);
|
||||
|
||||
const port_pin_config_t port0_2_pinB16_config = {/* Internal pull-up/down resistor is disabled */
|
||||
kPORT_PullDisable,
|
||||
/* Low internal pull resistor value is selected. */
|
||||
kPORT_LowPullResistor,
|
||||
/* Fast slew rate is configured */
|
||||
kPORT_FastSlewRate,
|
||||
/* Passive input filter is disabled */
|
||||
kPORT_PassiveFilterDisable,
|
||||
/* Open drain output is disabled */
|
||||
kPORT_OpenDrainDisable,
|
||||
/* High drive strength is configured */
|
||||
kPORT_HighDriveStrength,
|
||||
/* Pin is configured as SWO */
|
||||
kPORT_MuxAlt1,
|
||||
/* Digital input enabled */
|
||||
kPORT_InputBufferEnable,
|
||||
/* Digital input is not inverted */
|
||||
kPORT_InputNormal,
|
||||
/* Pin Control Register fields [15:0] are not locked */
|
||||
kPORT_UnlockRegister};
|
||||
/* PORT0_2 (pin B16) is configured as SWO */
|
||||
PORT_SetPinConfig(PORT0, 2U, &port0_2_pinB16_config);
|
||||
|
||||
const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */
|
||||
kPORT_PullDisable,
|
||||
/* Low internal pull resistor value is selected. */
|
||||
kPORT_LowPullResistor,
|
||||
/* Fast slew rate is configured */
|
||||
kPORT_FastSlewRate,
|
||||
/* Passive input filter is disabled */
|
||||
kPORT_PassiveFilterDisable,
|
||||
/* Open drain output is disabled */
|
||||
kPORT_OpenDrainDisable,
|
||||
/* Low drive strength is configured */
|
||||
kPORT_LowDriveStrength,
|
||||
/* Pin is configured as FC4_P0 */
|
||||
kPORT_MuxAlt2,
|
||||
/* Digital input enabled */
|
||||
kPORT_InputBufferEnable,
|
||||
/* Digital input is not inverted */
|
||||
kPORT_InputNormal,
|
||||
/* Pin Control Register fields [15:0] are not locked */
|
||||
kPORT_UnlockRegister};
|
||||
/* PORT1_8 (pin A1) is configured as FC4_P0 */
|
||||
PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config);
|
||||
|
||||
const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */
|
||||
kPORT_PullDisable,
|
||||
/* Low internal pull resistor value is selected. */
|
||||
kPORT_LowPullResistor,
|
||||
/* Fast slew rate is configured */
|
||||
kPORT_FastSlewRate,
|
||||
/* Passive input filter is disabled */
|
||||
kPORT_PassiveFilterDisable,
|
||||
/* Open drain output is disabled */
|
||||
kPORT_OpenDrainDisable,
|
||||
/* Low drive strength is configured */
|
||||
kPORT_LowDriveStrength,
|
||||
/* Pin is configured as FC4_P1 */
|
||||
kPORT_MuxAlt2,
|
||||
/* Digital input enabled */
|
||||
kPORT_InputBufferEnable,
|
||||
/* Digital input is not inverted */
|
||||
kPORT_InputNormal,
|
||||
/* Pin Control Register fields [15:0] are not locked */
|
||||
kPORT_UnlockRegister};
|
||||
/* PORT1_9 (pin B1) is configured as FC4_P1 */
|
||||
PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config);
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
/*!
|
||||
* @addtogroup pin_mux
|
||||
* @{
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* API
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Calls initialization functions.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootPins(void);
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitDbgUARTPins(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#include "board.h"
|
||||
#include "clock_config.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
int main(void) {
|
||||
BOARD_InitBootPins();
|
||||
BOARD_InitBootClocks();
|
||||
|
||||
BOARD_InitDebugConsole();
|
||||
|
||||
for (;;) {
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue