Initial commit.

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2023-08-23 00:02:54 +08:00
commit 52076e676f
Signed by: imi415
GPG Key ID: 17F01E106F9F5E0A
15 changed files with 604 additions and 0 deletions

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BasedOnStyle: Google
IndentWidth: 4
AlignConsecutiveMacros: Consecutive
AlignConsecutiveDeclarations: Consecutive
AlignConsecutiveAssignments: Consecutive
AllowShortFunctionsOnASingleLine: None
BreakBeforeBraces: Custom
BraceWrapping:
AfterEnum: false
AfterStruct: false
SplitEmptyFunction: false
ColumnLimit: 120

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/cmake-build-*
/build
/board/*.bak
/.vscode

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[submodule "SDK"]
path = SDK
url = https://github.com/hpmicro/hpm_sdk.git

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CMakeLists.txt Normal file
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cmake_minimum_required(VERSION 3.10)
project(fire_hpm6750_template)
enable_language(CXX)
enable_language(ASM)
# Different linker scripts
set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/app_flash.ld")
set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/soc/HPM6750/toolchains/gcc/ram.ld")
set(TARGET_SOURCES
"SDK/components/debug_console/hpm_debug_console.c"
"SDK/drivers/src/hpm_acmp_drv.c"
"SDK/drivers/src/hpm_adc12_drv.c"
"SDK/drivers/src/hpm_adc16_drv.c"
"SDK/drivers/src/hpm_cam_drv.c"
"SDK/drivers/src/hpm_can_drv.c"
"SDK/drivers/src/hpm_crc_drv.c"
"SDK/drivers/src/hpm_dao_drv.c"
"SDK/drivers/src/hpm_dma_drv.c"
"SDK/drivers/src/hpm_enet_drv.c"
"SDK/drivers/src/hpm_femc_drv.c"
"SDK/drivers/src/hpm_ffa_drv.c"
"SDK/drivers/src/hpm_gpio_drv.c"
"SDK/drivers/src/hpm_gptmr_drv.c"
"SDK/drivers/src/hpm_i2c_drv.c"
"SDK/drivers/src/hpm_i2s_drv.c"
"SDK/drivers/src/hpm_jpeg_drv.c"
"SDK/drivers/src/hpm_lcdc_drv.c"
"SDK/drivers/src/hpm_lin_drv.c"
"SDK/drivers/src/hpm_mchtmr_drv.c"
"SDK/drivers/src/hpm_pcfg_drv.c"
"SDK/drivers/src/hpm_pdm_drv.c"
"SDK/drivers/src/hpm_pdma_drv.c"
"SDK/drivers/src/hpm_pla_drv.c"
"SDK/drivers/src/hpm_pllctl_drv.c"
"SDK/drivers/src/hpm_pllctlv2_drv.c"
"SDK/drivers/src/hpm_pmp_drv.c"
"SDK/drivers/src/hpm_ptpc_drv.c"
"SDK/drivers/src/hpm_pwm_drv.c"
"SDK/drivers/src/hpm_rng_drv.c"
"SDK/drivers/src/hpm_rtc_drv.c"
"SDK/drivers/src/hpm_sdm_drv.c"
"SDK/drivers/src/hpm_sdp_drv.c"
"SDK/drivers/src/hpm_sdxc_drv.c"
"SDK/drivers/src/hpm_spi_drv.c"
"SDK/drivers/src/hpm_tsns_drv.c"
"SDK/drivers/src/hpm_uart_drv.c"
"SDK/drivers/src/hpm_usb_drv.c"
"SDK/drivers/src/hpm_vad_drv.c"
"SDK/drivers/src/hpm_wdg_drv.c"
"SDK/soc/HPM6750/boot/hpm_bootheader.c"
"SDK/soc/HPM6750/hpm_clock_drv.c"
"SDK/soc/HPM6750/hpm_l1c_drv.c"
"SDK/soc/HPM6750/hpm_otp_drv.c"
"SDK/soc/HPM6750/hpm_sysctl_drv.c"
"SDK/soc/HPM6750/system.c"
"SDK/soc/HPM6750/toolchains/gcc/initfini.c"
"SDK/soc/HPM6750/toolchains/gcc/start.S"
"SDK/soc/HPM6750/toolchains/reset.c"
"SDK/soc/HPM6750/toolchains/trap.c"
"SDK/utils/hpm_sbrk.c"
"board/board.c"
"board/pinmux.c"
"board/syscalls.c"
"board/xip.c"
"src/main.c"
)
set(TARGET_C_DEFINES
)
set(TARGET_C_DEFINES_XIP
"FLASH_XIP"
)
set(TARGET_C_INCLUDES
"SDK/arch"
"SDK/components/debug_console"
"SDK/drivers/inc"
"SDK/soc/HPM6750"
"SDK/soc/ip"
"board"
"include"
)
# Shared libraries linked with application
set(TARGET_LIBS
"c"
"m"
"nosys"
)
# Shared library and linker script search paths
set(TARGET_LIB_DIRECTORIES
"SDK/soc/HPM6750/toolchains/gcc"
)
# Conditional flags
# DEBUG
set(CMAKE_C_FLAGS_DEBUG "-DDEBUG -O0 -g")
set(CMAKE_CXX_FLAGS_DEBUG "-DDEBUG -O0 -g")
set(CMAKE_ASM_FLAGS_DEBUG "-DDEBUG -O0 -g")
# RELEASE
set(CMAKE_C_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_CXX_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_ASM_FLAGS_RELEASE "-DNDEBUG -O2 -flto")
set(CMAKE_EXE_LINKER_FLAGS_RELEASE "-flto")
# Final compiler flags
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -ffreestanding -fdata-sections -ffunction-sections")
set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
# Shared sources, includes and definitions
add_compile_definitions(${TARGET_C_DEFINES})
include_directories(${TARGET_C_INCLUDES})
link_directories(${TARGET_LIB_DIRECTORIES})
link_libraries(${TARGET_LIBS})
# Main targets are added here
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_FLASH.elf" ${TARGET_SOURCES})
target_compile_definitions("${CMAKE_PROJECT_NAME}_FLASH.elf"
PRIVATE ${TARGET_C_DEFINES_XIP}
)
target_link_options("${CMAKE_PROJECT_NAME}_FLASH.elf"
PRIVATE "-T${TARGET_LDSCRIPT_FLASH}"
PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_FLASH.map"
)
set_property(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" APPEND
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_FLASH.map"
)
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_FLASH.hex"
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_FLASH.elf" "${CMAKE_PROJECT_NAME}_FLASH.hex"
DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.elf"
)
add_custom_target("${CMAKE_PROJECT_NAME}_FLASH_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_FLASH.hex")
if (DEFINED TARGET_TOOLCHAIN_SIZE)
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_FLASH.elf" POST_BUILD
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_FLASH.elf"
)
endif ()
# Create ELF
add_executable("${CMAKE_PROJECT_NAME}_RAM.elf" ${TARGET_SOURCES})
target_link_options("${CMAKE_PROJECT_NAME}_RAM.elf"
PRIVATE "-T${TARGET_LDSCRIPT_RAM}"
PRIVATE "-Wl,--Map=${CMAKE_PROJECT_NAME}_RAM.map"
)
set_property(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" APPEND
PROPERTY ADDITIONAL_CLEAN_FILES "${CMAKE_PROJECT_NAME}_RAM.map"
)
add_custom_command(OUTPUT "${CMAKE_PROJECT_NAME}_RAM.hex"
COMMAND ${CMAKE_OBJCOPY} "-O" "ihex" "${CMAKE_PROJECT_NAME}_RAM.elf" "${CMAKE_PROJECT_NAME}_RAM.hex"
DEPENDS "${CMAKE_PROJECT_NAME}_RAM.elf"
)
add_custom_target("${CMAKE_PROJECT_NAME}_RAM_HEX" DEPENDS "${CMAKE_PROJECT_NAME}_RAM.hex")
if (DEFINED TARGET_TOOLCHAIN_SIZE)
add_custom_command(TARGET "${CMAKE_PROJECT_NAME}_RAM.elf" POST_BUILD
COMMAND ${TARGET_TOOLCHAIN_SIZE} "${CMAKE_PROJECT_NAME}_RAM.elf"
)
endif ()

1
SDK Submodule

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Subproject commit 2d5e67a18b07d0935401cf4d71a22f67163a1b45

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adapter speed 5000
source [find interface/cmsis-dap.cfg]
transport select jtag
source [find target/hpmicro/hpm6750-single-core.cfg]
# openocd flash driver argument:
# - option0:
# [31:28] Flash probe type
# 0 - SFDP SDR / 1 - SFDP DDR
# 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
# 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
# 6 - OctaBus DDR (SPI -> OPI DDR)
# 8 - Xccela DDR (SPI -> OPI DDR)
# 10 - EcoXiP DDR (SPI -> OPI DDR)
# [27:24] Command Pads after Power-on Reset
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
# [23:20] Command Pads after Configuring FLASH
# 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
# [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
# 0 - Not needed
# 1 - QE bit is at bit 6 in Status Register 1
# 2 - QE bit is at bit1 in Status Register 2
# 3 - QE bit is at bit7 in Status Register 2
# 4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
# [15:8] Dummy cycles
# 0 - Auto-probed / detected / default value
# Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
# [7:4] Misc.
# 0 - Not used
# 1 - SPI mode
# 2 - Internal loopback
# 3 - External DQS
# [3:0] Frequency option
# 1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
# - option1:
# [31:20] Reserved
# [19:16] IO voltage
# 0 - 3V / 1 - 1.8V
# [15:12] Pin group
# 0 - 1st group / 1 - 2nd group
# [11:8] Connection selection
# 0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
# [7:0] Drive Strength
# 0 - Default value
# xpi0 configs
# - flash driver: hpm_xpi
# - flash ctrl index: 0xF3040000
# - base address: 0x80000000
# - flash size: 0x2000000
# - flash option0: 0x7
flash bank xpi0 hpm_xpi 0x80000000 0x2000000 1 1 $_TARGET0 0xF3040000 0x7

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_flash_size = 0x00400000;
INCLUDE flash_xip.ld;

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/* SDK drivers */
#include "hpm_clock_drv.h"
#include "hpm_i2c_drv.h"
#include "hpm_pcfg_drv.h"
#include "hpm_pllctl_drv.h"
#include "hpm_pmp_drv.h"
#include "hpm_sysctl_drv.h"
/* Board */
#include "board.h"
#include "pinmux.h"
typedef struct {
GPIO_Type *ctl;
uint8_t index;
uint8_t pin;
} board_led_t;
static const board_led_t s_board_led_table[BOARD_LED_COUNT] = {
{.ctl = BOARD_LED0_GPIO_CTRL, .index = BOARD_LED0_GPIO_INDEX, .pin = BOARD_LED0_GPIO_PIN},
{.ctl = BOARD_LED1_GPIO_CTRL, .index = BOARD_LED1_GPIO_INDEX, .pin = BOARD_LED1_GPIO_PIN},
{.ctl = BOARD_LED2_GPIO_CTRL, .index = BOARD_LED2_GPIO_INDEX, .pin = BOARD_LED2_GPIO_PIN},
};
void board_init(void) {
board_clock_init();
board_debug_console_init();
board_led_init();
board_pmp_init();
}
void board_clock_init(void) {
uint32_t cpu0_freq = clock_get_frequency(clock_cpu0);
if (cpu0_freq == PLLCTL_SOC_PLL_REFCLK_FREQ) {
/* Configure the External OSC ramp-up time: ~9ms */
pllctl_xtal_set_rampup_time(HPM_PLLCTL, 32UL * 1000UL * 9U);
/* Select clock setting preset1 */
sysctl_clock_set_preset(HPM_SYSCTL, sysctl_preset_1);
}
/* Update DCDC voltage */
pcfg_dcdc_set_voltage(HPM_PCFG, BOARD_CORE_VOLTAGE_MV);
if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, 0, BOARD_CPU_FREQ) != status_success) {
for (;;) {
WFI();
}
}
clock_set_source_divider(clock_cpu0, clk_src_pll0_clk0, 1);
clock_update_core_clock();
}
void board_debug_console_init(void) {
console_config_t cfg;
board_debug_uart_pins_init();
/* Configure the UART clock to 24MHz */
clock_set_source_divider(clock_uart0, clk_src_osc24m, 1U);
clock_add_to_group(clock_uart0, 0);
cfg.type = CONSOLE_TYPE_UART;
cfg.base = HPM_UART0_BASE;
cfg.src_freq_in_hz = clock_get_frequency(clock_uart0);
cfg.baudrate = BOARD_DEBUG_UART_BAUD;
console_init(&cfg);
}
void board_led_init(void) {
board_led_pins_init();
}
void board_led_set(uint8_t led_id, bool state) {
if (led_id < BOARD_LED_COUNT) {
const board_led_t *led = &s_board_led_table[led_id];
gpio_write_pin(led->ctl, led->index, led->pin, !state);
}
}
void board_pmp_init(void) {
uint32_t start_addr;
uint32_t end_addr;
uint32_t length;
pmp_entry_t pmp_entry[16];
uint8_t index = 0;
/* Init noncachable memory */
extern uint32_t __noncacheable_start__[];
extern uint32_t __noncacheable_end__[];
start_addr = (uint32_t)__noncacheable_start__;
end_addr = (uint32_t)__noncacheable_end__;
length = end_addr - start_addr;
if (length > 0) {
/* Ensure the address and the length are power of 2 aligned */
assert((length & (length - 1U)) == 0U);
assert((start_addr & (length - 1U)) == 0U);
pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
index++;
}
/* Init share memory */
extern uint32_t __share_mem_start__[];
extern uint32_t __share_mem_end__[];
start_addr = (uint32_t)__share_mem_start__;
end_addr = (uint32_t)__share_mem_end__;
length = end_addr - start_addr;
if (length > 0) {
/* Ensure the address and the length are power of 2 aligned */
assert((length & (length - 1U)) == 0U);
assert((start_addr & (length - 1U)) == 0U);
pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
index++;
}
pmp_config(&pmp_entry[0], index);
}

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/*
* Copyright (c) 2021-2023 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef HPM_BOARD_H
#define HPM_BOARD_H
#include <stdio.h>
/* SDK drivers */
#include "hpm_clock_drv.h"
#include "hpm_common.h"
#include "hpm_gpio_drv.h"
#include "hpm_soc.h"
#include "hpm_soc_feature.h"
/* Debug Console */
#include "hpm_debug_console.h"
/* Board */
#include "pinmux.h"
#define BOARD_CPU_FREQ (648000000UL)
#define BOARD_CORE_VOLTAGE_MV (1200UL)
#define BOARD_DEBUG_UART_BAUD (115200UL)
#define BOARD_LED_COUNT 3
#define BOARD_LED0_GPIO_CTRL HPM_GPIO0
#define BOARD_LED1_GPIO_CTRL HPM_GPIO0
#define BOARD_LED2_GPIO_CTRL HPM_GPIO0
#define BOARD_LED0_GPIO_INDEX GPIO_DI_GPIOB
#define BOARD_LED1_GPIO_INDEX GPIO_DI_GPIOB
#define BOARD_LED2_GPIO_INDEX GPIO_DI_GPIOB
#define BOARD_LED0_GPIO_PIN 29
#define BOARD_LED1_GPIO_PIN 30
#define BOARD_LED2_GPIO_PIN 31
#define BOARD_LED_GPIO_CTRL BOARD_LED0_GPIO_CTRL
#define BOARD_LED_GPIO_INDEX BOARD_LED0_GPIO_INDEX
#define BOARD_LED_GPIO_PIN BOARD_LED0_GPIO_PIN
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
void board_init(void);
void board_clock_init(void);
void board_debug_console_init(void);
void board_led_init(void);
void board_led_set(uint8_t led_id, bool state);
void board_pmp_init(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* HPM_BOARD_H */

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/*
* Copyright (c) 2021-2022 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include "board.h"
void board_debug_uart_pins_init(void) {
HPM_IOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY07_FUNC_CTL_UART0_RXD;
HPM_IOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY06_FUNC_CTL_UART0_TXD;
/* PY port IO needs to configure PIOC as well */
HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY06_FUNC_CTL_SOC_PY_06;
HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY07_FUNC_CTL_SOC_PY_07;
}
void board_led_pins_init(void) {
HPM_IOC->PAD[IOC_PAD_PB29].FUNC_CTL = IOC_PB29_FUNC_CTL_GPIO_B_29;
HPM_IOC->PAD[IOC_PAD_PB30].FUNC_CTL = IOC_PB30_FUNC_CTL_GPIO_B_30;
HPM_IOC->PAD[IOC_PAD_PB31].FUNC_CTL = IOC_PB31_FUNC_CTL_GPIO_B_31;
gpio_set_pin_output_with_initial(BOARD_LED0_GPIO_CTRL, BOARD_LED0_GPIO_INDEX, BOARD_LED0_GPIO_PIN, 1U);
gpio_set_pin_output_with_initial(BOARD_LED1_GPIO_CTRL, BOARD_LED1_GPIO_INDEX, BOARD_LED1_GPIO_PIN, 1U);
gpio_set_pin_output_with_initial(BOARD_LED2_GPIO_CTRL, BOARD_LED2_GPIO_INDEX, BOARD_LED2_GPIO_PIN, 1U);
}

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/*
* Copyright (c) 2021 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef HPM_PINMUX_H
#define HPM_PINMUX_H
#include "hpm_soc.h"
#ifdef __cplusplus
extern "C" {
#endif
void board_debug_uart_pins_init(void);
void board_led_pins_init(void);
#ifdef __cplusplus
}
#endif
#endif /* HPM_PINMUX_H */

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__attribute__((weak)) int _close(int file) {
return -1;
}
__attribute__((weak)) int _isatty(int file) {
return 1;
}
__attribute__((weak)) int _lseek(int file, int ptr, int dir) {
return 0;
}
__attribute__((weak)) void _kill(int pid, int sig) {
}
__attribute__((weak)) int _getpid(void) {
return -1;
}

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#include <stdint.h>
/**
* @brief FLASH configuration option definitions:
* option[0]:
* [31:16] 0xfcf9 - FLASH configuration option tag
* [15:4] 0 - Reserved
* [3:0] option words (exclude option[0])
* option[1]:
* [31:28] Flash probe type
* 0 - SFDP SDR / 1 - SFDP DDR
* 2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
* 4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
* 6 - OctaBus DDR (SPI -> OPI DDR)
* 8 - Xccela DDR (SPI -> OPI DDR)
* 10 - EcoXiP DDR (SPI -> OPI DDR)
* [27:24] Command Pads after Power-on Reset
* 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
* [23:20] Command Pads after Configuring FLASH
* 0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
* [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
* 0 - Not needed
* 1 - QE bit is at bit 6 in Status Register 1
* 2 - QE bit is at bit1 in Status Register 2
* 3 - QE bit is at bit7 in Status Register 2
* 4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
* [15:8] Dummy cycles
* 0 - Auto-probed / detected / default value
* Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
* [7:4] Misc.
* 0 - Not used
* 1 - SPI mode
* 2 - Internal loopback
* 3 - External DQS
* [3:0] Frequency option
* 1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
*
* option[2] (Effective only if the bit[3:0] in option[0] > 1)
* [31:20] Reserved
* [19:16] IO voltage
* 0 - 3V / 1 - 1.8V
* [15:12] Pin group
* 0 - 1st group / 1 - 2nd group
* [11:8] Connection selection
* 0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
* [7:0] Drive Strength
* 0 - Default value
* option[3] (Effective only if the bit[3:0] in option[0] > 2, required only for the QSPI NOR FLASH that not supports
* JESD216)
* [31:16] reserved
* [15:12] Sector Erase Command Option, not required here
* [11:8] Sector Size Option, not required here
* [7:0] Flash Size Option
* 0 - 4MB / 1 - 8MB / 2 - 16MB
*/
#if defined(FLASH_XIP) && FLASH_XIP
__attribute__((section(".nor_cfg_option"))) const uint32_t option[4] = {
0xfcf90001,
0x00000007,
0x00000000,
0x00000000,
};
#endif

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# Poor old Windows...
if(WIN32)
set(CMAKE_SYSTEM_NAME "Generic")
endif()
set(CMAKE_C_COMPILER riscv32-elf-gcc)
set(CMAKE_CXX_COMPILER riscv32-elf-g++)
# Optionally set size binary name, for elf section size reporting.
set(TARGET_TOOLCHAIN_SIZE riscv32-elf-size)
set(CMAKE_C_FLAGS_INIT "-march=rv32imfdcxandes -mabi=ilp32d")
set(CMAKE_CXX_FLAGS_INIT "-march=rv32imfdcxandes -mabi=ilp32d")
set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nosys.specs -Wl,--print-memory-usage -nostartfiles")
# Make CMake happy about those compilers
set(CMAKE_TRY_COMPILE_TARGET_TYPE "STATIC_LIBRARY")

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#include <stdio.h>
#include "board.h"
#include "hpm_debug_console.h"
int main(void) {
board_init();
printf("Hello HPM!\n");
board_led_set(0, true);
for (;;) {
WFI();
}
return 0;
}