parent
ab31ab03e0
commit
da68ec290f
|
@ -28,8 +28,6 @@ int main(void) {
|
||||||
|
|
||||||
BOARD_InitBootPeripherals();
|
BOARD_InitBootPeripherals();
|
||||||
|
|
||||||
CLOCK_EnableClock(kCLOCK_Ocram);
|
|
||||||
|
|
||||||
BOARD_ConfigMPU();
|
BOARD_ConfigMPU();
|
||||||
|
|
||||||
CLOCK_SetMode(kCLOCK_ModeRun);
|
CLOCK_SetMode(kCLOCK_ModeRun);
|
||||||
|
@ -38,7 +36,7 @@ int main(void) {
|
||||||
|
|
||||||
app_lvgl_init();
|
app_lvgl_init();
|
||||||
|
|
||||||
lv_demo_benchmark();
|
lv_demo_music();
|
||||||
|
|
||||||
vTaskStartScheduler();
|
vTaskStartScheduler();
|
||||||
|
|
||||||
|
|
|
@ -37,7 +37,7 @@ const flexspi_nor_config_t spiflash_config = {
|
||||||
.busyOffset = 0U,
|
.busyOffset = 0U,
|
||||||
.busyBitPolarity = 1U,
|
.busyBitPolarity = 1U,
|
||||||
.lookupTable = {
|
.lookupTable = {
|
||||||
// Fast read quad IO (EBh) [NOR_CMD_LUT_SEQ_IDX_READ]
|
// Fast read quad IO (ECh) [NOR_CMD_LUT_SEQ_IDX_READ]
|
||||||
[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
|
[4U * 0 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
|
||||||
[4U * 0 + 1U] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xF0, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
|
[4U * 0 + 1U] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xF0, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
|
||||||
[4U * 0 + 2U] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
|
[4U * 0 + 2U] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
|
||||||
|
@ -48,19 +48,19 @@ const flexspi_nor_config_t spiflash_config = {
|
||||||
// Write enable (06h) [NOR_CMD_LUT_SEQ_IDX_WRITEENABLE]
|
// Write enable (06h) [NOR_CMD_LUT_SEQ_IDX_WRITEENABLE]
|
||||||
[4U * 3 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
|
[4U * 3 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),
|
||||||
|
|
||||||
// Page program () [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
|
// Page program (34h) [NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM]
|
||||||
[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_4PAD, 0x18),
|
[4U * 4 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x34, RADDR_SDR, FLEXSPI_4PAD, 0x20),
|
||||||
[4U * 4 + 1U] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
|
[4U * 4 + 1U] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, STOP, FLEXSPI_1PAD, 0x00),
|
||||||
|
|
||||||
// Erase sector (20h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
|
// Erase sector (21h) [NOR_CMD_LUT_SEQ_IDX_ERASESECTOR]
|
||||||
[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
|
[4U * 5 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
|
||||||
|
|
||||||
// Erase block 32kB (52h) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
|
// Erase block 64kB (DCh) [NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK]
|
||||||
[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 0x18),
|
[4U * 8 + 0U] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xDC, RADDR_SDR, FLEXSPI_1PAD, 0x20),
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
.pageSize = 256u,
|
.pageSize = 256u,
|
||||||
.sectorSize = 4u * 1024u,
|
.sectorSize = 4u * 1024u,
|
||||||
.blockSize = 32u * 1024u,
|
.blockSize = 64u * 1024u,
|
||||||
};
|
};
|
||||||
#endif /* XIP_BOOT_HEADER_ENABLE */
|
#endif /* XIP_BOOT_HEADER_ENABLE */
|
||||||
|
|
Loading…
Reference in New Issue