Added basic MRB app.
Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
parent
b786350481
commit
72f1a62ab6
GPG Key ID:
885EC2B5A8A6F8A7
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@ -1,3 +1,6 @@
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[submodule "SDK"]
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path = SDK
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url = https://git.minori.work/Embedded_SDK/MCUXpresso_LPC55S69.git
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[submodule "lib/mruby"]
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path = lib/mruby
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url = https://git.minori.work/Embedded_Projects/MRuby_MCUXpresso.git
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@ -6,7 +6,7 @@ enable_language(CXX)
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enable_language(ASM)
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# Different linker scripts
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set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core0_flash.ld")
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set(TARGET_LDSCRIPT_FLASH "${CMAKE_SOURCE_DIR}/app_flash.ld")
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set(TARGET_LDSCRIPT_RAM "${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc/LPC55S69_cm33_core0_ram.ld")
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set(TARGET_SOURCES
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@ -85,6 +85,7 @@ set(TARGET_C_INCLUDES
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# Shared libraries linked with application
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set(TARGET_LIBS
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"mruby_mcux"
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"c"
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"m"
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"nosys"
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@ -92,7 +93,7 @@ set(TARGET_LIBS
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# Shared library and linker script search paths
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set(TARGET_LIB_DIRECTORIES
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"${CMAKE_SOURCE_DIR}/SDK/devices/LPC55S69/gcc"
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)
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# Conditional flags
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@ -113,6 +114,9 @@ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fno-common -fno-builtin -f
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set(CMAKE_ASM_FLAGS "${CMAKE_C_FLAGS} -x assembler-with-cpp")
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set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,--gc-sections")
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set(MRUBY_MCUX_TARGET "lpc55s69")
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add_subdirectory(lib/mruby)
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# Shared sources, includes and definitions
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add_compile_definitions(${TARGET_C_DEFINES})
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include_directories(${TARGET_C_INCLUDES})
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@ -20,13 +20,13 @@
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<generate_registers_defines>false</generate_registers_defines>
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</preferences>
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<tools>
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<pins name="Pins" version="12.0" enabled="true" update_project_code="true">
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<pins name="Pins" version="13.0" enabled="true" update_project_code="true">
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<generated_project_files>
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<file path="board/pin_mux.c" update_enabled="true"/>
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<file path="board/pin_mux.h" update_enabled="true"/>
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</generated_project_files>
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<pins_profile>
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<processor_version>12.0.0</processor_version>
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<processor_version>13.0.1</processor_version>
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</pins_profile>
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<functions_list>
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<function name="BOARD_InitDEBUG_UARTPins">
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@ -518,13 +518,13 @@
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</function>
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</functions_list>
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</pins>
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<clocks name="Clocks" version="10.0" enabled="true" update_project_code="true">
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<clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
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<generated_project_files>
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<file path="board/clock_config.c" update_enabled="true"/>
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<file path="board/clock_config.h" update_enabled="true"/>
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</generated_project_files>
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<clocks_profile>
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<processor_version>12.0.0</processor_version>
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<processor_version>13.0.1</processor_version>
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</clocks_profile>
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<clock_configurations>
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<clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
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@ -771,13 +771,13 @@
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</dcdx_profile>
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<dcdx_configurations/>
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</dcdx>
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<periphs name="Peripherals" version="11.0" enabled="true" update_project_code="true">
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<periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
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<generated_project_files>
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<file path="board/peripherals.c" update_enabled="true"/>
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<file path="board/peripherals.h" update_enabled="true"/>
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</generated_project_files>
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<peripherals_profile>
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<processor_version>12.0.0</processor_version>
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<processor_version>13.0.1</processor_version>
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</peripherals_profile>
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<functional_groups>
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<functional_group name="BOARD_InitPeripherals_cm33_core0" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
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@ -789,7 +789,7 @@
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<config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
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<setting name="i2c_mode" value="kI2C_Master"/>
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<setting name="clockSource" value="FXCOMFunctionClock"/>
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<setting name="clockSourceFreq" value="BOARD_BootClockPLL150M"/>
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<setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
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<struct name="i2c_master_config">
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<setting name="enableMaster" value="true"/>
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<setting name="baudRate_Bps" value="100000"/>
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@ -0,0 +1 @@
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Subproject commit 3969019d6a43b0b76c8227cbd5b9640047c41c0d
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@ -0,0 +1,4 @@
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__stack_size__ = 0x4000;
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__heap_size__ = 0x8000;
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INCLUDE LPC55S69_cm33_core0_flash.ld
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@ -17,11 +17,11 @@
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Clocks v10.0
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product: Clocks v11.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 12.0.0
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processor_version: 13.0.1
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board: LPCXpresso55S69
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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/* clang-format on */
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@ -41,6 +41,42 @@ void BOARD_InitBootClocks(void);
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#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK 12000000UL
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#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK 0UL
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#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK 0UL
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/*******************************************************************************
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* API for BOARD_BootClockFRO12M configuration
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******************************************************************************/
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@ -67,6 +103,42 @@ void BOARD_BootClockFRO12M(void);
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#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK0UL
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#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK 96000000UL
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#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK 0UL
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#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK 0UL
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/*******************************************************************************
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* API for BOARD_BootClockFROHF96M configuration
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******************************************************************************/
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@ -93,6 +165,42 @@ void BOARD_BootClockFROHF96M(void);
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#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK 100000000UL
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#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK 0UL
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/*******************************************************************************
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* API for BOARD_BootClockPLL100M configuration
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******************************************************************************/
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@ -119,6 +227,42 @@ void BOARD_BootClockPLL100M(void);
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#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
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/* Clock outputs (values are in Hz): */
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#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK 150000000UL
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#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK 0UL
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#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK 0UL
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/*******************************************************************************
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* API for BOARD_BootClockPLL150M configuration
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******************************************************************************/
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@ -6,11 +6,11 @@
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Peripherals v11.0
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product: Peripherals v12.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 12.0.0
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processor_version: 13.0.1
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board: LPCXpresso55S69
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functionalGroups:
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- name: BOARD_InitPeripherals_cm33_core0
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@ -7,11 +7,11 @@
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v12.0
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product: Pins v13.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 12.0.0
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processor_version: 13.0.1
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board: LPCXpresso55S69
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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@ -0,0 +1 @@
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Subproject commit d31acdb6fa8e857bb6de4a0bbb630c14dac25e00
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14
src/main.c
14
src/main.c
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@ -1,3 +1,5 @@
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#include <math.h>
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#include "board.h"
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#include "clock_config.h"
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#include "peripherals.h"
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|
@ -5,6 +7,9 @@
|
|||
|
||||
#include "fsl_debug_console.h"
|
||||
|
||||
#include "mruby.h"
|
||||
#include "mruby/compile.h"
|
||||
|
||||
int main(void) {
|
||||
BOARD_InitBootPins();
|
||||
BOARD_BootClockFROHF96M();
|
||||
|
|
@ -12,7 +17,14 @@ int main(void) {
|
|||
|
||||
BOARD_InitDebugConsole();
|
||||
|
||||
PRINTF("Hello world!!\r\n");
|
||||
mrb_state* mrb = mrb_open();
|
||||
mrbc_context *cxt = mrbc_context_new(mrb);
|
||||
|
||||
PRINTF("MRuby Version: %s\r\n", MRUBY_RUBY_VERSION);
|
||||
|
||||
mrbc_cleanup_local_variables(mrb, cxt);
|
||||
mrbc_context_free(mrb, cxt);
|
||||
mrb_close(mrb);
|
||||
|
||||
for(;;) {
|
||||
__WFI();
|
||||
|
|
|
|||
Loading…
Reference in New Issue