STM32H750XB_Hello/README.md

# STM32H750XB Hello World Program

## Board
Fire H750XB board

## Build System

[![Build Status](https://ci.minori.work/api/badges/STM32_Projects/STM32H750XB_Hello/status.svg)](https://ci.minori.work/STM32_Projects/STM32H750XB_Hello)

CMake v3.10+

Build Instructions
```bash
mkdir build && cd build
cmake -DCMAKE_TOOLCHAIN_FILE=arm-none-eabi.cmake # Or you can implement yours
make -j${nproc}

```

## Peripherals Utilized
* FMC
* USART0
* TIM2
* TIM3
* TIM7

## USART0
* PA9/PA10
* 921600/8N1

## TIM2/3
* PWM output on CH3/CH4
* 1kHz base frequency

## TIM7
* Tick source

## FMC
FMC clock: 133MHz(Maximum frequency under VOS 3 settings)

SDRAM clock: 66.5MHz(FMC clock divided by 2)

Memory component: Winbond W9825G6KH-6(133MHz/CL2)

Memory parameters:
* Column address = 9bits
* Row address = 13bits
* Common clock = 2HCLK
* Burst read = enabled
* Read pipe delay = 0HCLK
* CL = 2 cycles
* tMRD(Load mode rergister) = 2 cycles
* tXSR(Exit self-refresh) = 72ns (~5 cycles)
* tRAS(Self regresh time) = 42ns (~3 cycles)
* tRC(Row cycle delay) = 60ns (~4 cycles)
* tWR(Write recovery) = 2 cycles
* tRP(Row precharge delay) = 15ns (~2 cycles)
* tRCD(Row to column delay) = 15ns (~2 cycles, up to 3 cycles for constraints)

Alternative memory parameters for 250MHz FMC clock(tCK = 8ns):
* Read pipe delay = 1HCLK
* CL = 2 cycles
* tMRD(Load mode rergister) = 2 cycles
* tXSR(Exit self-refresh) = 72ns (~9 cycles)
* tRAS(Self regresh time) = 42ns (~6 cycles)
* tRC(Row cycle delay) = 60ns (~8 cycles)
* tWR(Write recovery) = 2 cycles
* tRP(Row precharge delay) = 15ns (~2 cycles)
* tRCD(Row to column delay) = 15ns (~2 cycles, up to 4 cycles for constraints)