Added printf, enabled UART, added SDRAM tests.
This commit is contained in:
parent
445512ca66
commit
6fdff30115
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kind: pipeline
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type: kubernetes
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name: default
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steps:
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- name: submodules
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image: alpine/git
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commands:
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- git submodule update --recursive --init
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- name: build
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image: registry.aws.minori.work/imi415/arm-none-toolchain:latest
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commands:
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- mkdir build
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- cd build
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- cmake -DCMAKE_TOOLCHAIN_FILE=arm-none-eabi.cmake ..
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- make
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image_pull_secrets:
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- pull-secret
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@ -0,0 +1,3 @@
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[submodule "Middlewares/Third_Party/printf"]
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path = Middlewares/Third_Party/printf
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url = https://github.com/mpaland/printf.git
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@ -23,6 +23,10 @@ set(C_SOURCES
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"Core/Src/stm32h7xx_it.c"
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"Core/Src/stm32h7xx_it.c"
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"Core/Src/stm32h7xx_hal_msp.c"
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"Core/Src/stm32h7xx_hal_msp.c"
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"Core/Src/stm32h7xx_hal_timebase_tim.c"
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"Core/Src/stm32h7xx_hal_timebase_tim.c"
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"Core/Src/user_tasks.c"
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"Core/Src/tasks/sdram_task.c"
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"Core/Src/printf_impl.c"
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"Middlewares/Third_Party/printf/printf.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c"
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"Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.c"
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@ -81,6 +85,7 @@ include_directories(
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"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"
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"Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"
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"Drivers/CMSIS/Device/ST/STM32H7xx/Include"
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"Drivers/CMSIS/Device/ST/STM32H7xx/Include"
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"Drivers/CMSIS/Include"
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"Drivers/CMSIS/Include"
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"Middlewares/Third_Party/printf"
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)
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)
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# Final compiler flags
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# Final compiler flags
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#ifndef __USER_TASKS_H
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#define __USER_TASKS_H
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#include "cmsis_os2.h"
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void user_tasks_init(void);
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extern osThreadId_t g_sdram_task_handle;
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extern osThreadAttr_t g_sdram_task_attributes;
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void sdram_task(void * argument);
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#endif
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@ -24,6 +24,8 @@
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/* Private includes ----------------------------------------------------------*/
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE BEGIN Includes */
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#include "user_tasks.h"
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/* USER CODE END Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* Private typedef -----------------------------------------------------------*/
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@ -584,6 +586,9 @@ static void MX_GPIO_Init(void)
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void StartDefaultTask(void *argument)
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void StartDefaultTask(void *argument)
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{
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{
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/* USER CODE BEGIN 5 */
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/* USER CODE BEGIN 5 */
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user_tasks_init();
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3);
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3);
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);
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HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
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HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
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#include <stdint.h>
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#include "stm32h7xx_hal.h"
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extern UART_HandleTypeDef huart1;
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void _putchar(char character) {
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HAL_UART_Transmit(&huart1, (uint8_t *)&character, 0x01, 1000);
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}
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include "printf.h"
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#include "user_tasks.h"
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// SDRAM BANK 2, default mapping
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#define SDRAM_START 0xD0000000
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#define SDRAM_END 0xD4000000
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osThreadId_t g_sdram_task_handle;
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osThreadAttr_t g_sdram_task_attributes = {
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.name = "SDRAMT",
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.stack_size = 256 * 4,
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.priority = (osPriority_t) osPriorityNormal,
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};
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void sdram_task(void * argument) {
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printf("SDRAM test started...\r\n");
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for(uint32_t i = SDRAM_START; i < SDRAM_END; i += 4) {
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*(uint32_t *)i = i;
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if(i % 0x10000 == 0) {
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printf("Write: 0x%08lx\r\n", i);
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}
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}
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for(uint32_t i = SDRAM_START; i < SDRAM_END; i += 4) {
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if(*(uint32_t *)i != i) {
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printf("Verify err: 0x%08lx\r\n", i);
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break;
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}
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if(i % 0x10000 == 0) {
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printf("Verify: 0x%08lx\r\n", i);
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}
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}
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printf("SDRAM test completed.\r\n");
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osThreadExit();
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}
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#include "user_tasks.h"
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void user_tasks_init(void) {
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g_sdram_task_handle = osThreadNew(sdram_task, NULL, &g_sdram_task_attributes);
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}
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Subproject commit d3b984684bb8a8bdc48cc7a1abecb93ce59bbe3e
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