353 lines
11 KiB
C
353 lines
11 KiB
C
/*
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/ _____) _ | |
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( (____ _____ ____ _| |_ _____ ____| |__
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\____ \| ___ | (_ _) ___ |/ ___) _ \
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_____) ) ____| | | || |_| ____( (___| | | |
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(______/|_____)_|_|_| \__)_____)\____)_| |_|
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(C)2019 Semtech
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Description:
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Host specific functions to address the LoRa concentrator registers through
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a SPI interface.
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Single-byte read/write and burst read/write.
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Could be used with multiple SPI ports in parallel (explicit file descriptor)
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License: Revised BSD License, see LICENSE.TXT file include in the project
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*/
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/* -------------------------------------------------------------------------- */
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/* --- DEPENDANCIES --------------------------------------------------------- */
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#include <stdint.h> /* C99 types */
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#include <stdio.h> /* printf fprintf */
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#include <stdlib.h> /* malloc free */
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#include <unistd.h> /* lseek, close */
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#include <fcntl.h> /* open */
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#include <string.h> /* memset */
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#include <sys/ioctl.h>
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#include <linux/spi/spidev.h>
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#include "loragw_spi.h"
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#include "loragw_aux.h"
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/* -------------------------------------------------------------------------- */
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/* --- PRIVATE MACROS ------------------------------------------------------- */
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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#if DEBUG_SPI == 1
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#define DEBUG_MSG(str) fprintf(stderr, str)
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#define DEBUG_PRINTF(fmt, args...) fprintf(stderr,"%s:%d: "fmt, __FUNCTION__, __LINE__, args)
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#define CHECK_NULL(a) if(a==NULL){fprintf(stderr,"%s:%d: ERROR: NULL POINTER AS ARGUMENT\n", __FUNCTION__, __LINE__);return LGW_SPI_ERROR;}
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#else
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#define DEBUG_MSG(str)
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#define DEBUG_PRINTF(fmt, args...)
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#define CHECK_NULL(a) if(a==NULL){return LGW_SPI_ERROR;}
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#endif
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/* -------------------------------------------------------------------------- */
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/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
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#define READ_ACCESS 0x00
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#define WRITE_ACCESS 0x80
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/* -------------------------------------------------------------------------- */
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/* --- PUBLIC FUNCTIONS DEFINITION ------------------------------------------ */
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/* SPI initialization and configuration */
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int lgw_spi_open(const char * spidev_path, void **spi_target_ptr) {
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int *spi_device = NULL;
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int dev;
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int a=0, b=0;
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int i;
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/* check input variables */
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CHECK_NULL(spi_target_ptr); /* cannot be null, must point on a void pointer (*spi_target_ptr can be null) */
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/* allocate memory for the device descriptor */
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spi_device = malloc(sizeof(int));
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if (spi_device == NULL) {
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DEBUG_MSG("ERROR: MALLOC FAIL\n");
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return LGW_SPI_ERROR;
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}
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/* open SPI device */
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dev = open(spidev_path, O_RDWR);
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if (dev < 0) {
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DEBUG_PRINTF("ERROR: failed to open SPI device %s\n", spidev_path);
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return LGW_SPI_ERROR;
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}
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/* setting SPI mode to 'mode 0' */
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i = SPI_MODE_0;
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a = ioctl(dev, SPI_IOC_WR_MODE, &i);
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b = ioctl(dev, SPI_IOC_RD_MODE, &i);
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if ((a < 0) || (b < 0)) {
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DEBUG_MSG("ERROR: SPI PORT FAIL TO SET IN MODE 0\n");
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close(dev);
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free(spi_device);
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return LGW_SPI_ERROR;
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}
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/* setting SPI max clk (in Hz) */
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i = SPI_SPEED;
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a = ioctl(dev, SPI_IOC_WR_MAX_SPEED_HZ, &i);
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b = ioctl(dev, SPI_IOC_RD_MAX_SPEED_HZ, &i);
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if ((a < 0) || (b < 0)) {
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DEBUG_MSG("ERROR: SPI PORT FAIL TO SET MAX SPEED\n");
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close(dev);
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free(spi_device);
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return LGW_SPI_ERROR;
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}
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/* setting SPI to MSB first */
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i = 0;
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a = ioctl(dev, SPI_IOC_WR_LSB_FIRST, &i);
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b = ioctl(dev, SPI_IOC_RD_LSB_FIRST, &i);
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if ((a < 0) || (b < 0)) {
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DEBUG_MSG("ERROR: SPI PORT FAIL TO SET MSB FIRST\n");
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close(dev);
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free(spi_device);
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return LGW_SPI_ERROR;
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}
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/* setting SPI to 8 bits per word */
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i = 0;
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a = ioctl(dev, SPI_IOC_WR_BITS_PER_WORD, &i);
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b = ioctl(dev, SPI_IOC_RD_BITS_PER_WORD, &i);
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if ((a < 0) || (b < 0)) {
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DEBUG_MSG("ERROR: SPI PORT FAIL TO SET 8 BITS-PER-WORD\n");
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close(dev);
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return LGW_SPI_ERROR;
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}
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*spi_device = dev;
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*spi_target_ptr = (void *)spi_device;
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DEBUG_MSG("Note: SPI port opened and configured ok\n");
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return LGW_SPI_SUCCESS;
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}
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/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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/* SPI release */
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int lgw_spi_close(void *spi_target) {
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int spi_device;
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int a;
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/* check input variables */
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CHECK_NULL(spi_target);
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/* close file & deallocate file descriptor */
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spi_device = *(int *)spi_target; /* must check that spi_target is not null beforehand */
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a = close(spi_device);
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free(spi_target);
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/* determine return code */
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if (a < 0) {
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DEBUG_MSG("ERROR: SPI PORT FAILED TO CLOSE\n");
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return LGW_SPI_ERROR;
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} else {
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DEBUG_MSG("Note: SPI port closed\n");
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return LGW_SPI_SUCCESS;
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}
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}
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/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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/* Simple write */
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int lgw_spi_w(void *spi_target, uint8_t spi_mux_target, uint16_t address, uint8_t data) {
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int spi_device;
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uint8_t out_buf[4];
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uint8_t command_size;
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struct spi_ioc_transfer k;
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int a;
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/* check input variables */
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CHECK_NULL(spi_target);
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spi_device = *(int *)spi_target; /* must check that spi_target is not null beforehand */
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/* prepare frame to be sent */
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out_buf[0] = spi_mux_target;
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out_buf[1] = WRITE_ACCESS | ((address >> 8) & 0x7F);
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out_buf[2] = ((address >> 0) & 0xFF);
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out_buf[3] = data;
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command_size = 4;
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/* I/O transaction */
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memset(&k, 0, sizeof(k)); /* clear k */
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k.tx_buf = (unsigned long) out_buf;
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k.len = command_size;
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k.speed_hz = SPI_SPEED;
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k.cs_change = 0;
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k.bits_per_word = 8;
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a = ioctl(spi_device, SPI_IOC_MESSAGE(1), &k);
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/* determine return code */
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if (a != (int)k.len) {
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DEBUG_MSG("ERROR: SPI WRITE FAILURE\n");
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return LGW_SPI_ERROR;
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} else {
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DEBUG_MSG("Note: SPI write success\n");
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return LGW_SPI_SUCCESS;
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}
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}
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/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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/* Simple read */
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int lgw_spi_r(void *spi_target, uint8_t spi_mux_target, uint16_t address, uint8_t *data) {
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int spi_device;
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uint8_t out_buf[5];
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uint8_t command_size;
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uint8_t in_buf[ARRAY_SIZE(out_buf)];
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struct spi_ioc_transfer k;
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int a;
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/* check input variables */
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CHECK_NULL(spi_target);
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CHECK_NULL(data);
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spi_device = *(int *)spi_target; /* must check that spi_target is not null beforehand */
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/* prepare frame to be sent */
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out_buf[0] = spi_mux_target;
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out_buf[1] = READ_ACCESS | ((address >> 8) & 0x7F);
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out_buf[2] = ((address >> 0) & 0xFF);
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out_buf[3] = 0x00;
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out_buf[4] = 0x00;
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command_size = 5;
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/* I/O transaction */
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memset(&k, 0, sizeof(k)); /* clear k */
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k.tx_buf = (unsigned long) out_buf;
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k.rx_buf = (unsigned long) in_buf;
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k.len = command_size;
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k.cs_change = 0;
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a = ioctl(spi_device, SPI_IOC_MESSAGE(1), &k);
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/* determine return code */
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if (a != (int)k.len) {
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DEBUG_MSG("ERROR: SPI READ FAILURE\n");
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return LGW_SPI_ERROR;
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} else {
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DEBUG_MSG("Note: SPI read success\n");
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*data = in_buf[command_size - 1];
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return LGW_SPI_SUCCESS;
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}
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}
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/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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/* Burst (multiple-byte) write */
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int lgw_spi_wb(void *spi_target, uint8_t spi_mux_target, uint16_t address, const uint8_t *data, uint16_t size) {
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int spi_device;
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uint8_t command[3];
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uint8_t command_size;
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struct spi_ioc_transfer k[2];
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int size_to_do, chunk_size, offset;
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int byte_transfered = 0;
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int i;
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/* check input parameters */
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CHECK_NULL(spi_target);
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CHECK_NULL(data);
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if (size == 0) {
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DEBUG_MSG("ERROR: BURST OF NULL LENGTH\n");
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return LGW_SPI_ERROR;
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}
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spi_device = *(int *)spi_target; /* must check that spi_target is not null beforehand */
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/* prepare command byte */
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command[0] = spi_mux_target;
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command[1] = WRITE_ACCESS | ((address >> 8) & 0x7F);
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command[2] = ((address >> 0) & 0xFF);
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command_size = 3;
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size_to_do = size;
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/* I/O transaction */
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memset(&k, 0, sizeof(k)); /* clear k */
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k[0].tx_buf = (unsigned long) &command[0];
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k[0].len = command_size;
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k[0].cs_change = 0;
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k[1].cs_change = 0;
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for (i=0; size_to_do > 0; ++i) {
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chunk_size = (size_to_do < LGW_BURST_CHUNK) ? size_to_do : LGW_BURST_CHUNK;
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offset = i * LGW_BURST_CHUNK;
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k[1].tx_buf = (unsigned long)(data + offset);
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k[1].len = chunk_size;
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byte_transfered += (ioctl(spi_device, SPI_IOC_MESSAGE(2), &k) - k[0].len );
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DEBUG_PRINTF("BURST WRITE: to trans %d # chunk %d # transferred %d \n", size_to_do, chunk_size, byte_transfered);
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size_to_do -= chunk_size; /* subtract the quantity of data already transferred */
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}
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/* determine return code */
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if (byte_transfered != size) {
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DEBUG_MSG("ERROR: SPI BURST WRITE FAILURE\n");
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return LGW_SPI_ERROR;
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} else {
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DEBUG_MSG("Note: SPI burst write success\n");
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return LGW_SPI_SUCCESS;
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}
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}
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/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
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/* Burst (multiple-byte) read */
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int lgw_spi_rb(void *spi_target, uint8_t spi_mux_target, uint16_t address, uint8_t *data, uint16_t size) {
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int spi_device;
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uint8_t command[4];
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uint8_t command_size;
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struct spi_ioc_transfer k[2];
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int size_to_do, chunk_size, offset;
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int byte_transfered = 0;
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int i;
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/* check input parameters */
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CHECK_NULL(spi_target);
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CHECK_NULL(data);
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if (size == 0) {
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DEBUG_MSG("ERROR: BURST OF NULL LENGTH\n");
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return LGW_SPI_ERROR;
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}
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spi_device = *(int *)spi_target; /* must check that spi_target is not null beforehand */
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/* prepare command byte */
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command[0] = spi_mux_target;
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command[1] = READ_ACCESS | ((address >> 8) & 0x7F);
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command[2] = ((address >> 0) & 0xFF);
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command[3] = 0x00;
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command_size = 4;
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size_to_do = size;
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/* I/O transaction */
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memset(&k, 0, sizeof(k)); /* clear k */
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k[0].tx_buf = (unsigned long) &command[0];
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k[0].len = command_size;
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k[0].cs_change = 0;
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k[1].cs_change = 0;
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for (i=0; size_to_do > 0; ++i) {
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chunk_size = (size_to_do < LGW_BURST_CHUNK) ? size_to_do : LGW_BURST_CHUNK;
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offset = i * LGW_BURST_CHUNK;
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k[1].rx_buf = (unsigned long)(data + offset);
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k[1].len = chunk_size;
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byte_transfered += (ioctl(spi_device, SPI_IOC_MESSAGE(2), &k) - k[0].len );
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DEBUG_PRINTF("BURST READ: to trans %d # chunk %d # transferred %d \n", size_to_do, chunk_size, byte_transfered);
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size_to_do -= chunk_size; /* subtract the quantity of data already transferred */
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}
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/* determine return code */
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if (byte_transfered != size) {
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DEBUG_MSG("ERROR: SPI BURST READ FAILURE\n");
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return LGW_SPI_ERROR;
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} else {
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DEBUG_MSG("Note: SPI burst read success\n");
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return LGW_SPI_SUCCESS;
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}
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}
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/* --- EOF ------------------------------------------------------------------ */
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