event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited
and adjust the boards which use this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2022-03-04 08:43:05 -07:00 committed by Tom Rini
parent 42fdcebf85
commit 7fe32b3442
26 changed files with 74 additions and 43 deletions

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@ -94,6 +94,7 @@ config NIOS2
bool "Nios II architecture"
select CPU
select DM
imply DM_EVENT
select OF_CONTROL
select SUPPORT_OF_CONTROL
imply CMD_DM
@ -113,6 +114,7 @@ config RISCV
select DM
imply DM_SERIAL
imply DM_ETH
imply DM_EVENT
imply DM_MMC
imply DM_SPI
imply DM_SPI_FLASH
@ -238,6 +240,7 @@ config X86
imply CMD_SF_TEST
imply CMD_ZBOOT
imply DM_ETH
imply DM_EVENT
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC

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@ -774,6 +774,7 @@ config ARCH_OMAP2PLUS
select SUPPORT_SPL
imply TI_SYSC if DM && OF_CONTROL
imply FIT
imply DM_EVENT
config ARCH_MESON
bool "Amlogic Meson"
@ -818,6 +819,7 @@ config ARCH_IMX8
select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
imply DM_EVENT
config ARCH_IMX8M
bool "NXP i.MX8M platform"
@ -831,6 +833,7 @@ config ARCH_IMX8M
select DM
select SUPPORT_SPL
imply CMD_DM
imply DM_EVENT
config ARCH_IMX8ULP
bool "NXP i.MX8ULP platform"
@ -841,6 +844,7 @@ config ARCH_IMX8ULP
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
imply CMD_DM
imply DM_EVENT
config ARCH_IMXRT
bool "NXP i.MXRT platform"

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@ -8,6 +8,7 @@
#include <cpu.h>
#include <cpu_func.h>
#include <dm.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <asm/cache.h>
@ -66,7 +67,7 @@ int arch_cpu_init(void)
return 0;
}
int arch_cpu_init_dm(void)
static int imx8_init_mu(void *ctx, struct event *event)
{
struct udevice *devp;
int node, ret;
@ -88,6 +89,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu);
int print_bootinfo(void)
{

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@ -7,6 +7,7 @@
#include <common.h>
#include <cpu_func.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <asm/arch/imx-regs.h>
@ -494,7 +495,7 @@ static void imx_set_wdog_powerdown(bool enable)
writew(enable, &wdog3->wmcr);
}
int arch_cpu_init_dm(void)
static int imx8m_check_clock(void *ctx, struct event *event)
{
struct udevice *dev;
int ret;
@ -511,6 +512,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
int arch_cpu_init(void)
{

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@ -11,6 +11,7 @@
#include <asm/mach-imx/boot_mode.h>
#include <asm/global_data.h>
#include <efi_loader.h>
#include <event.h>
#include <spl.h>
#include <asm/arch/rdc.h>
#include <asm/arch/s400_api.h>
@ -569,7 +570,7 @@ int arch_cpu_init(void)
return 0;
}
int arch_cpu_init_dm(void)
static int imx8ulp_check_mu(void *ctx, struct event *event)
{
struct udevice *devp;
int node, ret;
@ -584,6 +585,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu);
#if defined(CONFIG_SPL_BUILD)
__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)

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@ -11,6 +11,7 @@
#include <dm.h>
#include <debug_uart.h>
#include <errno.h>
#include <event.h>
#include <init.h>
#include <net.h>
#include <ns16550.h>
@ -596,7 +597,7 @@ void board_init_f(ulong dummy)
#endif
int arch_cpu_init_dm(void)
static int am33xx_dm_post_init(void *ctx, struct event *event)
{
hw_data_init();
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
@ -604,3 +605,4 @@ int arch_cpu_init_dm(void)
#endif
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init);

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@ -12,6 +12,7 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <event.h>
#include <fdtdec.h>
#include <init.h>
#include <spl.h>
@ -239,11 +240,13 @@ void board_init_f(ulong dummy)
}
#endif
int arch_cpu_init_dm(void)
static int omap2_system_init(void *ctx, struct event *event)
{
early_system_init();
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init);
/*
* Routine: wait_for_command_complete

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@ -130,6 +130,7 @@ config MACH_PIC32
config TARGET_BOSTON
bool "Support Boston"
select DM
imply DM_EVENT
select DM_SERIAL
select MIPS_CM
select SYS_CACHE_SHIFT_6

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@ -7,6 +7,7 @@
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <event.h>
#include <init.h>
#include <malloc.h>
#include <asm/global_data.h>
@ -95,12 +96,13 @@ static void prefetch_init(void)
}
/* arch specific CPU init after DM */
int arch_cpu_init_dm(void)
static int pic32_flash_prefetch(void *ctx, struct event *event)
{
/* flash prefetch */
prefetch_init();
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch);
/* Un-gate DDR2 modules (gated by default) */
static void ddr2_pmd_ungate(void)

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@ -10,6 +10,7 @@
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
#include <event.h>
#include <init.h>
#include <irq_func.h>
#include <asm/cache.h>
@ -63,7 +64,7 @@ static void copy_exception_trampoline(void)
}
#endif
int arch_cpu_init_dm(void)
static int nios_cpu_setup(void *ctx, struct event *event)
{
struct udevice *dev;
int ret;
@ -79,6 +80,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup);
static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
int size)

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@ -7,9 +7,11 @@
#include <cpu.h>
#include <dm.h>
#include <dm/lists.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <asm/encoding.h>
#include <asm/system.h>
#include <dm/uclass-internal.h>
#include <linux/bitops.h>
@ -81,7 +83,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1)
}
#endif
int arch_cpu_init_dm(void)
int riscv_cpu_setup(void *ctx, struct event *event)
{
int ret;
@ -133,6 +135,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup);
int arch_early_init_r(void)
{

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@ -7,6 +7,8 @@
#ifndef __ASM_RISCV_SYSTEM_H
#define __ASM_RISCV_SYSTEM_H
struct event;
/*
* Interrupt configuring macros.
*
@ -14,4 +16,7 @@
*
*/
/* Hook to set up the CPU (called from SPL too) */
int riscv_cpu_setup(void *ctx, struct event *event);
#endif /* __ASM_RISCV_SYSTEM_H */

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@ -11,6 +11,7 @@
#include <spl.h>
#include <asm/global_data.h>
#include <asm/smp.h>
#include <asm/system.h>
DECLARE_GLOBAL_DATA_PTR;
@ -27,7 +28,7 @@ __weak void board_init_f(ulong dummy)
if (ret)
panic("spl_early_init() failed: %d\n", ret);
arch_cpu_init_dm();
riscv_cpu_setup(NULL, NULL);
preloader_console_init();

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@ -8,6 +8,7 @@
#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <pci.h>
@ -44,7 +45,7 @@ static void hsuart_clock_set(void *base)
* Configure the internal clock of both SIO HS-UARTs, if they are enabled
* via FSP
*/
int arch_cpu_init_dm(void)
static int baytrail_uart_init(void *ctx, struct event *event)
{
struct udevice *dev;
void *base;
@ -63,6 +64,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init);
static void set_max_freq(void)
{

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@ -8,6 +8,7 @@
#include <common.h>
#include <dm.h>
#include <cpu.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <asm/cpu.h>
@ -24,7 +25,7 @@
#include <asm/arch/pch.h>
#include <asm/arch/rcb.h>
int arch_cpu_init_dm(void)
static int broadwell_init_cpu(void *ctx, struct event *event)
{
struct udevice *dev;
int ret;
@ -41,6 +42,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu);
void set_max_freq(void)
{

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@ -14,6 +14,7 @@
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
#include <event.h>
#include <fdtdec.h>
#include <init.h>
#include <log.h>
@ -53,7 +54,7 @@ int arch_cpu_init(void)
return x86_cpu_init_f();
}
int arch_cpu_init_dm(void)
static int ivybridge_cpu_init(void *ctx, struct event *ev)
{
struct pci_controller *hose;
struct udevice *bus, *dev;
@ -85,6 +86,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init);
#define PCH_EHCI0_TEMP_BAR0 0xe8000000
#define PCH_EHCI1_TEMP_BAR0 0xe8000400

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@ -5,6 +5,7 @@
#include <common.h>
#include <cpu_func.h>
#include <event.h>
#include <init.h>
#include <mmc.h>
#include <asm/cache.h>
@ -247,7 +248,7 @@ int arch_cpu_init(void)
return 0;
}
int arch_cpu_init_dm(void)
static int quark_init_pcie(void *ctx, struct event *event)
{
/*
* Initialize PCIe controller
@ -262,6 +263,7 @@ int arch_cpu_init_dm(void)
return 0;
}
EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie);
int checkcpu(void)
{

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@ -60,4 +60,12 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash);
typedef asmlinkage int (*fsp_silicon_init_func)(struct fsps_upd *params);
/**
* fsp_setup_pinctrl() - Set up the pinctrl for FSP
*
* @ctx: Event context (not used)
* @event: Event information (not used)
*/
int fsp_setup_pinctrl(void *ctx, struct event *event);
#endif

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@ -9,6 +9,7 @@
#include <bootstage.h>
#include <cbfs.h>
#include <dm.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <spi.h>
@ -18,7 +19,7 @@
#include <dm/uclass-internal.h>
#include <asm/fsp2/fsp_internal.h>
int arch_cpu_init_dm(void)
int fsp_setup_pinctrl(void *ctx, struct event *event)
{
struct udevice *dev;
ofnode node;
@ -41,6 +42,7 @@ int arch_cpu_init_dm(void)
return ret;
}
EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl);
#if !defined(CONFIG_TPL_BUILD)
binman_sym_declare(ulong, intel_fsp_m, image_pos);

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@ -17,6 +17,7 @@
#include <syscon.h>
#include <asm/cpu.h>
#include <asm/cpu_common.h>
#include <asm/fsp2/fsp_api.h>
#include <asm/global_data.h>
#include <asm/mrccache.h>
#include <asm/mtrr.h>
@ -27,7 +28,7 @@
DECLARE_GLOBAL_DATA_PTR;
__weak int arch_cpu_init_dm(void)
__weak int fsp_setup_pinctrl(void *ctx, struct event *event)
{
return 0;
}
@ -89,7 +90,7 @@ static int x86_spl_init(void)
return ret;
}
#ifndef CONFIG_TPL
ret = arch_cpu_init_dm();
ret = fsp_setup_pinctrl(NULL, NULL);
if (ret) {
debug("%s: arch_cpu_init_dm() failed\n", __func__);
return ret;

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@ -19,11 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
__weak int arch_cpu_init_dm(void)
{
return 0;
}
static int x86_tpl_init(void)
{
int ret;
@ -44,11 +39,6 @@ static int x86_tpl_init(void)
debug("%s: arch_cpu_init() failed\n", __func__);
return ret;
}
ret = arch_cpu_init_dm();
if (ret) {
debug("%s: arch_cpu_init_dm() failed\n", __func__);
return ret;
}
preloader_console_init();
return 0;

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@ -803,11 +803,6 @@ __weak int reserve_arch(void)
return 0;
}
__weak int arch_cpu_init_dm(void)
{
return 0;
}
__weak int checkcpu(void)
{
return 0;
@ -848,7 +843,6 @@ static const init_fnc_t init_sequence_f[] = {
arch_cpu_init, /* basic arch cpu dependent setup */
mach_cpu_init, /* SoC/machine dependent CPU setup */
initf_dm,
arch_cpu_init_dm,
#if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f,
#endif

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@ -26,6 +26,7 @@ const char *const type_name[] = {
"test",
/* Events related to driver model */
"dm_post_init",
"dm_pre_probe",
"dm_post_probe",
"dm_pre_remove",

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@ -404,6 +404,11 @@ int dm_init_and_scan(bool pre_reloc_only)
return ret;
}
}
if (CONFIG_IS_ENABLED(DM_EVENT)) {
ret = event_notify_null(EVT_DM_POST_INIT);
if (ret)
return log_msg_ret("ev", ret);
}
return 0;
}

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@ -20,6 +20,7 @@ enum event_t {
EVT_TEST,
/* Events related to driver model */
EVT_DM_POST_INIT,
EVT_DM_PRE_PROBE,
EVT_DM_POST_PROBE,
EVT_DM_PRE_REMOVE,

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@ -45,17 +45,6 @@ void board_init_f(ulong dummy);
*/
int arch_cpu_init(void);
/**
* arch_cpu_init_dm() - init CPU after driver model is available
*
* This is called immediately after driver model is available before
* relocation. This is similar to arch_cpu_init() but is able to reference
* devices
*
* Return: 0 if OK, -ve on error
*/
int arch_cpu_init_dm(void);
/**
* mach_cpu_init() - SoC/machine dependent CPU setup
*