Second set of u-boot-at91 features for the 2024.01 cycle
-----BEGIN PGP SIGNATURE----- iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmU2fxwcHGV1Z2VuLmhy aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyKr+B/42+WkPiAiwt79R6Kh5 UKo404oN1na28D3V12EvikiCH2QWubi38EV7VfcB3jqEpxj4j+rY0cSLZv+u7d4/ bfQN3FPrcTwYnXYLbYkUKC+MAVzGLiVzFBBhIt5cPrT4iVXctwYY6LJ58aX8uRo6 KU6CwXYc3cnmIUqpXE4EYbbQU4TAp55SV2n8QLFFI9DHcy2kELfdrZduFn+Hm9Ij 9sQHH5JxbrGHv5XpcjJkARW3M4K3K4TPzweFGN61VMJwWqzD3L4YPshwIGDfhRui LECKCdr/rWkavumXCfw2pD3RYFTqnqnUzaEN/3ueL9FCJ2uFH1EyaoSuXFEn3+Ul m1LE =CMMd -----END PGP SIGNATURE----- Merge tag 'u-boot-at91-2024.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91 Second set of u-boot-at91 features for the 2024.01 cycle This feature set a new board named Conclusive KSTR sama5d27 with some small prerequisites patches.
This commit is contained in:
Tom Rini
commit
cedc741231
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@ -1234,6 +1234,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
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dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
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at91-sama5d27_wlsom1_ek.dtb
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dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
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at91-kstr-sama5d27.dtb
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dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
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at91-sama5d2_icp.dtb
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42
arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi
Normal file
42
arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi
Normal file
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@ -0,0 +1,42 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* at91-kstr-sama5d27-u-boot.dtsi - Device Tree Include file w/ U-Boot specific
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* properties for Conclusive KSTR-SAMA5D27 board
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*
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* Copyright (C) 2023 Conclusive Engineering Sp. z o. o.
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*
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*/
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/ {
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chosen {
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bootph-all;
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};
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};
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&sdmmc0 {
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bootph-all;
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};
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&uart1 {
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bootph-all;
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};
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&pinctrl_uart1_default {
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bootph-all;
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};
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&pinctrl_macb0_phy_irq {
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bootph-all;
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};
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&pinctrl_macb0_rmii {
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bootph-all;
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};
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&pinctrl_sdmmc0_cmd_dat_default {
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bootph-all;
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};
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&pinctrl_sdmmc0_ck_cd_default {
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bootph-all;
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};
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127
arch/arm/dts/at91-kstr-sama5d27.dts
Normal file
127
arch/arm/dts/at91-kstr-sama5d27.dts
Normal file
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@ -0,0 +1,127 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
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*
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* Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
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*
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*/
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/dts-v1/;
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#include "sama5d2.dtsi"
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#include "sama5d2-pinfunc.h"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/mfd/atmel-flexcom.h>
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/ {
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model = "Conclusive KSTR-SAMA5D27";
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compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
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chosen {
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stdout-path = &uart1;
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};
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aliases {
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i2c2 = &i2c6;
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};
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};
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&main_xtal {
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clock-frequency = <12000000>;
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};
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&sdmmc0 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_default>;
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status = "okay";
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};
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&macb0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
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phy-mode = "rmii";
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status = "okay";
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ethernet-phy@0 {
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reg = <0x0>;
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reset-gpios = <&pioA 44 GPIO_ACTIVE_LOW>;
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};
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};
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&flx4 {
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atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
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status = "okay";
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};
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&i2c6 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx4_i2c>;
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status = "okay";
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eeprom: eeprom@50 {
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compatible = "microchip,24c32", "atmel,24c32";
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reg = <0x50>;
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read-only;
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pagesize = <32>;
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status = "okay";
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};
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};
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&pioA {
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pinctrl {
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pinctrl_uart1_default: uart1_default {
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pinmux = <PIN_PD2__URXD1>,
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<PIN_PD3__UTXD1>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PB13__GPIO>;
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bias-disable;
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};
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pinctrl_macb0_rmii: macb0_rmii {
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pinmux = <PIN_PB14__GTXCK>,
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<PIN_PB15__GTXEN>,
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<PIN_PB16__GRXDV>,
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<PIN_PB17__GRXER>,
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<PIN_PB18__GRX0>,
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<PIN_PB19__GRX1>,
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<PIN_PB20__GTX0>,
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<PIN_PB21__GTX1>,
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<PIN_PB22__GMDC>,
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<PIN_PB23__GMDIO>;
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bias-disable;
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};
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pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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<PIN_PA4__SDMMC0_DAT2>,
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<PIN_PA5__SDMMC0_DAT3>;
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bias-pull-up;
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};
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pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA11__SDMMC0_VDDSEL>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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};
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pinctrl_flx4_i2c: flx4_i2c {
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pinmux = <PIN_PC28__FLEXCOM4_IO0>,
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<PIN_PC29__FLEXCOM4_IO1>;
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bias-disable;
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};
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};
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};
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@ -781,6 +781,26 @@
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status = "disabled";
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};
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flx4: flexcom@fc018000 {
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compatible = "atmel,sama5d2-flexcom";
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reg = <0xfc018000 0x200>;
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clocks = <&flx4_clk>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xfc018000 0x800>;
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status = "disabled";
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i2c6: i2c@600 {
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compatible = "atmel,sama5d2-i2c";
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reg = <0x600 0x200>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&flx4_clk>;
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clock-names = "i2c6_clk";
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status = "disabled";
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};
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};
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aic: interrupt-controller@fc020000 {
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#interrupt-cells = <3>;
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compatible = "atmel,sama5d2-aic";
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@ -204,6 +204,17 @@ config TARGET_SAMA5D27_WLSOM1_EK
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processor-based SAMA5D2 MPU with 2 Gbit LPDDR2-SDRAM
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in a single package.
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config TARGET_KSTR_SAMA5D27
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bool "Conclusive KSTR-SAMA5D27 board"
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select BOARD_EARLY_INIT_F
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select SAMA5D2
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help
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The KSTR-SAMA5D27 embeds SAMA5D27 SoC, together with
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256 MiB SDRAM, 10/100 Mbit/s Ethernet, 96 Mbit/s Wi-Fi b/g/n,
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Bluetooth 4.1 LE, USB OTG controller w/ type-C USB connector
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and stackable GPIO headers in an all-in-one SBC form factor:
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https://conclusive.pl/products/kstr-sama5d27-sbc/
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config TARGET_SAMA5D2_ICP
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bool "SAMA5D2 Industrial Connectivity Platform (ICP)"
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select SAMA5D2
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@ -364,6 +375,7 @@ source "board/atmel/sama5d4_xplained/Kconfig"
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source "board/atmel/sama5d4ek/Kconfig"
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source "board/bluewater/gurnard/Kconfig"
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source "board/calao/usb_a9263/Kconfig"
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source "board/conclusive/kstr-sama5d27/Kconfig"
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source "board/egnite/ethernut5/Kconfig"
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source "board/esd/meesc/Kconfig"
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source "board/gardena/smart-gateway-at91sam/Kconfig"
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15
board/conclusive/kstr-sama5d27/Kconfig
Normal file
15
board/conclusive/kstr-sama5d27/Kconfig
Normal file
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@ -0,0 +1,15 @@
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if TARGET_KSTR_SAMA5D27
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config SYS_BOARD
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default "kstr-sama5d27"
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config SYS_VENDOR
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default "conclusive"
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config SYS_SOC
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default "at91"
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config SYS_CONFIG_NAME
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default "kstr-sama5d27"
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endif
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9
board/conclusive/kstr-sama5d27/MAINTAINERS
Normal file
9
board/conclusive/kstr-sama5d27/MAINTAINERS
Normal file
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@ -0,0 +1,9 @@
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CONCLUSIVE KSTR-SAMA5D27 BOARD
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M: Jakub Klama <jakub@conclusive.pl>
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M: Artur Rojek <artur@conclusive.pl>
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S: Maintained
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F: board/conclusive/kstr-sama5d27
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F: include/configs/kstr-sama5d27.h
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F: configs/kstr_sama5d27_defconfig
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F: arch/arm/dts/at91-kstr-sama5d27.dts
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F: arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi
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5
board/conclusive/kstr-sama5d27/Makefile
Normal file
5
board/conclusive/kstr-sama5d27/Makefile
Normal file
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@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
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obj-y += kstr-sama5d27.o
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239
board/conclusive/kstr-sama5d27/kstr-sama5d27.c
Normal file
239
board/conclusive/kstr-sama5d27/kstr-sama5d27.c
Normal file
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@ -0,0 +1,239 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* kstr-sama5d27.c - Board init file for Conclusive KSTR-SAMA5D27 board
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* Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o.
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <init.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/atmel_pio4.h>
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#include <asm/arch/atmel_mpddrc.h>
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#include <asm/arch/atmel_sdhci.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/sama5d2.h>
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#include <linux/delay.h>
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#ifdef CONFIG_USB_GADGET_ATMEL_USBA
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#include <asm/arch/atmel_usba_udc.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_DEBUG_UART_BOARD_INIT
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static void board_uart1_hw_init(void)
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{
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/* URXD1 */
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atmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, ATMEL_PIO_PUEN_MASK);
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/* UTXD1 */
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atmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0);
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at91_periph_clk_enable(ATMEL_ID_UART1);
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}
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void board_debug_uart_init(void)
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{
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board_uart1_hw_init();
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}
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#endif
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void board_lan8720a_init(void)
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{
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/* LAN8720A_nRST */
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atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 0);
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/*
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* Force 0 on RXER/PHYAD0. LAN8720A chipset will latch with address 0 on
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* MDIO bus.
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*/
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atmel_pio4_set_pio_output(AT91_PIO_PORTB, 17, 0);
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/* Minimal delay of reset signal is 25 ms */
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mdelay(30);
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/* LAN8720A_nRST */
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atmel_pio4_set_pio_output(AT91_PIO_PORTB, 12, 1);
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}
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void board_usba_init(void)
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{
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#ifdef CONFIG_USB_GADGET_ATMEL_USBA
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/* USB device peripheral initialization: sama5d2_devices.c */
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at91_udp_hw_init();
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/* USB device controller drivers/usb/gadget/atmel_usba_udc.c */
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usba_udc_probe(&pdata);
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#endif
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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#ifdef CONFIG_DEBUG_UART
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debug_uart_init();
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#endif
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return 0;
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}
|
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#endif
|
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|
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int ft_board_setup(void *blob, struct bd_info *bd)
|
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{
|
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char *wlanaddr = env_get("eth1addr");
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if (wlanaddr)
|
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do_fixup_by_compat(blob, "brcm,bcm4329-fmac", "local-mac-address",
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wlanaddr, strlen(wlanaddr), 1);
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else
|
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printf("Not setting WIFI mac address. Check if EEPROM TLV is correctly set up.\n");
|
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|
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return 0;
|
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}
|
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|
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int board_init(void)
|
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{
|
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/* address of boot parameters */
|
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gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
|
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|
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board_usba_init();
|
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board_lan8720a_init();
|
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|
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return 0;
|
||||
}
|
||||
|
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static int settings_r(void)
|
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{
|
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mac_read_from_eeprom();
|
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serial_read_from_eeprom(0);
|
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|
||||
return 0;
|
||||
}
|
||||
EVENT_SPY_SIMPLE(EVT_SETTINGS_R, settings_r);
|
||||
|
||||
#if defined(CONFIG_DISPLAY_BOARDINFO_LATE)
|
||||
int checkboard(void)
|
||||
{
|
||||
const char *serial_number;
|
||||
|
||||
serial_number = env_get("serial#");
|
||||
if (!serial_number)
|
||||
printf("Warning: unknown serial number.\n");
|
||||
else
|
||||
printf("S/N: %s\n", serial_number);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MISC_INIT_R
|
||||
int misc_init_r(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
|
||||
CFG_SYS_SDRAM_SIZE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* SPL */
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
void spl_board_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
|
||||
{
|
||||
ddrc->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
|
||||
|
||||
ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
|
||||
ATMEL_MPDDRC_CR_NR_ROW_13 |
|
||||
ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
|
||||
ATMEL_MPDDRC_CR_DIC_DS |
|
||||
ATMEL_MPDDRC_CR_ZQ_LONG |
|
||||
ATMEL_MPDDRC_CR_NB_8BANKS |
|
||||
ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
|
||||
ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
|
||||
|
||||
ddrc->rtr = 0x511;
|
||||
|
||||
ddrc->tpr0 = ((7 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
|
||||
(3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
|
||||
(3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
|
||||
(9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
|
||||
(3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
|
||||
(4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
|
||||
(4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
|
||||
(2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
|
||||
|
||||
ddrc->tpr1 = ((22 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
|
||||
(23 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
|
||||
(200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
|
||||
(3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
|
||||
|
||||
ddrc->tpr2 = ((2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
|
||||
(8 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
|
||||
(4 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
|
||||
(4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
|
||||
(8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
|
||||
}
|
||||
|
||||
void mem_init(void)
|
||||
{
|
||||
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
|
||||
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
|
||||
struct atmel_mpddrc_config ddrc_config;
|
||||
u32 reg;
|
||||
|
||||
ddrc_conf(&ddrc_config);
|
||||
|
||||
at91_periph_clk_enable(ATMEL_ID_MPDDRC);
|
||||
writel(AT91_PMC_DDR, &pmc->scer);
|
||||
|
||||
reg = readl(&mpddrc->io_calibr);
|
||||
reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
|
||||
reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
|
||||
reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
|
||||
reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(101);
|
||||
writel(reg, &mpddrc->io_calibr);
|
||||
|
||||
writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE,
|
||||
&mpddrc->rd_data_path);
|
||||
|
||||
ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
|
||||
|
||||
writel(0x3, &mpddrc->cal_mr4);
|
||||
writel(64, &mpddrc->tim_cal);
|
||||
}
|
||||
|
||||
void at91_pmc_init(void)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
/*
|
||||
* While coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz,
|
||||
* so we need to slow down and configure MCKR accordingly.
|
||||
* This is why we have a special flavor of the switching function.
|
||||
*/
|
||||
tmp = AT91_PMC_MCKR_PLLADIV_2 |
|
||||
AT91_PMC_MCKR_MDIV_3 |
|
||||
AT91_PMC_MCKR_CSS_MAIN;
|
||||
at91_mck_init_down(tmp);
|
||||
|
||||
tmp = AT91_PMC_PLLAR_29 |
|
||||
AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
|
||||
AT91_PMC_PLLXR_MUL(40) |
|
||||
AT91_PMC_PLLXR_DIV(1);
|
||||
at91_plla_init(tmp);
|
||||
|
||||
tmp = AT91_PMC_MCKR_H32MXDIV |
|
||||
AT91_PMC_MCKR_PLLADIV_2 |
|
||||
AT91_PMC_MCKR_MDIV_3 |
|
||||
AT91_PMC_MCKR_CSS_PLLA;
|
||||
at91_mck_init(tmp);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1088,19 +1088,7 @@ int mac_read_from_eeprom(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* populate_serial_number - read the serial number from EEPROM
|
||||
*
|
||||
* This function reads the serial number from the EEPROM and sets the
|
||||
* appropriate environment variable.
|
||||
*
|
||||
* The environment variable is only set if it has not been set
|
||||
* already. This ensures that any user-saved variables are never
|
||||
* overwritten.
|
||||
*
|
||||
* This function must be called after relocation.
|
||||
*/
|
||||
int populate_serial_number(int devnum)
|
||||
int serial_read_from_eeprom(int devnum)
|
||||
{
|
||||
char serialstr[257];
|
||||
int eeprom_index;
|
||||
|
|
|
|||
|
|
@ -693,6 +693,7 @@ static init_fnc_t init_sequence_r[] = {
|
|||
#if defined(CONFIG_ID_EEPROM)
|
||||
mac_read_from_eeprom,
|
||||
#endif
|
||||
INITCALL_EVENT(EVT_SETTINGS_R),
|
||||
INIT_FUNC_WATCHDOG_RESET
|
||||
#if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -37,6 +37,7 @@ const char *const type_name[] = {
|
|||
/* init hooks */
|
||||
"misc_init_f",
|
||||
"fsp_init_r",
|
||||
"settings_r",
|
||||
"last_stage_init",
|
||||
|
||||
/* Fpga load hook */
|
||||
|
|
|
|||
73
configs/kstr_sama5d27_defconfig
Normal file
73
configs/kstr_sama5d27_defconfig
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_TEXT_BASE=0x26f00000
|
||||
CONFIG_TARGET_KSTR_SAMA5D27=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="at91-kstr-sama5d27"
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SYS_MONITOR_LEN=524288
|
||||
CONFIG_SYS_LOAD_ADDR=0x24000000
|
||||
CONFIG_FIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_SD_BOOT=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
|
||||
# CONFIG_USE_BOOTCOMMAND is not set
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_MISC_INIT_R=y
|
||||
CONFIG_CMD_TLV_EEPROM=y
|
||||
CONFIG_CMD_DM=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_FAT=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_CLK_AT91=y
|
||||
CONFIG_AT91_UTMI=y
|
||||
CONFIG_AT91_H32MX=y
|
||||
CONFIG_AT91_GENERIC_CLK=y
|
||||
CONFIG_ATMEL_PIO4=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_AT91=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_MICROCHIP_FLEXCOM=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_ATMEL=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_AT91PIO4=y
|
||||
CONFIG_RESET_AT91=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_ATMEL_USART=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SYSRESET_AT91=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_OPTEE=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_ATMEL_PIT_TIMER=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x16c0
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x03e9
|
||||
CONFIG_USB_GADGET_ATMEL_USBA=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
15
include/configs/kstr-sama5d27.h
Normal file
15
include/configs/kstr-sama5d27.h
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include "at91-sama5_common.h"
|
||||
|
||||
/* SDRAM */
|
||||
#define CFG_SYS_SDRAM_BASE 0x20000000
|
||||
#define CFG_SYS_SDRAM_SIZE 0x10000000
|
||||
|
||||
#endif
|
||||
|
|
@ -104,6 +104,15 @@ enum event_t {
|
|||
*/
|
||||
EVT_FSP_INIT_F,
|
||||
|
||||
/**
|
||||
* @EVT_SETTINGS_R:
|
||||
* This event is triggered post-relocation and before console init.
|
||||
* This gives an option to perform any platform-dependent setup, which
|
||||
* needs to take place before show_board_info() (e.g. readout of EEPROM
|
||||
* stored settings).
|
||||
*/
|
||||
EVT_SETTINGS_R,
|
||||
|
||||
/**
|
||||
* @EVT_LAST_STAGE_INIT:
|
||||
* This event is triggered just before jumping to the main loop.
|
||||
|
|
|
|||
|
|
@ -271,6 +271,20 @@ void board_init_r(struct global_data *id, ulong dest_addr)
|
|||
|
||||
int cpu_init_r(void);
|
||||
int mac_read_from_eeprom(void);
|
||||
|
||||
/**
|
||||
* serial_read_from_eeprom - read the serial number from EEPROM
|
||||
*
|
||||
* This function reads the serial number from the EEPROM and sets the
|
||||
* appropriate environment variable.
|
||||
*
|
||||
* The environment variable is only set if it has not been set
|
||||
* already. This ensures that any user-saved variables are never
|
||||
* overwritten.
|
||||
*
|
||||
* This function must be called after relocation.
|
||||
*/
|
||||
int serial_read_from_eeprom(int devnum);
|
||||
int set_cpu_clk_info(void);
|
||||
int update_flash_size(int flash_size);
|
||||
int arch_early_init_r(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user