Commit Graph

73243 Commits

Author SHA1 Message Date
Tom Rini
da29243251 Merge branch '2021-06-08-display-and-logging-updates' into next
To quote Simon, first for the display changes:
At present we have two ways of showing a hex dump. Once has been in
U-Boot since the dawn of time and the other was recently added from
Linux.

They both have their own unique features.

This series makes a few changes to bring them closer together. It also
adds support for logging a buffer, which is useful since it can put it
through the same log drivers as other logging output.

Also it adds tests, so we can check the behaviour.

And then the logging changes:
At present when logging is not enabled, all log() calls become nops.
This does not seem right, since if the log level is high enough then
there should be some sort of message. So in that case, this series
updates it to print the message if the log level is above LOGL_INFO.

This mimics the behaviour for the log_...() macros like log_debug() and
log_info(), so we can drop the special case for these.

Also the current implementation does not support multiple log calls on
the same line nicely. The tags are repeated so the line is very hard to
read.  This series adds that as a new feature.
2021-06-08 17:18:35 -04:00
Simon Glass
e1cbd916c8 log: Convert log values to printf() if not enabled
At present if logging not enabled, log_info() becomes a nop. But we want
log output at the 'info' level to be akin to printf(). Update the macro to
pass the output straight to printf() in this case.

This mimics the behaviour for the log_...() macros like log_debug() and
log_info(), so we can drop the special case for these.

Add new tests to cover this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
8d9bb98f86 sandbox: log: Avoid build error with !CONFIG_LOG
The pr_cont_test.c test requires CONFIG_LOG since it directly accesses
fields in global_data that require it. Move the test into the CONFIG_LOG
condition to avoid build errors.

Enable CONFIG_LOG on sandbox (not sandbox_spl, etc.) so that we still run
this test. This requires resyncing of the configs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
58b4b7133a log: Add support for logging a buffer
The print_buffer() function is very useful for debugging. Add a version
of this in the log system also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
0cceb99ac5 display_options: Split print_buffer() into two functions
At present print_buffer() outputs a hex dump but it is not possible to
place this dump in a string. Refactor it into a top-level function which
does the printing and a utility function that dumps a line into a string.
This makes the code more generally useful.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
735dd6ef89 hexdump: Allow ctrl-c to interrupt output
If a long hexdump is initated the user may wish to interrupt it. Add
support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
5d6d2b8838 hexdump: Support any rowsize
At present print_hex_dump() only supports either 16- or 32-byte lines.
With U-Boot we want to support any line length up to a maximum of 64.
Update the function to support this, with 0 defaulting to 16, as with
print_buffer().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
19edf139e9 hexdump: Add support for sandbox
The current implementation outputs an address as a pointer. Update the
code to use an address instead, respecting the 32/64 nature of the CPU.

Add some initial tests copied from print_test_display_buffer(), just the
ones that can pass with the current implementation.

Note that for this case print_hex_dump() and print_bufffer() produce the
same result. For now the tests are duplicated sine we have separate
functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
2f410fe557 hexdump: Move API to header file
Move the comments to the header file so people can find the function info
without digging in the implementation. Fix up the code style and add an
enum for the first arg.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
c7b16d830e display_options: Drop two spaces before the ASCII column
At present with print_buffer() U-Boot shows four spaces between the hex
and ASCII data. Two seems enough and matches print_hex_dump(). Change it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
c614ddf28b test: Add a test for print_buffer()
Add a test for this function, to cover the various features. Expand the
expect_str length to take acount of the ~300-bytes lines generated in one
case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
fbb99dcec0 test: Convert print tests to use ut framework
This test predates the test framework in U-Boot. It uses #define DEBUG and
assert() to check the result. Update it to use the framework so it can
report failure constitent with other tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
090d664eac test: Detect when expect_str is too small
If a line of more than 256 bytes is generated, the test will fail but the
reason is not clear. Add a check for this condition and print a helpful
message.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Simon Glass
c1a2bb4f83 console: Report an error when output buffer is exhausted
If the console output buffer is exhausted, characters are silently dropped
from the end. Detect this condition and report an error when reading back
the characters.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-06-08 11:39:09 -04:00
Tom Rini
24e1e8841c Merge branch '2021-06-07-arm-cache-cp15-improvements' into next
To quote the series author, Patrick Delaunay:

On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
protected by a firewall. This region is reserved in the device with
the "no-map" property as defined in the binding file
doc/device-tree-bindings/reserved-memory/reserved-memory.txt.

Sometime the platform boot failed in U-Boot on a Cortex A7 access to
this region (depending of the binary and the issue can change with compiler
version or with code alignment), then the firewall raise an error,
for example:

E/TC:0   tzc_it_handler:19 TZC permission failure
E/TC:0   dump_fail_filter:420 Permission violation on filter 0
E/TC:0   dump_fail_filter:425 Violation @0xde5c6bf0, non-secure privileged read,
         AXI ID 5c0
E/TC:0   Panic

After investigation, the forbidden access is a speculative request performed
by the Cortex A7 because all the DDR is mapped as MEMORY with CACHEABLE
property.

The issue is solved only when the region reserved by OP-TEE is no more
mapped in U-Boot as it is already done in Linux kernel.

Tested on DK2 board with OP-TEE 3.12 / TF-A 2.4:

With hard-coded address for OP-TEE reserved memory,
the error doesn't occur.

 void dram_bank_mmu_setup(int bank)
 {
 ....

    	for (i = start >> MMU_SECTION_SHIFT;
 	     i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
 	     i++) {
 		option = DCACHE_DEFAULT_OPTION;
 		if (i >= 0xde0)
 			option = INVALID_ENTRY;
 		set_section_dcache(i, option);
 	}
 }

Just by modifying the test on 0xde0 to 0xdf0, the OP-TEE memory protected
by firewall is mapped cacheable and the error occurs.

I think that it can be a general issue for ARM architecture: the "no-map" tag
of reserved memory in device should be respected by U-Boot if firewall
is configured before U-Boot execution.

But I don't propose a generic solution in
arm/lib/cache-cp15.c:dram_bank_mmu_setup()
because the device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache.
2021-06-07 19:12:04 -04:00
Patrick Delaunay
ade4e0428f stm32mp: don't map the reserved region with no-map property
No more map the reserved region with "no-map" property by marking
the corresponding TLB entries with invalid entry (=0) to avoid
speculative access.

The device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache, so it is called in
enable_caches() before to disable it.

This patch fixes an issue where predictive read access on secure DDR
OP-TEE reserved area are caught by firewall.

  Series-cc: marex
  Series-cc: pch
  Series-cc: marek.bykowski@gmail.com
  Series-cc: Ard Biesheuvel <ardb@kernel.org>
  Series-cc: Etienne Carriere <etienne.carriere@linaro.org>

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
7dc6068fc1 stm32mp: Increase the reserved memory in board_get_usable_ram_top
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...)
mapped cacheable before relocation.

Without this patch the device tree, located before the MALLOC area
is not tagged cacheable just after relocation, before mmu reconfiguration.

This patch reduces the duration for device tree parsing in
lmb_init_and_reserve.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
f46959cef4 image-fdt: save no-map parameter of reserve-memory
Save the 'no-map' information present in 'reserved-memory' node to allow
correct handling when the MMU is configured in board to avoid
speculative access.

This binding is defined in
doc/device-tree-bindings/reserved-memory/reserved-memory.txt

Additional properties:
...
no-map (optional) - empty property
    - Indicates the operating system must not create a virtual mapping
      of the region as part of its standard mapping of system memory,
      nor permit speculative access to it under any circumstances other
      than under the control of the device driver using the region.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
7d08a3dd02 test: lmb: add test for lmb_reserve_flags
Add a test to check the management of reserved region with flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
358c7789af lmb: add lmb_dump_region() function
Add lmb_dump_region() function, to simplify lmb_dump_all_force().
This patch is based on Linux memblock dump function.

An example of bdinfo output is:

.....
fdt_size    = 0x000146a0
FB base     = 0xfdd00000
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]	[0xc0000000-0xffffffff], 0x40000000 bytes flags: 0
 reserved.cnt  = 0x6
 reserved[0]	[0x10000000-0x10045fff], 0x00046000 bytes flags: 4
 reserved[1]	[0x30000000-0x3003ffff], 0x00040000 bytes flags: 4
 reserved[2]	[0x38000000-0x3800ffff], 0x00010000 bytes flags: 4
 reserved[3]	[0xe8000000-0xefffffff], 0x08000000 bytes flags: 4
 reserved[4]	[0xfbaea344-0xfdffffff], 0x02515cbc bytes flags: 0
 reserved[5]	[0xfe000000-0xffffffff], 0x02000000 bytes flags: 4
arch_number = 0x00000000
TLB addr    = 0xfdff0000
....

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
e359a4a5c1 lmb: add lmb_is_reserved_flags
Add a new function lmb_is_reserved_flags to check if
an address is reserved with a specific flags.

This function can be used to check if an address was
reserved with no-map flags with:

lmb_is_reserved_flags(lmb, addr, LMB_NOMAP);

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07 10:48:40 -04:00
Patrick Delaunay
59c0ea5df3 lmb: Add support of flags for no-map properties
Add "flags" in lmb_property to save the "no-map" property of
reserved region and a new function lmb_reserve_flags() to check
this flag.

The default allocation use flags = LMB_NONE.

The adjacent reserved memory region are merged only when they have
the same flags value.

This patch is partially based on flags support done in Linux kernel
mm/memblock .c (previously lmb.c); it is why LMB_NOMAP = 0x4, it is
aligned with MEMBLOCK_NOMAP value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-07 10:48:40 -04:00
Tom Rini
e3b64beda5 Prepare v2021.07-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07 09:26:39 -04:00
Tom Rini
80da2453e1 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-07 08:09:35 -04:00
Tom Rini
18dd72ad47 Merge tag 'u-boot-rockchip-20210606' of https://source.denx.de/u-boot/custodians/u-boot-rockchip 2021-06-07 07:22:14 -04:00
Tom Rini
281e95c40f Minor fixes for sandbox and handling of dm-ranges
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Merge tag 'dm-pull-6jun21' of https://source.denx.de/u-boot/custodians/u-boot-dm

Minor fixes for sandbox and handling of dm-ranges
2021-06-06 13:00:23 -04:00
Tom Rini
0c4e63a487 - disable legacy video for brxre1, mx28evk, pico-imx6ul,
pxm2 and rut boards after DM_VIDEO conversion deadline
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Merge tag 'video-for-2021-07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-video

 - disable legacy video for brxre1, mx28evk, pico-imx6ul,
   pxm2 and rut boards after DM_VIDEO conversion deadline
2021-06-05 11:17:55 -04:00
Patrick Delaunay
269fa8468d test: add dm_test_read_resource
Add a test of dev_read_resource with translation or without translation

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Patrick Delaunay
0d1ab576f2 net: luton: remove address translation after ofnode_read_resource
Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c ("dm: core: Add address translation in
fdt_get_resource").

Fixes: feb7ac457c ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-05 07:35:47 -06:00
Alper Nebi Yasak
ca2f948a4b pwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"
With commit 41575d8e4c ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.

Fixes: 1b9ee2882e ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Heinrich Schuchardt
205b9f5100 sandbox: correct determination of the text base
os_find_text_base() assumes that first line of /proc/self/maps holds
information about the text. Hence we must call the function before calling
os_malloc() which calls mmap(0x10000000,).

Failure to do so has led to incorrect values for pc_reloc when an
exception was reported

    => exception undefined

    Illegal instruction
    pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c

as well as incorrect output of the bdinfo command

    => bdinfo
    relocaddr   = 0x0000000007858000
    reloc off   = 0x0000000010000000

Fixes: b308d9fd18 ("sandbox: Avoid using malloc() for system state")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:47 -06:00
Bin Meng
0e35b937b9 of: addr: Remove call to dev_count_cells() in of_get_address()
In of_get_address(), there is:

  dev_count_cells(dev, &na, &ns);

followed by:

  bus->count_cells(dev, &na, &ns);

but no codes in between use na/ns, hence the first call is useless.
By dropping the first call, dev_count_cells() is now useless too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:34 -06:00
Bin Meng
139eaa7a2b of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'
'dma-ranges' frequently exists without parent nodes having 'dma-ranges'.
While this is an error for 'ranges', this is fine because DMA capable
devices always have a translatable DMA address. Also, with no
'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with
no restrictions unless perhaps the device itself has implicit
restrictions.

This keeps in sync with Linux kernel commit:

  81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05 07:35:34 -06:00
Anatolij Gustschin
0df6e66c99 pico-imx6ul: disable video after DM_VIDEO conversion deadline
These boards were not converted to DM_VIDEO before deadline,
so disable video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Fabio Estevam <festevam@gmail.com>
2021-06-05 10:53:25 +02:00
Anatolij Gustschin
ac36dc7d19 brxre1: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2021-06-05 10:40:47 +02:00
Anatolij Gustschin
bbc14b43de mx28evk: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
2021-06-05 10:39:18 +02:00
Anatolij Gustschin
a0195e980b siemens: pxm2: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-06-05 10:38:00 +02:00
Anatolij Gustschin
bf5d1244e6 siemens: rut: disable video after DM_VIDEO conversion deadline
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2021-06-05 10:36:40 +02:00
Tom Rini
c003d2cd6b Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: a37xx: PCI related enhancements and fixes (Pali)
- mvebu: turris_omnia: Board specific updates, e.g. rescue
  boot cmd etc (Marek)
2021-06-04 09:34:21 -04:00
Marek Behún
176c3e7760 arm: mvebu: turris_omnia: support invoking rescue boot from console
Make it possible to invoke rescue boot from U-Boot console, without
having to press the factory reset button. This is needed when accessing
the device remotely, for example.

Achieve this by putting rescue command into `bootcmd_rescue` default
environment variable and setting some distroboot environment variables
to their default values when the factory button is pressed.

Rescue boot from console can be invoked by running
  run bootcmd_rescue

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Marek Behún
0b5bb36d13 arm: mvebu: turris_omnia: update rescue mode boot command
Update rescue mode boot command on Turris Omnia. We are compressing the
image with lzma now.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
b321722f22 arm: a37xx: pci: Fix configuring PCIe resources
The `ranges` DT property of the PCIe node is currently ignored by
Aardvark driver - all entries are used as transparent PCIe MEM, despite
some of them being defined for IO in DT.

This is because the driver does not setup PCIe outbound windows and thus
a default configuration is used.

This can cause an external abort on CPU when a device driver tries to
access non-MEM space.

Setup the PCIe windows according to the `ranges` property for all
non-MEM resources (currently only IO) and also non-transparent MEM
resources.

Because Linux expects that bootloader does not setup Aardvark PCIe
windows, disable them before booting Linux.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
079b35a261 arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
CPU window for PCIe, and since IO port space is only 64 KiB in total,
use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
PCIe MEM.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
4a82fca8e3 arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function
Current version of this function uses a lot of incorrect assumptions about
the `ranges` DT property:

 * parent(#address-cells) == 2
 * #size-cells == 2
 * number of entries == 2
 * address size of first entry == 0x1000000
 * second child address entry == base + 0x1000000

Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap
with PCIe IO space, and trying to define additional MEM space (as a third
entry in the `ranges` DT property) causes U-Boot to crash when booting the
kernel.

  ## Flattened Device Tree blob at 04f00000
     Booting using the fdt blob at 0x4f00000
     Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK
  ERROR: board-specific fdt fixup failed: <unknown error>
   - must RESET the board to recover.

Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses
in the `ranges` property according to
https://elinux.org/Device_Tree_Usage#PCI_Address_Translation

Now it is possible to increase PCIe MEM space from 16 MiB to maximal value
of 127 MiB.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Fixes: cb2ddb291e ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions")
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
46b679e3ec arm: a37xx: pci: Find PCIe controller node by compatible instead of path
Find PCIe DT node by compatible string instead of retrieving it by using
hardcoded DT path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
a544d65f1d arm: a37xx: pci: Fix DT compatible string to Linux' DT compatible
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie'
to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible
with Linux' DT node.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
7b85aefd4b arm: a37xx: pci: Disable bus mastering when unloading driver
Disable Root Bridge I/O space, memory space and bus mastering in Aardvark's
remove method, which is called before booting Linux kernel.

This ensures that PCIe device which was initialized and used by U-Boot
cannot do new DMA transfers until Linux initializes PCI subsystem and loads
appropriate drivers for the device.

During initialization of PCI subsystem Linux in fact disables this bus
mastering on Root Bridge (and later enables it when driver is loaded and
configured), but there is a possibility of a small window after U-Boot
boots Linux when bus mastering is enabled, which is not correct.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Pali Rohár
127dbec39a arm: a37xx: pci: Don't put link into LTSSM Recovery state during probe
During our debugging of the Aardvark driver in Linux we have discovered
that the PCIE_CORE_LINK_CTRL_STAT_REG register in fact controls standard
PCIe Link Control Register for PCIe Root Bridge. This led us to discover
that the name of the PCIE_CORE_LINK_TRAINING macro and the corresponding
comment by this macro's usage is misleading; this bit in fact controls
Retrain Link, which, according to PCIe base spec is defined as:

  A write of 1b to this bit initiates Link retraining by directing the
  Physical Layer LTSSM to the Recovery state. If the LTSSM is already in
  Recovery or Configuration, re-entering Recovery is permitted but not
  required.

Entering Recovery state is normally done from LTSSM L0, L0s and L1 states.
But since the pci-aardvark.c driver enables Link Training just a few lines
above, the controller is not in L0 ready state yet. So setting aardvark bit
PCIE_CORE_LINK_TRAINING does not actually enter Recovery state at this
place.

Moreover, trying to enter LTSSM Recovery state without other configuration
is causing issues for some cards (e.g. Atheros AR9xxx and QCA9xxx). Since
Recovery state is not entered, these issues are not triggered.

Remove code which tries to enter LTSSM Recovery state completely.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04 11:32:41 +02:00
Sean Anderson
89be8e31cc fastboot: Fix overflow when calculating chunk size
If a chunk was larger than 4GiB, then chunk_data_sz would overflow and
blkcnt would not be calculated correctly. Upgrade it to a u64 and cast
its multiplicands as well. Also fix bytes_written while we're at it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-06-01 16:48:54 -04:00
Kever Yang
87f9c08d84 MAINTAINERS: Update maintainer's mail address
Philipp has change the mail and the legacy one is not available, update it
to the new one.

CC: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-01 19:57:02 +08:00