5b05266928
Enable OF_UPSTREAM for AM64-EVM and SK-AM64 boards. Remove DT files that are now available in dts/upstream. Update the appended files based on version of latest OF_UPSTREAM sync point (v6.7-rc7). Signed-off-by: Andrew Davis <afd@ti.com>
104 lines
2.3 KiB
Plaintext
104 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am642-evm.dts"
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#include "k3-am64-evm-ddr4-1600MTs.dtsi"
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#include "k3-am64-ddr.dtsi"
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#include "k3-am642-evm-u-boot.dtsi"
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/ {
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aliases {
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remoteproc0 = &sysctrler;
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remoteproc1 = &a53_0;
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};
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a53_0: a53@0 {
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compatible = "ti,am654-rproc";
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reg = <0x00 0x00a90000 0x00 0x10>;
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power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
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resets = <&k3_reset 135 0>;
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clocks = <&k3_clks 61 0>;
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assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
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assigned-clock-parents = <&k3_clks 61 2>;
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assigned-clock-rates = <200000000>, <1000000000>;
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ti,sci = <&dmsc>;
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ti,sci-proc-id = <32>;
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ti,sci-host-id = <10>;
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bootph-pre-ram;
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};
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clk_200mhz: dummy-clock-200mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <200000000>;
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bootph-pre-ram;
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};
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};
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&cbass_main {
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sysctrler: sysctrler {
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compatible = "ti,am654-system-controller";
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mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
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mbox-names = "tx", "rx";
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bootph-pre-ram;
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};
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};
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&dmsc {
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mboxes= <&secure_proxy_main 0>,
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<&secure_proxy_main 1>,
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<&secure_proxy_main 0>;
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mbox-names = "rx", "tx", "notify";
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ti,host-id = <35>;
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ti,secure-host;
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};
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&memorycontroller {
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vtt-supply = <&vtt_supply>;
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};
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&sdhci0 {
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clocks = <&clk_200mhz>;
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clock-names = "clk_xin";
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};
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&sdhci1 {
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clocks = <&clk_200mhz>;
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clock-names = "clk_xin";
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};
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/* UART is initialized before SYSFW is started
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* so we can't do any power-domain/clock operations.
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* Delete clock/power-domain properties to avoid
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* UART init failure
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*/
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&main_uart0 {
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/delete-property/ power-domains;
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/delete-property/ clocks;
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/delete-property/ clock-names;
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};
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/* timer init is called as part of rproc_start() while
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* starting System Firmware, so any clock/power-domain
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* operations will fail as SYSFW is not yet up and running.
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* Delete all clock/power-domain properties to avoid
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* timer init failure.
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* This is an always on timer at 20MHz.
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*/
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&main_timer0 {
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/delete-property/ clocks;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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/delete-property/ power-domains;
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};
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&ospi0 {
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reg = <0x00 0x0fc40000 0x00 0x100>,
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<0x00 0x60000000 0x00 0x8000000>;
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};
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