174d728471
Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
41 lines
590 B
Plaintext
41 lines
590 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Xilinx ZynqMP Mini Configuration
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*
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* (C) Copyright 2017, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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/dts-v1/;
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/ {
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model = "ZynqMP MINI";
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compatible = "xlnx,zynqmp";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &dcc;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
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};
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dcc: dcc {
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compatible = "arm,dcc";
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status = "disabled";
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bootph-all;
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};
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};
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&dcc {
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status = "okay";
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};
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