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u-boot/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso
Michal Simek 4626039c94 arm64: xilinx: Remove multiple blank lines from DTSes 
There is no reason to have multiple blank lines in DTS files that's why
remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6aaa9fa91c88ca3d3e5645d66a795ec09b8cec61.1704708642.git.michal.simek@amd.com
2024-01-10 09:17:41 +01:00

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// SPDX-License-Identifier: GPL-2.0
/*
* dts file for Xilinx ZynqMP VPK180 revA
*
* (C) Copyright 2021 - 2022, Xilinx, Inc.
* (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
#include <dt-bindings/gpio/gpio.h>
/dts-v1/;
/plugin/;
&{/} {
compatible = "xlnx,zynqmp-sc-vpk180-revB", "xlnx,zynqmp-vpk180-revB",
"xlnx,zynqmp-vpk180", "xlnx,zynqmp";
vc7_xin: vc7-xin {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <50000000>;
};
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
tca6416_u233: gpio@20 { /* u233 */
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller; /* interrupt not connected */
#gpio-cells = <2>;
gpio-line-names = "QSFPDD1_MODSELL", "QSFPDD2_MODSELL", "QSFPDD3_MODSELL", "QSFPDD4_MODSELL", /* 0 - 3 */
"PMBUS2_INA226_ALERT", "QSFPDD5_MODSELL", "QSFPDD6_MODSELL", "", /* 4 - 7 */
"FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "UTIL_3V3_VRHOT_B", /* 10 - 13 */
"VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */
};
i2c-mux@74 { /* u33 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
/* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
pmbus_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* On connector J325 */
ir38060_41: regulator@41 { /* IR38060 - u259 */
compatible = "infineon,ir38060", "infineon,ir38064";
reg = <0x41>; /* i2c addr 0x11 */
};
ir35221_45: pmic@45 { /* IR35221 - u291 */
compatible = "infineon,ir35221";
reg = <0x45>; /* i2c addr - 0x15 */
};
ir35221_46: pmic@46 { /* IR35221 - u152 */
compatible = "infineon,ir35221";
reg = <0x46>; /* i2c addr - 0x16 */
};
irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */
compatible = "infineon,irps5401";
reg = <0x47>; /* i2c addr 0x17 */
};
irps5401_48: pmic@48 { /* IRPS5401 - u295 */
compatible = "infineon,irps5401";
reg = <0x48>; /* i2c addr 0x18 */
};
ir38164_49: regulator@49 { /* IR38164 - u189 */
compatible = "infineon,ir38164";
reg = <0x49>; /* i2c addr 0x19 */
};
irps5401_4c: pmic@4c { /* IRPS5401 - u167 */
compatible = "infineon,irps5401";
reg = <0x4c>; /* i2c addr 0x1c */
};
irps5401_4d: pmic@4d { /* IRPS5401 - u175 */
compatible = "infineon,irps5401";
reg = <0x4d>; /* i2c addr 0x1d */
};
ir38164_4e: regulator@4e { /* IR38164 - u185 */
compatible = "infineon,ir38164";
reg = <0x4e>; /* i2c addr 0x1e */
};
ir38164_4f: regulator@4f { /* IR38164 - u187 */
compatible = "infineon,ir38164";
reg = <0x4f>; /* i2c addr 0x1f */
};
};
pmbus1_ina226_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* FIXME check alerts coming to SC */
vccint: ina226@40 { /* u65 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <5000>; /* r440 */
};
vcc_soc: ina226@41 { /* u161 */
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>; /* r2174 */
};
vcc_pmc: ina226@42 { /* u163 */
compatible = "ti,ina226";
reg = <0x42>;
shunt-resistor = <5000>; /* r1214 */
};
vcc_ram: ina226@43 { /* u5 */
compatible = "ti,ina226";
reg = <0x43>;
shunt-resistor = <5000>; /* r2108 */
};
vcc_pslp: ina226@44 { /* u165 */
compatible = "ti,ina226";
reg = <0x44>;
shunt-resistor = <5000>; /* r1830 */
};
vcc_psfp: ina226@45 { /* u164 */
compatible = "ti,ina226";
reg = <0x45>;
shunt-resistor = <5000>; /* r2086 */
};
};
i2c@2 { /* NC */ /* FIXME maybe remove */
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
pmbus2_ina226_i2c: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* FIXME check alerts coming to SC */
vccaux: ina226@40 { /* u166 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <2000>; /* r2109 */
};
vccaux_pmc: ina226@41 { /* u168 */
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>; /* r1246 */
};
mgtavcc: ina226@42 { /* u265 */
compatible = "ti,ina226";
reg = <0x42>;
shunt-resistor = <5000>; /* r1829 */
};
vcc1v5: ina226@43 { /* u264 */
compatible = "ti,ina226";
reg = <0x43>;
shunt-resistor = <5000>; /* r1221 */
};
vcco_mio: ina226@45 { /* u172 */
compatible = "ti,ina226";
reg = <0x45>;
shunt-resistor = <5000>; /* r1219 */
};
mgtavtt: ina226@46 { /* u188 */
compatible = "ti,ina226";
reg = <0x46>;
shunt-resistor = <2000>; /* r1384 */
};
vcco_502: ina226@47 { /* u174 */
compatible = "ti,ina226";
reg = <0x47>;
shunt-resistor = <5000>; /* r1825 */
};
mgtvccaux: ina226@48 { /* u176 */
compatible = "ti,ina226";
reg = <0x48>;
shunt-resistor = <5000>; /* r1232 */
};
vcc1v1_lp4: ina226@49 { /* u186 */
compatible = "ti,ina226";
reg = <0x49>;
shunt-resistor = <2000>; /* r1367 */
};
vadj_fmc: ina226@4a { /* u184 */
compatible = "ti,ina226";
reg = <0x4a>;
shunt-resistor = <2000>; /* r1350 */
};
lpdmgtyavcc: ina226@4b { /* u177 */
compatible = "ti,ina226";
reg = <0x4b>;
shunt-resistor = <5000>; /* r2097 */
};
lpdmgtyavtt: ina226@4c { /* u260 */
compatible = "ti,ina226";
reg = <0x4c>;
shunt-resistor = <2000>; /* r1834 */
};
lpdmgtyvccaux: ina226@4d { /* u234 */
compatible = "ti,ina226";
reg = <0x4d>;
shunt-resistor = <5000>; /* r1679 */
};
};
/* 4 - 7 unused */
};
};
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
i2c-mux@74 { /* u35 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c-mux-idle-disconnect;
/* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
fmcp1_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* connection to Samtec J51C */
/* expected eeprom 0x50 SE cards */
};
osfp_i2c: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* J362 connector */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* alternative option DNP - u305 at 0x50 */
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
/* alternative option DNP - u303 at 0x50 */
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* alternative option DNP - u301 at 0x50 */
};
qsfpdd_i2c: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* J1/J2/J355/J354/J359/J358 connectors */
};
idt8a34001_i2c: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
/* Via J310 connector */
idt_8a34001: phc@5b { /* u219B */
compatible = "idt,8a34001";
reg = <0x5b>;
};
};
};
i2c-mux@75 { /* u322 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
/* reset-gpios = <&PL_GPIO SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
sfpdd1_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* J350 sfp-dd at 0x50 */
};
sfpdd2_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* J352 sfp-dd at 0x50 */
};
sfpdd3_i2c: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* J385 sfp-dd at 0x50 */
};
sfpdd4_i2c: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* J387 sfp-dd at 0x50 */
};
rc21008a_gtclk1_i2c: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
vc7_1: clock-generator@9 {
compatible = "renesas,rc21008a";
clock-output-names = "rc21008a-0";
reg = <0x9>;
#clock-cells = <1>;
clocks = <&vc7_xin>;
clock-names = "xin";
};
/* u298 - rc21008a at 0x9 */
/* connector J370 */
};
rc21008a_gtclk2_i2c: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
vc7_2: clock-generator@9 {
compatible = "renesas,rc21008a";
clock-output-names = "rc21008a-1";
reg = <0x9>;
#clock-cells = <1>;
clocks = <&vc7_xin>;
clock-names = "xin";
};
/* u299 - rc21008a at 0x9 */
/* connector J371 */
};
};
};
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