c6a13f3d6f
Arm's GIC-600 features a Power Register (GICR_PWRR), which needs to be programmed to enable redistributor operation. Power on the redistributor and wait until the power on state is reflected by checking the bit GICR_PWRR.RDPD == 0. While running U-Boot in EL3 without enabling this register, GICR_WAKER.ChildrenAsleep bit is not getting cleared and loops infinitely. This register(GICR_PWRR) must be programmed to mark the frame as powered on, before accessing other registers in the frame. Rest of initialization sequence remains the same. ARM GIC-600 IP complies with ARM GICv3 architecture. Enable this config if GIC-600 IP present. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
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| .. | ||
| include/mach | ||
| clk.c | ||
| cpu.c | ||
| Kconfig | ||
| Makefile | ||