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< div class = "title" > I2C FreeRTOS Driver< div class = "ingroups" > < a class = "el" href = "a00247.html" > I2C: Inter-Integrated Circuit Driver< / a > < / div > < / div > < / div >
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< a name = "details" id = "details" > < / a > < h2 class = "groupheader" > Overview< / h2 >
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< tr class = "heading" > < td colspan = "2" > < h2 class = "groupheader" > < a name = "nested-classes" > < / a >
Data Structures< / h2 > < / td > < / tr >
< tr class = "memitem:a00357" > < td class = "memItemLeft" align = "right" valign = "top" > struct   < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > < / td > < / tr >
< tr class = "memdesc:a00357" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > I2C FreeRTOS handle. < a href = "a00029.html#a00357" > More...< / a > < br / > < / td > < / tr >
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Driver version< / h2 > < / td > < / tr >
< tr class = "memitem:ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > < td class = "memItemLeft" align = "right" valign = "top" > #define  < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > FSL_I2C_FREERTOS_DRIVER_VERSION< / a >       (< a class = "el" href = "a00018.html#ga812138aa3315b0c6953c1a26130bcc37" > MAKE_VERSION< / a > (2, 0, 8))< / td > < / tr >
< tr class = "memdesc:ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > I2C FreeRTOS driver version 2.0.8. < a href = "#ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > More...< / a > < br / > < / td > < / tr >
< tr class = "separator:ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< / table > < table class = "memberdecls" >
< tr class = "heading" > < td colspan = "2" > < h2 class = "groupheader" > < a name = "member-group" > < / a >
I2C RTOS Operation< / h2 > < / td > < / tr >
< tr class = "memitem:ga2d8b0de9d5d807257ac91df157233cae" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a >   < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#ga2d8b0de9d5d807257ac91df157233cae" > I2C_RTOS_Init< / a > (< a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *handle, I2C_Type *base, const < a class = "el" href = "a00027.html#a00356" > i2c_master_config_t< / a > *masterConfig, uint32_t srcClock_Hz)< / td > < / tr >
< tr class = "memdesc:ga2d8b0de9d5d807257ac91df157233cae" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > Initializes I2C. < a href = "#ga2d8b0de9d5d807257ac91df157233cae" > More...< / a > < br / > < / td > < / tr >
< tr class = "separator:ga2d8b0de9d5d807257ac91df157233cae" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< tr class = "memitem:gabe3dc27604637a77cba04967097defb2" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a >   < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#gabe3dc27604637a77cba04967097defb2" > I2C_RTOS_Deinit< / a > (< a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *handle)< / td > < / tr >
< tr class = "memdesc:gabe3dc27604637a77cba04967097defb2" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > Deinitializes the I2C. < a href = "#gabe3dc27604637a77cba04967097defb2" > More...< / a > < br / > < / td > < / tr >
< tr class = "separator:gabe3dc27604637a77cba04967097defb2" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< tr class = "memitem:ga0b090779ab62f02149066a2325feb868" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a >   < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#ga0b090779ab62f02149066a2325feb868" > I2C_RTOS_Transfer< / a > (< a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *handle, i2c_master_transfer_t *transfer)< / td > < / tr >
< tr class = "memdesc:ga0b090779ab62f02149066a2325feb868" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > Performs I2C transfer. < a href = "#ga0b090779ab62f02149066a2325feb868" > More...< / a > < br / > < / td > < / tr >
< tr class = "separator:ga0b090779ab62f02149066a2325feb868" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
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< hr / > < h2 class = "groupheader" > Data Structure Documentation< / h2 >
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< td class = "memname" > struct i2c_rtos_handle_t< / td >
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< / tr >
< / table >
< / div > < div class = "memdoc" >
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< div class = "textblock" > < / div > < table class = "memberdecls" >
< tr > < td colspan = "2" > < h3 > Data Fields< / h3 > < / td > < / tr >
< tr class = "memitem:a7bea8caaad98edc94b9d6bb5161bda77" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "anchor" id = "a7bea8caaad98edc94b9d6bb5161bda77" > < / a >
I2C_Type *  < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#a7bea8caaad98edc94b9d6bb5161bda77" > base< / a > < / td > < / tr >
< tr class = "memdesc:a7bea8caaad98edc94b9d6bb5161bda77" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > I2C base address. < br / > < / td > < / tr >
< tr class = "separator:a7bea8caaad98edc94b9d6bb5161bda77" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
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i2c_master_handle_t  < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#a14a4eb4501e50ef62dfb3729e0881525" > drv_handle< / a > < / td > < / tr >
< tr class = "memdesc:a14a4eb4501e50ef62dfb3729e0881525" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > A handle of the underlying driver, treated as opaque by the RTOS layer. < br / > < / td > < / tr >
< tr class = "separator:a14a4eb4501e50ef62dfb3729e0881525" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< tr class = "memitem:a78159621d4e8e5d635a5034840e9b061" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "anchor" id = "a78159621d4e8e5d635a5034840e9b061" > < / a >
< a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a >   < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#a78159621d4e8e5d635a5034840e9b061" > async_status< / a > < / td > < / tr >
< tr class = "memdesc:a78159621d4e8e5d635a5034840e9b061" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > Transactional state of the underlying driver. < br / > < / td > < / tr >
< tr class = "separator:a78159621d4e8e5d635a5034840e9b061" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< tr class = "memitem:ae4cc25f447861379d70d2e6a2807baf8" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "anchor" id = "ae4cc25f447861379d70d2e6a2807baf8" > < / a >
SemaphoreHandle_t  < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#ae4cc25f447861379d70d2e6a2807baf8" > mutex< / a > < / td > < / tr >
< tr class = "memdesc:ae4cc25f447861379d70d2e6a2807baf8" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > A mutex to lock the handle during a transfer. < br / > < / td > < / tr >
< tr class = "separator:ae4cc25f447861379d70d2e6a2807baf8" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
< tr class = "memitem:aac7effed01f2bad89936114e26b96e3e" > < td class = "memItemLeft" align = "right" valign = "top" > < a class = "anchor" id = "aac7effed01f2bad89936114e26b96e3e" > < / a >
SemaphoreHandle_t  < / td > < td class = "memItemRight" valign = "bottom" > < a class = "el" href = "a00029.html#aac7effed01f2bad89936114e26b96e3e" > semaphore< / a > < / td > < / tr >
< tr class = "memdesc:aac7effed01f2bad89936114e26b96e3e" > < td class = "mdescLeft" >   < / td > < td class = "mdescRight" > A semaphore to notify and unblock task when the transfer ends. < br / > < / td > < / tr >
< tr class = "separator:aac7effed01f2bad89936114e26b96e3e" > < td class = "memSeparator" colspan = "2" >   < / td > < / tr >
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< h2 class = "groupheader" > Macro Definition Documentation< / h2 >
< a class = "anchor" id = "ga8a57a810d1c6632d3bf7dd2ea4e76ae5" > < / a >
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< td class = "memname" > #define FSL_I2C_FREERTOS_DRIVER_VERSION      (< a class = "el" href = "a00018.html#ga812138aa3315b0c6953c1a26130bcc37" > MAKE_VERSION< / a > (2, 0, 8))< / td >
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< / tr >
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< / div > < div class = "memdoc" >
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< h2 class = "groupheader" > Function Documentation< / h2 >
< a class = "anchor" id = "ga2d8b0de9d5d807257ac91df157233cae" > < / a >
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< div class = "memitem" >
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< td class = "memname" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a > I2C_RTOS_Init < / td >
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< td > (< / td >
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< td class = "paramtype" > < a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *  < / td >
< td class = "paramname" > < em > handle< / em > , < / td >
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< / tr >
< tr >
< td class = "paramkey" > < / td >
< td > < / td >
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< td class = "paramtype" > I2C_Type *  < / td >
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< td class = "paramname" > < em > base< / em > , < / td >
< / tr >
< tr >
< td class = "paramkey" > < / td >
< td > < / td >
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< td class = "paramtype" > const < a class = "el" href = "a00027.html#a00356" > i2c_master_config_t< / a > *  < / td >
< td class = "paramname" > < em > masterConfig< / em > , < / td >
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< / tr >
< tr >
< td class = "paramkey" > < / td >
< td > < / td >
< td class = "paramtype" > uint32_t  < / td >
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< td class = "paramname" > < em > srcClock_Hz< / em >   < / td >
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< / tr >
< tr >
< td > < / td >
< td > )< / td >
< td > < / td > < td > < / td >
< / tr >
< / table >
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< p > This function initializes the I2C module and the related RTOS context.< / p >
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< dl class = "params" > < dt > Parameters< / dt > < dd >
< table class = "params" >
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< tr > < td class = "paramname" > handle< / td > < td > The RTOS I2C handle, the pointer to an allocated space for RTOS context. < / td > < / tr >
< tr > < td class = "paramname" > base< / td > < td > The pointer base address of the I2C instance to initialize. < / td > < / tr >
< tr > < td class = "paramname" > masterConfig< / td > < td > Configuration structure to set-up I2C in master mode. < / td > < / tr >
< tr > < td class = "paramname" > srcClock_Hz< / td > < td > Frequency of input clock of the I2C module. < / td > < / tr >
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< / table >
< / dd >
< / dl >
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< dl class = "section return" > < dt > Returns< / dt > < dd > status of the operation. < / dd > < / dl >
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< / div >
< / div >
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< a class = "anchor" id = "gabe3dc27604637a77cba04967097defb2" > < / a >
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< td class = "memname" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a > I2C_RTOS_Deinit < / td >
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< td > (< / td >
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< td class = "paramtype" > < a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *  < / td >
< td class = "paramname" > < em > handle< / em > < / td > < td > )< / td >
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< td > < / td >
< / tr >
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< p > This function deinitializes the I2C module and the related RTOS context.< / p >
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< dl class = "params" > < dt > Parameters< / dt > < dd >
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< tr > < td class = "paramname" > handle< / td > < td > The RTOS I2C handle. < / td > < / tr >
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< a class = "anchor" id = "ga0b090779ab62f02149066a2325feb868" > < / a >
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< td class = "memname" > < a class = "el" href = "a00244.html#gaaabdaf7ee58ca7269bd4bf24efcde092" > status_t< / a > I2C_RTOS_Transfer < / td >
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< td > (< / td >
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< td class = "paramtype" > < a class = "el" href = "a00029.html#a00357" > i2c_rtos_handle_t< / a > *  < / td >
< td class = "paramname" > < em > handle< / em > , < / td >
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< td class = "paramtype" > i2c_master_transfer_t *  < / td >
< td class = "paramname" > < em > transfer< / em >   < / td >
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< td > )< / td >
< td > < / td > < td > < / td >
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< p > This function performs an I2C transfer according to data given in the transfer structure.< / p >
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< dl class = "params" > < dt > Parameters< / dt > < dd >
< table class = "params" >
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< tr > < td class = "paramname" > handle< / td > < td > The RTOS I2C handle. < / td > < / tr >
< tr > < td class = "paramname" > transfer< / td > < td > Structure specifying the transfer parameters. < / td > < / tr >
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< dl class = "section return" > < dt > Returns< / dt > < dd > status of the operation. < / dd > < / dl >
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