182 lines
7.1 KiB
C
182 lines
7.1 KiB
C
/*
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* Copyright 2017-2019 ,2021, 2023 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/* clang-format off */
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/*
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* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Pins v8.0
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processor: LPC55S69
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package_id: LPC55S69JBD100
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mcu_data: ksdk2_0
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processor_version: 8.0.3
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pin_labels:
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- {pin_num: '14', pin_signal: PIO0_16/FC4_TXD_SCL_MISO_WS/CLKOUT/CT_INP4/SECURE_GPIO0_16/ADC0_8, label: PHASE_B, identifier: PHASE_B}
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- {pin_num: '31', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0, label: PHASE_A, identifier: PHASE_A}
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- {pin_num: '64', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, label: WAKEUP, identifier: WAKEUP}
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- {pin_num: '59', pin_signal: PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4, label: HSPI_CS, identifier: HSPI_CS}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
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*/
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/***********************************************************************************************************************
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* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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#ifndef _PIN_MUX_H_
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#define _PIN_MUX_H_
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/*!
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* @addtogroup pin_mux
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* @{
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*/
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/***********************************************************************************************************************
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* API
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**********************************************************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Calls initialization functions.
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*
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*/
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void BOARD_InitBootPins(void);
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/*!
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* @brief Analog switch is open (disabled) */
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#define IOCON_PIO_ASW_DI 0x00u
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/*!
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* @brief Enables digital function */
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#define IOCON_PIO_DIGITAL_EN 0x0100u
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/*!
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* @brief Selects pin function 1 */
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#define IOCON_PIO_FUNC1 0x01u
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/*!
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* @brief Selects pin function 6 */
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#define IOCON_PIO_FUNC6 0x06u
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/*!
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* @brief Input function is not inverted */
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#define IOCON_PIO_INV_DI 0x00u
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/*!
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* @brief No addition pin function */
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#define IOCON_PIO_MODE_INACT 0x00u
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/*!
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* @brief Open drain is disabled */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u
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/*!
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* @brief Standard mode, output slew rate control is enabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_16_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO0_16_FUNC_ALT0 0x00u
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/*!
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* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
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#define PIO0_16_MODE_PULL_UP 0x02u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO0_26_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_18_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_18_FUNC_ALT0 0x00u
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/*!
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* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
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#define PIO1_18_MODE_PULL_UP 0x02u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_1_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 5. */
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#define PIO1_1_FUNC_ALT5 0x05u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_2_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 6. */
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#define PIO1_2_FUNC_ALT6 0x06u
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/*!
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* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
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#define PIO1_5_DIGIMODE_DIGITAL 0x01u
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/*!
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* @brief Selects pin function.: Alternative connection 0. */
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#define PIO1_5_FUNC_ALT0 0x00u
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/*!
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* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
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#define PIO1_5_MODE_PULL_UP 0x02u
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/*! @name PIO1_1 (number 59), HSPI_CS
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@{ */
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#define BOARD_INITPINS_HSPI_CS_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_HSPI_CS_PIN 1U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_HSPI_CS_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_18 (number 64), WAKEUP
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_WAKEUP_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_WAKEUP_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_WAKEUP_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_WAKEUP_PIN 18U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_WAKEUP_PIN_MASK (1U << 18U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO0_16 (number 14), PHASE_B
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_PHASE_B_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_PHASE_B_GPIO_PIN_MASK (1U << 16U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_PHASE_B_PORT 0U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PHASE_B_PIN 16U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PHASE_B_PIN_MASK (1U << 16U) /*!<@brief PORT pin mask */
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/* @} */
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/*! @name PIO1_5 (number 31), PHASE_A
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@{ */
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/* Symbols to be used with GPIO driver */
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#define BOARD_INITPINS_PHASE_A_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
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#define BOARD_INITPINS_PHASE_A_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
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#define BOARD_INITPINS_PHASE_A_PORT 1U /*!<@brief PORT peripheral base pointer */
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#define BOARD_INITPINS_PHASE_A_PIN 5U /*!<@brief PORT pin number */
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#define BOARD_INITPINS_PHASE_A_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
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/* @} */
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/*!
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* @brief Configures pin routing and optionally pin electrical features.
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*
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*/
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void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _PIN_MUX_H_ */
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/***********************************************************************************************************************
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* EOF
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**********************************************************************************************************************/
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