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MCUXpresso_LPC804
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Updated to SDK v2.15.000 

Signed-off-by: Yilin Sun <imi415@imi.moe>
This commit is contained in:
Yilin Sun 2024-01-29 14:45:13 +08:00
parent 991051a00a
commit 28c7a119e9
Signed by: imi415
GPG Key ID: DB982239424FF8AC
625 changed files with 15553 additions and 9724 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
CMSIS/CMSIS_v3.yml
View File

@ -2153,8 +2153,13 @@ set.CMSIS_DSP_Lib:
scr:
- scr.CMSIS
cmsis_pack:
external_pack: true
vendor: ARM
supported: false
pack_root:
pack_type: SWP
pack_name: CMSIS_DSP
pack_version: 1.0.0
pack_url: http://www.keil.com/pack/
kex_package:
kex_web_ui:
ui_category: CMSIS DSP Lib
@ -2175,7 +2180,7 @@ scr.CMSIS:
Description: Vendor-independent hardware abstraction layer for microcontrollers
that are based on Arm Cortex processors, distributed by ARM. cores
Location: CMSIS/
Origin: NXP (Apache License 2.0)
Origin: ARM (Apache-2.0) - https://github.com/ARM-software/CMSIS_5/releases/tag/5.8.0
license.CMSIS:
section-type: license
@ -2185,4 +2190,4 @@ license.CMSIS:
files:
- source: LICENSE.txt
section_info:
Outgoing License: Apache License 2.0
Outgoing License: Apache License 2.0

7
COPYING-BSD-3
View File

@ -24,10 +24,3 @@ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.

215
LA_OPT_NXP_Software_License.txt
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File diff suppressed because one or more lines are too long

2418
LPC804_manifest_v3_13.xml → LPC804_manifest_v3_14.xml
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File diff suppressed because it is too large Load Diff

8
SW-Content-Register.txt
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@ -1,6 +1,6 @@
Release Name: MCUXpresso Software Development Kit (SDK)
Release Version: 2.14.0
Package License: LA_OPT_NXP_Software_License.txt v45 May 2023- Additional Distribution License granted, license in Section 2.3 applies
Release Version: 2.15.000
Package License: LA_OPT_NXP_Software_License.txt v49 September 2023- Additional Distribution License granted, license in Section 2.3 applies
SDK_Peripheral_Driver Name: SDK Peripheral Driver
Version: 2.x.x
@ -43,7 +43,9 @@ CMSIS Name: CMSIS
based on Arm Cortex processors, distributed by
ARM. cores
Location: CMSIS/
Origin: NXP (Apache License 2.0)
Origin: ARM (Apache-2.0) -
https://github.com/ARM-software/CMSIS_5/releases/t
ag/5.8.0
osa Name: OSA
Version: 1.0.0

0
boards/lpcxpresso804/demo_apps/hello_world/armgcc/build_all.sh Executable file → Normal file
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0
boards/lpcxpresso804/demo_apps/hello_world/armgcc/build_debug.sh Executable file → Normal file
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0
boards/lpcxpresso804/demo_apps/hello_world/armgcc/build_release.sh Executable file → Normal file
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0
boards/lpcxpresso804/demo_apps/hello_world/armgcc/clean.sh Executable file → Normal file
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0
boards/lpcxpresso804/demo_apps/hello_world/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/demo_apps/hello_world/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

BIN
boards/lpcxpresso804/demo_apps/hello_world/hello_world.bin Executable file → Normal file
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Binary file not shown.

0
boards/lpcxpresso804/demo_apps/hello_world/hello_world_v3_13.xml → boards/lpcxpresso804/demo_apps/hello_world/hello_world_v3_14.xml
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0
boards/lpcxpresso804/demo_apps/led_blinky/armgcc/build_all.sh Executable file → Normal file
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0
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0
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boards/lpcxpresso804/demo_apps/led_blinky/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/demo_apps/led_blinky/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

BIN
boards/lpcxpresso804/demo_apps/led_blinky/led_blinky.bin Executable file → Normal file
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Binary file not shown.

0
boards/lpcxpresso804/demo_apps/led_blinky/led_blinky_v3_13.xml → boards/lpcxpresso804/demo_apps/led_blinky/led_blinky_v3_14.xml
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78
boards/lpcxpresso804/demo_apps/new_project/armgcc/CMakeLists.txt Normal file
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@ -0,0 +1,78 @@
# CROSS COMPILER SETTING
SET(CMAKE_SYSTEM_NAME Generic)
CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
# THE VERSION NUMBER
SET (MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
SET (MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
include(ide_overrides.cmake OPTIONAL)
if(CMAKE_SCRIPT_MODE_FILE)
message("${MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION}")
return()
endif()
# ENABLE ASM
ENABLE_LANGUAGE(ASM)
SET(CMAKE_STATIC_LIBRARY_PREFIX)
SET(CMAKE_STATIC_LIBRARY_SUFFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
# CURRENT DIRECTORY
SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
project(new_project)
set(MCUX_BUILD_TYPES debug release)
set(MCUX_SDK_PROJECT_NAME new_project.elf)
if (NOT DEFINED SdkRootDirPath)
SET(SdkRootDirPath ${ProjDirPath}/../../../../..)
endif()
include(${ProjDirPath}/flags.cmake)
include(${ProjDirPath}/config.cmake)
add_executable(${MCUX_SDK_PROJECT_NAME}
"${ProjDirPath}/../main.c"
"${ProjDirPath}/../peripherals.c"
"${ProjDirPath}/../peripherals.h"
"${ProjDirPath}/../pin_mux.c"
"${ProjDirPath}/../pin_mux.h"
"${ProjDirPath}/../board.c"
"${ProjDirPath}/../board.h"
"${ProjDirPath}/../clock_config.c"
"${ProjDirPath}/../clock_config.h"
)
target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
${ProjDirPath}/..
${SdkRootDirPath}/boards/lpcxpresso804/project_template
)
include(${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake)
IF(NOT DEFINED TARGET_LINK_SYSTEM_LIBRARIES)
SET(TARGET_LINK_SYSTEM_LIBRARIES "-lm -lc -lgcc -lnosys")
ENDIF()
TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${TARGET_LINK_SYSTEM_LIBRARIES})
TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
set_target_properties(${MCUX_SDK_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES "output.map")

211
boards/lpcxpresso804/demo_apps/new_project/armgcc/LPC804_flash.ld Normal file
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@ -0,0 +1,211 @@
/*
** ###################################################################
** Processors: LPC804M101JDH20
** LPC804M101JDH24
** LPC804M101JHI33
** LPC804M111JDH24
** LPC804UK
**
** Compiler: GNU C Compiler
** Reference manual: LPC804 User manual Rev.1.0 24 Jan 2018
** Version: rev. 1.0, 2018-01-09
** Build: b200408
**
** Abstract:
** Linker file for the GNU C Compiler
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2020 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
**
** http: www.nxp.com
** mail: support@nxp.com
**
** ###################################################################
*/
/* Entry Point */
ENTRY(Reset_Handler)
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x040;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x040;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000200
m_crp (RX) : ORIGIN = 0x000002FC, LENGTH = 0x00000004
m_text (RX) : ORIGIN = 0x00000300, LENGTH = 0x00007C00
m_data (RW) : ORIGIN = 0x10000000, LENGTH = 0x00000FE0
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into internal flash */
.interrupts :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.crp :
{
. = ALIGN(4);
KEEP(*(.crp)) /* Code Read Protection level (CRP) */
. = ALIGN(4);
} > m_crp
/* The program code and other data goes into internal flash */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
} > m_text
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > m_text
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text
.ctors :
{
__CTOR_LIST__ = .;
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > m_text
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > m_text
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > m_text
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > m_text
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} > m_text
__etext = .; /* define a global symbol at end of code */
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
.data : AT(__DATA_ROM)
{
. = ALIGN(4);
__DATA_RAM = .;
__data_start__ = .; /* create a global symbol at data start */
*(.ramfunc*) /* for functions in ram */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
KEEP(*(.jcr*))
. = ALIGN(4);
__data_end__ = .; /* define a global symbol at data end */
} > m_data
__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
text_end = ORIGIN(m_text) + LENGTH(m_text);
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
/* Uninitialized data section */
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
. = ALIGN(4);
__START_BSS = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > m_data
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > m_data
.stack :
{
. = ALIGN(8);
. += STACK_SIZE;
} > m_data
/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data) + LENGTH(m_data);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
.ARM.attributes 0 : { *(.ARM.attributes) }
ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
}

15
boards/lpcxpresso804/demo_apps/new_project/armgcc/build_all.bat Normal file
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@ -0,0 +1,15 @@
if exist CMakeFiles (RD /s /Q CMakeFiles)
if exist Makefile (DEL /s /Q /F Makefile)
if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug .
mingw32-make -j
if exist CMakeFiles (RD /s /Q CMakeFiles)
if exist Makefile (DEL /s /Q /F Makefile)
if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release .
mingw32-make -j
IF "%1" == "" ( pause )

15
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@ -0,0 +1,15 @@
#!/bin/sh
if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
if [ -f "Makefile" ];then rm -f Makefile; fi
if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug .
make -j
if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
if [ -f "Makefile" ];then rm -f Makefile; fi
if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release .
make -j

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@ -0,0 +1,6 @@
if exist CMakeFiles (RD /s /Q CMakeFiles)
if exist Makefile (DEL /s /Q /F Makefile)
if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug .
mingw32-make -j 2> build_log.txt

7
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@ -0,0 +1,7 @@
#!/bin/sh
if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
if [ -f "Makefile" ];then rm -f Makefile; fi
if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug .
make -j 2>&1 | tee build_log.txt

6
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@ -0,0 +1,6 @@
if exist CMakeFiles (RD /s /Q CMakeFiles)
if exist Makefile (DEL /s /Q /F Makefile)
if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release .
mingw32-make -j 2> build_log.txt

7
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@ -0,0 +1,7 @@
#!/bin/sh
if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
if [ -f "Makefile" ];then rm -f Makefile; fi
if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release .
make -j 2>&1 | tee build_log.txt

3
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@ -0,0 +1,3 @@
RD /s /Q debug release CMakeFiles
DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
pause

3
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@ -0,0 +1,3 @@
#!/bin/sh
rm -rf debug release CMakeFiles
rm -rf Makefile cmake_install.cmake CMakeCache.txt

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boards/lpcxpresso804/demo_apps/new_project/armgcc/config.cmake Normal file
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@ -0,0 +1,34 @@
# config to select component, the format is CONFIG_USE_${component}
# Please refer to cmake files below to get available components:
# ${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake
set(CONFIG_COMPILER gcc)
set(CONFIG_TOOLCHAIN armgcc)
set(CONFIG_USE_COMPONENT_CONFIGURATION false)
set(CONFIG_USE_utility_debug_console_lite true)
set(CONFIG_USE_utility_assert_lite true)
set(CONFIG_USE_driver_common true)
set(CONFIG_USE_driver_clock true)
set(CONFIG_USE_driver_power_no_lib true)
set(CONFIG_USE_driver_reset true)
set(CONFIG_USE_device_LPC804_CMSIS true)
set(CONFIG_USE_component_miniusart_adapter true)
set(CONFIG_USE_device_LPC804_startup true)
set(CONFIG_USE_driver_lpc_miniusart true)
set(CONFIG_USE_driver_lpc_iocon_lite true)
set(CONFIG_USE_driver_swm true)
set(CONFIG_USE_driver_lpc_gpio true)
set(CONFIG_USE_driver_syscon true)
set(CONFIG_USE_driver_rom_api true)
set(CONFIG_USE_utilities_misc_utilities true)
set(CONFIG_USE_CMSIS_Include_core_cm true)
set(CONFIG_USE_device_LPC804_system true)
set(CONFIG_USE_driver_swm_connections true)
set(CONFIG_USE_driver_syscon_connections true)
set(CONFIG_CORE cm0p)
set(CONFIG_DEVICE LPC804)
set(CONFIG_BOARD lpcxpresso804)
set(CONFIG_KIT lpcxpresso804)
set(CONFIG_DEVICE_ID LPC804)
set(CONFIG_FPU NO_FPU)
set(CONFIG_DSP NO_DSP)

169
boards/lpcxpresso804/demo_apps/new_project/armgcc/flags.cmake Normal file
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@ -0,0 +1,169 @@
IF(NOT DEFINED FPU)
SET(FPU "-mfloat-abi=soft")
ENDIF()
IF(NOT DEFINED SPECS)
SET(SPECS "--specs=nano.specs --specs=nosys.specs")
ENDIF()
IF(NOT DEFINED DEBUG_CONSOLE_CONFIG)
SET(DEBUG_CONSOLE_CONFIG "-DSDK_DEBUGCONSOLE=1")
ENDIF()
SET(CMAKE_ASM_FLAGS_DEBUG " \
${CMAKE_ASM_FLAGS_DEBUG} \
-DDEBUG \
-D__STARTUP_CLEAR_BSS \
-mcpu=cortex-m0plus \
-mthumb \
${FPU} \
")
SET(CMAKE_ASM_FLAGS_RELEASE " \
${CMAKE_ASM_FLAGS_RELEASE} \
-DNDEBUG \
-D__STARTUP_CLEAR_BSS \
-mcpu=cortex-m0plus \
-mthumb \
${FPU} \
")
SET(CMAKE_C_FLAGS_DEBUG " \
${CMAKE_C_FLAGS_DEBUG} \
-DDEBUG \
-DCPU_LPC804 \
-DCPU_LPC804M101JDH24 \
-DMCUXPRESSO_SDK \
-g \
-O0 \
-mcpu=cortex-m0plus \
-Wall \
-mthumb \
-MMD \
-MP \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mapcs \
-std=gnu99 \
${FPU} \
${DEBUG_CONSOLE_CONFIG} \
")
SET(CMAKE_C_FLAGS_RELEASE " \
${CMAKE_C_FLAGS_RELEASE} \
-DNDEBUG \
-DCPU_LPC804 \
-DCPU_LPC804M101JDH24 \
-DMCUXPRESSO_SDK \
-Os \
-mcpu=cortex-m0plus \
-Wall \
-mthumb \
-MMD \
-MP \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mapcs \
-std=gnu99 \
${FPU} \
${DEBUG_CONSOLE_CONFIG} \
")
SET(CMAKE_CXX_FLAGS_DEBUG " \
${CMAKE_CXX_FLAGS_DEBUG} \
-DDEBUG \
-DMCUXPRESSO_SDK \
-g \
-O0 \
-mcpu=cortex-m0plus \
-Wall \
-mthumb \
-MMD \
-MP \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mapcs \
-fno-rtti \
-fno-exceptions \
${FPU} \
${DEBUG_CONSOLE_CONFIG} \
")
SET(CMAKE_CXX_FLAGS_RELEASE " \
${CMAKE_CXX_FLAGS_RELEASE} \
-DNDEBUG \
-DMCUXPRESSO_SDK \
-Os \
-mcpu=cortex-m0plus \
-Wall \
-mthumb \
-MMD \
-MP \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mapcs \
-fno-rtti \
-fno-exceptions \
${FPU} \
${DEBUG_CONSOLE_CONFIG} \
")
SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
${CMAKE_EXE_LINKER_FLAGS_DEBUG} \
-g \
-mcpu=cortex-m0plus \
-Wall \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mthumb \
-mapcs \
-Xlinker \
--gc-sections \
-Xlinker \
-static \
-Xlinker \
-z \
-Xlinker \
muldefs \
-Xlinker \
-Map=output.map \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
-mcpu=cortex-m0plus \
-Wall \
-fno-common \
-ffunction-sections \
-fdata-sections \
-ffreestanding \
-fno-builtin \
-mthumb \
-mapcs \
-Xlinker \
--gc-sections \
-Xlinker \
-static \
-Xlinker \
-z \
-Xlinker \
muldefs \
-Xlinker \
-Map=output.map \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

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/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2018 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include "fsl_common.h"
#include "clock_config.h"
#include "board.h"
#include "fsl_debug_console.h"
/*******************************************************************************
* Variables
******************************************************************************/
/* Clock rate on the CLKIN pin */
const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
/*******************************************************************************
* Code
******************************************************************************/
/* Initialize debug console. */
status_t BOARD_InitDebugConsole(void)
{
#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
status_t result;
/* Attach 12 MHz clock to USART0 (debug console) */
CLOCK_Select(BOARD_DEBUG_USART_CLK_ATTACH);
RESET_PeripheralReset(BOARD_DEBUG_USART_RST);
result = DbgConsole_Init(BOARD_DEBUG_USART_INSTANCE, BOARD_DEBUG_USART_BAUDRATE, BOARD_DEBUG_USART_TYPE,
BOARD_DEBUG_USART_CLK_FREQ);
assert(kStatus_Success == result);
return result;
#else
return kStatus_Success;
#endif
}

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/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2018 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "clock_config.h"
#include "fsl_common.h"
#include "fsl_gpio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "LPCXPRESSO804"
#define BOARD_EXTCLKINRATE (0)
/*! @brief The UART to use for debug messages. */
#define BOARD_DEBUG_USART_TYPE kSerialPort_Uart
#define BOARD_DEBUG_USART_BASEADDR (uint32_t) USART0
#define BOARD_DEBUG_USART_INSTANCE 0U
#define BOARD_DEBUG_USART_CLK_FREQ CLOCK_GetMainClkFreq()
#define BOARD_DEBUG_USART_CLK_ATTACH kUART0_Clk_From_MainClk
#define BOARD_DEBUG_USART_RST kUART0_RST_N_SHIFT_RSTn
#define BOARD_USART_IRQ USART0_IRQn
#define BOARD_USART_IRQ_HANDLER USART0_IRQHandler
#ifndef BOARD_DEBUG_USART_BAUDRATE
#define BOARD_DEBUG_USART_BAUDRATE 9600
#endif /* BOARD_DEBUG_USART_BAUDRATE */
/*! @brief Board led mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
/* LED_GREEN */
#ifndef BOARD_LED_GREEN_GPIO
#define BOARD_LED_GREEN_GPIO GPIO
#endif
#define BOARD_LED_GREEN_GPIO_PORT 0U
#ifndef BOARD_LED_GREEN_GPIO_PIN
#define BOARD_LED_GREEN_GPIO_PIN 12U
#endif
#define LED_GREEN_INIT(output) \
GPIO_PortInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT); \
GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
#define LED_GREEN_ON() \
GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN \ \ \ \ \ \ \
*/
#define LED_GREEN_OFF() \
GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN \ \ \ \ \ \ \
*/
#define LED_GREEN_TOGGLE() \
GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
/* LED_BLUE */
#ifndef BOARD_LED_BLUE_GPIO
#define BOARD_LED_BLUE_GPIO GPIO
#endif
#define BOARD_LED_BLUE_GPIO_PORT 0U
#ifndef BOARD_LED_BLUE_GPIO_PIN
#define BOARD_LED_BLUE_GPIO_PIN 11U
#endif
#ifndef BOARD_S1_GPIO
#define BOARD_S1_GPIO GPIO
#endif
#define BOARD_S1_GPIO_PORT 0U
#ifndef BOARD_S1_GPIO_PIN
#define BOARD_S1_GPIO_PIN 13U
#endif
#define BOARD_S1_NAME "S1"
#define BOARD_S1_IRQ PIN_INT0_IRQn
#define BOARD_S1_IRQ_HANDLER PIN_INT0_IRQHandler
#define LED_BLUE_INIT(output) \
GPIO_PortInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT); \
GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
#define LED_BLUE_ON() \
GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE \ \ \ \ \ \ \
*/
#define LED_BLUE_OFF() \
GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE \ \ \ \ \ \ \
*/
#define LED_BLUE_TOGGLE() \
GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
/* LED_RED */
#ifndef BOARD_LED_RED_GPIO
#define BOARD_LED_RED_GPIO GPIO
#endif
#define BOARD_LED_RED_GPIO_PORT 0U
#ifndef BOARD_LED_RED_GPIO_PIN
#define BOARD_LED_RED_GPIO_PIN 13U
#endif
#define LED_RED_INIT(output) \
GPIO_PortInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT); \
GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
#define LED_RED_ON() \
GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED \ \ \ \ \ \ \
*/
#define LED_RED_OFF() \
GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED \ \ \ \ \ \ \
*/
#define LED_RED_TOGGLE() \
GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
#ifndef BOARD_SW1_GPIO
#define BOARD_SW1_GPIO GPIO
#endif
#define BOARD_SW1_GPIO_PORT 0U
#ifndef BOARD_SW1_GPIO_PIN
#define BOARD_SW1_GPIO_PIN 13U
#endif
#define BOARD_SW1_NAME "SW1"
#define BOARD_SW1_IRQ PIN_INT0_IRQn
#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
status_t BOARD_InitDebugConsole(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */

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/*
* Copyright 2018,2019 ,2021 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*
* How to set up clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up all dividers.
*
* 3. Set up all selectors to provide selected clocks.
*/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v7.0
processor: LPC804
package_id: LPC804M101JDH24
mcu_data: ksdk2_0
processor_version: 9.0.0
board: LPCXpresso804
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
#include "fsl_power.h"
#include "fsl_clock.h"
#include "clock_config.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockFRO30M();
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO18M **********************
******************************************************************************/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO18M
outputs:
- {id: FROHF_clock.outFreq, value: 18 MHz}
- {id: LowPower_clock.outFreq, value: 1 MHz}
- {id: System_clock.outFreq, value: 9 MHz}
- {id: WWDT_clock.outFreq, value: 1 MHz}
- {id: divto750k_clock.outFreq, value: 750 kHz}
sources:
- {id: SYSCON.fro_osc.outFreq, value: 18 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Variables for BOARD_BootClockFRO18M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO18M configuration
******************************************************************************/
void BOARD_BootClockFRO18M(void)
{
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_OUT); /*!< Ensure FRO OUT is on */
POWER_DisablePD(kPDRUNCFG_PD_FRO); /*!< Ensure FRO is on */
CLOCK_SetFroOscFreq(kCLOCK_FroOscOut18M); /*!< Set up FRO freq */
POWER_DisablePD(kPDRUNCFG_PD_LPOSC); /*!< Ensure LPOSC is on */
CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcFro); /*!< select fro for main clock */
CLOCK_Select(kFRG0_Clk_From_Fro); /*!< select fro for frg0 */
CLOCK_SetFRG0ClkFreq(9000000U); /*!< select frg0 freq */
CLOCK_Select(kCLKOUT_From_Fro); /*!< select FRO for CLKOUT */
CLOCK_Select(kADC_Clk_From_Fro); /*!< select FRO for ADC */
CLOCK_SetCoreSysClkDiv(1U);
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFRO18M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO24M **********************
******************************************************************************/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO24M
outputs:
- {id: FROHF_clock.outFreq, value: 24 MHz}
- {id: LowPower_clock.outFreq, value: 1 MHz}
- {id: System_clock.outFreq, value: 12 MHz}
- {id: WWDT_clock.outFreq, value: 1 MHz}
- {id: divto750k_clock.outFreq, value: 750 kHz}
sources:
- {id: SYSCON.fro_osc.outFreq, value: 24 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Variables for BOARD_BootClockFRO24M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO24M configuration
******************************************************************************/
void BOARD_BootClockFRO24M(void)
{
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_OUT); /*!< Ensure FRO OUT is on */
POWER_DisablePD(kPDRUNCFG_PD_FRO); /*!< Ensure FRO is on */
CLOCK_SetFroOscFreq(kCLOCK_FroOscOut24M); /*!< Set up FRO freq */
POWER_DisablePD(kPDRUNCFG_PD_LPOSC); /*!< Ensure LPOSC is on */
CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcFro); /*!< select fro for main clock */
CLOCK_Select(kFRG0_Clk_From_Fro); /*!< select fro for frg0 */
CLOCK_SetFRG0ClkFreq(12000000U); /*!< select frg0 freq */
CLOCK_Select(kCLKOUT_From_Fro); /*!< select FRO for CLKOUT */
CLOCK_Select(kADC_Clk_From_Fro); /*!< select FRO for ADC */
CLOCK_SetCoreSysClkDiv(1U);
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO30M **********************
******************************************************************************/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO30M
called_from_default_init: true
outputs:
- {id: FROHF_clock.outFreq, value: 30 MHz}
- {id: LowPower_clock.outFreq, value: 1 MHz}
- {id: System_clock.outFreq, value: 15 MHz}
- {id: WWDT_clock.outFreq, value: 1 MHz}
- {id: divto750k_clock.outFreq, value: 750 kHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Variables for BOARD_BootClockFRO30M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO30M configuration
******************************************************************************/
void BOARD_BootClockFRO30M(void)
{
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_OUT); /*!< Ensure FRO OUT is on */
POWER_DisablePD(kPDRUNCFG_PD_FRO); /*!< Ensure FRO is on */
CLOCK_SetFroOscFreq(kCLOCK_FroOscOut30M); /*!< Set up FRO freq */
POWER_DisablePD(kPDRUNCFG_PD_LPOSC); /*!< Ensure LPOSC is on */
CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcFro); /*!< select fro for main clock */
CLOCK_Select(kFRG0_Clk_From_Fro); /*!< select fro for frg0 */
CLOCK_SetFRG0ClkFreq(15000000U); /*!< select frg0 freq */
CLOCK_Select(kCLKOUT_From_Fro); /*!< select FRO for CLKOUT */
CLOCK_Select(kADC_Clk_From_Fro); /*!< select FRO for ADC */
CLOCK_SetCoreSysClkDiv(1U);
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKFRO30M_CORE_CLOCK;
}

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/*
* Copyright 2018,2019 ,2021 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 12000000U /*!< Board xtal0 frequency in Hz */
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO18M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO18M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO18M_CORE_CLOCK 9000000U /*!< Core clock frequency: 9000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO18M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO18M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO24M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO24M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO24M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO24M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO30M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO30M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO30M_CORE_CLOCK 15000000U /*!< Core clock frequency: 15000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO30M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO30M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

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/*
* Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_device_registers.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "peripherals.h"
#include "board.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_LED_PORT BOARD_LED_RED_PORT
#define BOARD_LED_PIN BOARD_LED_RED_PIN
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
/*!
* @brief Main function
*/
int main(void)
{
/* Init board hardware. */
BOARD_InitBootPins();
BOARD_InitBootClocks();
/* Add user custom codes below */
while (1)
{
}
}

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<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="LPC804" version="1.6" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6.xsd" uuid="9741d2bf-9ef6-4387-b582-0a61861b5bb4" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>LPC804</processor>
<package>LPC804M101JDH24</package>
<board>LPCXpresso804</board>
<mcu_data>ksdk2_0</mcu_data>
<cores selected="core0">
<core name="Cortex-M0P" id="core0" description="M0P core"/>
</cores>
<description>Configuration imported from C:\Users\mcu-sdk-2.0\boards\lpcxpresso804\demo_apps\led_blinky\iar</description>
</common>
<preferences>
<validate_boot_init_only>true</validate_boot_init_only>
<generate_extended_information>false</generate_extended_information>
<generate_code_modified_registers_only>false</generate_code_modified_registers_only>
</preferences>
<tools>
<pins name="Pins" version="6.0" enabled="true" update_project_code="true">
<pins_profile>
<processor_version>6.0.1</processor_version>
</pins_profile>
<functions_list>
<function name="BOARD_InitPins">
<description>Configures pin routing and optionally pin electrical features.</description>
<options>
<callFromInitBoot>true</callFromInitBoot>
<prefix>BOARD_</prefix>
<coreID>core0</coreID>
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins.BOARD_InitPins">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<pins>
<pin peripheral="GPIO" signal="PIO0, 13" pin_num="4" pin_signal="PIO0_13/ADC_10">
<pin_features>
<pin_feature name="identifier" value="LED_RED"/>
<pin_feature name="direction" value="OUTPUT"/>
</pin_features>
</pin>
</pins>
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="6.0" enabled="true" update_project_code="true">
<clocks_profile>
<processor_version>6.0.1</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockFRO18M">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources>
<clock_source id="SYSCON.fro_osc.outFreq" value="18 MHz" locked="false" enabled="false"/>
</clock_sources>
<clock_outputs>
<clock_output id="FROHF_clock.outFreq" value="18 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="9 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings/>
<called_from_default_init>false</called_from_default_init>
</clock_configuration>
<clock_configuration name="BOARD_BootClockFRO24M">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources>
<clock_source id="SYSCON.fro_osc.outFreq" value="24 MHz" locked="false" enabled="false"/>
</clock_sources>
<clock_outputs>
<clock_output id="FROHF_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings/>
<called_from_default_init>false</called_from_default_init>
</clock_configuration>
<clock_configuration name="BOARD_BootClockFRO30M">
<description></description>
<options/>
<dependencies>
<dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
<dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
<feature name="enabled" evaluation="equal" configuration="core0">
<data>true</data>
</feature>
</dependency>
</dependencies>
<clock_sources/>
<clock_outputs>
<clock_output id="FROHF_clock.outFreq" value="30 MHz" locked="false" accuracy=""/>
<clock_output id="System_clock.outFreq" value="15 MHz" locked="false" accuracy=""/>
</clock_outputs>
<clock_settings/>
<called_from_default_init>true</called_from_default_init>
</clock_configuration>
</clock_configurations>
</clocks>
<dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
<dcdx_profile>
<processor_version>N/A</processor_version>
</dcdx_profile>
<dcdx_configurations/>
</dcdx>
<periphs name="Peripherals" version="6.0" enabled="false" update_project_code="true">
<peripherals_profile>
<processor_version>N/A</processor_version>
</peripherals_profile>
<functional_groups/>
<components/>
</periphs>
<tee name="TEE" version="1.0" enabled="false" update_project_code="true">
<tee_profile>
<processor_version>N/A</processor_version>
</tee_profile>
<global_options/>
<user_memory_regions/>
</tee>
</tools>
</configuration>

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boards/lpcxpresso804/demo_apps/new_project/new_project_v3_14.xml Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
<externalDefinitions>
<definition extID="utility.debug_console_lite.LPC804"/>
<definition extID="platform.utilities.assert_lite.LPC804"/>
<definition extID="platform.drivers.common.LPC804"/>
<definition extID="platform.drivers.clock.LPC804"/>
<definition extID="platform.drivers.power_no_lib.LPC804"/>
<definition extID="platform.drivers.reset.LPC804"/>
<definition extID="device.LPC804_CMSIS.LPC804"/>
<definition extID="component.miniusart_adapter.LPC804"/>
<definition extID="device.LPC804_startup.LPC804"/>
<definition extID="platform.drivers.lpc_miniusart.LPC804"/>
<definition extID="platform.drivers.lpc_iocon_lite.LPC804"/>
<definition extID="platform.drivers.swm.LPC804"/>
<definition extID="platform.drivers.lpc_gpio.LPC804"/>
<definition extID="platform.drivers.syscon.LPC804"/>
<definition extID="platform.drivers.rom_api.LPC804"/>
<definition extID="platform.utilities.misc_utilities.LPC804"/>
<definition extID="CMSIS_Include_core_cm.LPC804"/>
<definition extID="device.LPC804_system.LPC804"/>
<definition extID="platform.drivers.swm_connections.LPC804"/>
<definition extID="platform.drivers.syscon_connections.LPC804"/>
<definition extID="iar"/>
<definition extID="mdk"/>
<definition extID="armgcc"/>
<definition extID="mcuxpresso"/>
<definition extID="com.nxp.mcuxpresso"/>
</externalDefinitions>
<example id="lpcxpresso804_new_project" name="new_project" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 platform.utilities.misc_utilities.LPC804 CMSIS_Include_core_cm.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
<projects>
<project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
</projects>
<toolchainSettings>
<toolchainSetting id_refs="com.nxp.mcuxpresso">
<option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
<value>CPU_LPC804</value>
<value>CPU_LPC804M101JDH24</value>
<value>MCUXPRESSO_SDK</value>
</option>
<option id="com.crt.advproject.gas.fpu" type="enum">
<value>com.crt.advproject.gas.fpu.none</value>
</option>
<option id="gnu.c.compiler.option.optimization.flags" type="string">
<value>-fno-common</value>
</option>
<option id="com.crt.advproject.c.misc.dialect" type="enum">
<value>com.crt.advproject.misc.dialect.gnu99</value>
</option>
<option id="com.crt.advproject.gcc.fpu" type="enum">
<value>com.crt.advproject.gcc.fpu.none</value>
</option>
<option id="gnu.c.compiler.option.misc.other" type="string">
<value>-c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
</option>
<option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
<value>false</value>
</option>
<option id="gnu.c.compiler.option.warnings.toerrors" type="boolean">
<value>false</value>
</option>
<option id="gnu.c.link.option.nostdlibs" type="boolean">
<value>true</value>
</option>
<option id="gnu.c.link.option.other" type="stringList">
<value>-no-warn-rwx-segments</value>
</option>
<option id="com.crt.advproject.link.fpu" type="enum">
<value>com.crt.advproject.link.fpu.none</value>
</option>
</toolchainSetting>
</toolchainSettings>
<include_paths>
<include_path path="." project_relative_path="board" type="c_include"/>
<include_path path="../../project_template" project_relative_path="board" type="c_include"/>
</include_paths>
<source path="iar" project_relative_path="./" type="workspace" toolchain="iar">
<files mask="new_project.ewd"/>
<files mask="new_project.ewp"/>
<files mask="new_project.eww"/>
</source>
<source path="mdk" project_relative_path="./" type="workspace" toolchain="mdk">
<files mask="new_project.uvprojx"/>
<files mask="new_project.uvoptx"/>
<files mask="JLinkSettings.ini"/>
<files mask="new_project.uvmpw"/>
</source>
<source path="armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
<files mask="build_all.bat"/>
<files mask="build_all.sh"/>
<files mask="clean.bat"/>
<files mask="clean.sh"/>
<files mask="CMakeLists.txt"/>
<files mask="flags.cmake"/>
<files mask="config.cmake"/>
<files mask="build_debug.bat"/>
<files mask="build_debug.sh"/>
<files mask="build_release.bat"/>
<files mask="build_release.sh"/>
</source>
<source path="../../../../devices/LPC804" project_relative_path="./" type="workspace" toolchain="armgcc">
<files mask="all_lib_device.cmake"/>
</source>
<source path="." project_relative_path="source" type="src">
<files mask="main.c"/>
</source>
<source path="." project_relative_path="board" type="src">
<files mask="peripherals.c"/>
<files mask="pin_mux.c"/>
</source>
<source path="." project_relative_path="board" type="c_include">
<files mask="peripherals.h"/>
<files mask="pin_mux.h"/>
</source>
<source path="." project_relative_path="." type="other">
<files mask="new_project.mex"/>
</source>
<source path="." project_relative_path="board" type="src">
<files mask="board.c"/>
<files mask="clock_config.c"/>
</source>
<source path="." project_relative_path="board" type="c_include">
<files mask="board.h"/>
<files mask="clock_config.h"/>
</source>
<source path="." project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso armgcc">
<files mask="readme.md"/>
</source>
<source path="iar" project_relative_path="LPC804/iar" type="linker" toolchain="iar">
<files mask="LPC804_flash.icf"/>
</source>
<source path="mdk" project_relative_path="LPC804/arm" type="linker" toolchain="mdk">
<files mask="LPC804_flash.scf"/>
</source>
<source path="armgcc" project_relative_path="LPC804/gcc" type="linker" toolchain="armgcc">
<files mask="LPC804_flash.ld"/>
</source>
</example>
</ksdk:examples>

57
boards/lpcxpresso804/demo_apps/new_project/peripherals.c Normal file
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/*
* Copyright 2017-2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Peripherals v8.0
processor: LPC804
package_id: LPC804M101JDH24
mcu_data: ksdk2_0
processor_version: 0.9.4
board: LPCXpresso804
functionalGroups:
- name: BOARD_InitPeripherals
UUID: 4d2f4a99-7981-4376-859d-05028596f45c
called_from_default_init: true
selectedCore: core0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
component:
- type: 'system'
- type_id: 'system'
- global_system_definitions:
- user_definitions: ''
- user_includes: ''
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/***********************************************************************************************************************
* Included files
**********************************************************************************************************************/
#include "peripherals.h"
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals(void)
{
}
/***********************************************************************************************************************
* BOARD_InitBootPeripherals function
**********************************************************************************************************************/
void BOARD_InitBootPeripherals(void)
{
BOARD_InitPeripherals();
}

35
boards/lpcxpresso804/demo_apps/new_project/peripherals.h Normal file
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/*
* Copyright 2017-2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PERIPHERALS_H_
#define _PERIPHERALS_H_
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/***********************************************************************************************************************
* Initialization functions
**********************************************************************************************************************/
void BOARD_InitPeripherals(void);
/***********************************************************************************************************************
* BOARD_InitBootPeripherals function
**********************************************************************************************************************/
void BOARD_InitBootPeripherals(void);
#if defined(__cplusplus)
}
#endif
#endif /* _PERIPHERALS_H_ */

409
boards/lpcxpresso804/demo_apps/new_project/pin_mux.c Normal file
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/*
* Copyright 2017-2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v8.0
processor: LPC804
package_id: LPC804M101JDH24
mcu_data: ksdk2_0
processor_version: 0.9.4
board: LPCXpresso804
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_iocon.h"
#include "fsl_swm.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
BOARD_InitDEBUG_UARTPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list: []
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitPins(void)
{
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLEDsPins:
- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '10', peripheral: GPIO, signal: 'PIO0, 11', pin_signal: PIO0_11/ADC_6/WKTCLKIN, direction: OUTPUT, gpio_init_state: 'true', mode: inactive, invert: disabled,
hysteresis: enabled, opendrain: disabled}
- {pin_num: '5', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: LED_GREEN, direction: OUTPUT, gpio_init_state: 'true', mode: inactive, invert: disabled,
hysteresis: enabled, opendrain: disabled}
- {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/ADC_10, identifier: LED_RED, direction: OUTPUT, gpio_init_state: 'true', mode: inactive,
invert: disabled, hysteresis: enabled, opendrain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitLEDsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitLEDsPins(void)
{
/* Enables clock for IOCON.: enable */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO0 module */
CLOCK_EnableClock(kCLOCK_Gpio0);
gpio_pin_config_t LED_BLUE_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U,
};
/* Initialize GPIO functionality on pin PIO0_11 (pin 10) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
gpio_pin_config_t LED_GREEN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U,
};
/* Initialize GPIO functionality on pin PIO0_12 (pin 5) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
gpio_pin_config_t LED_RED_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 1U,
};
/* Initialize GPIO functionality on pin PIO0_13 (pin 4) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
const uint32_t LED_BLUE = (/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN11 (coords: 10) is configured as GPIO, PIO0, 11. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_11, LED_BLUE);
const uint32_t LED_GREEN = (/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN12 (coords: 5) is configured as GPIO, PIO0, 12. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_12, LED_GREEN);
const uint32_t LED_RED = (/* No addition pin function */
IOCON_PIO_MODE_INACT |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN13 (coords: 4) is configured as GPIO, PIO0, 13. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_13, LED_RED);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '22', peripheral: USART0, signal: RXD, pin_signal: PIO0_0/ACMP_I1, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
- {pin_num: '7', peripheral: USART0, signal: TXD, pin_signal: PIO0_4/ADC_11, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitDEBUG_UARTPins(void)
{
/* Enables clock for IOCON.: enable */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables clock for switch matrix.: enable */
CLOCK_EnableClock(kCLOCK_Swm);
const uint32_t DEBUG_UART_RX = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN0 (coords: 22) is configured as USART0, RXD. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_0, DEBUG_UART_RX);
const uint32_t DEBUG_UART_TX = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN4 (coords: 7) is configured as USART0, TXD. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_4, DEBUG_UART_TX);
/* USART0_TXD connect to P0_4 */
SWM_SetMovablePinSelect(SWM0, kSWM_USART0_TXD, kSWM_PortPin_P0_4);
/* USART0_RXD connect to P0_0 */
SWM_SetMovablePinSelect(SWM0, kSWM_USART0_RXD, kSWM_PortPin_P0_0);
/* Disable clock for switch matrix. */
CLOCK_DisableClock(kCLOCK_Swm);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSWD_DEBUGPins:
- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '8', peripheral: SWD, signal: SWCLK, pin_signal: SWCLK/PIO0_3, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
- {pin_num: '9', peripheral: SWD, signal: SWDIO, pin_signal: SWDIO/PIO0_2, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
- {pin_num: '6', peripheral: SYSCON, signal: RESETN, pin_signal: RESETN/PIO0_5, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitSWD_DEBUGPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitSWD_DEBUGPins(void)
{
/* Enables clock for IOCON.: enable */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables clock for switch matrix.: enable */
CLOCK_EnableClock(kCLOCK_Swm);
const uint32_t DEBUG_SWD_SWDIO = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN2 (coords: 9) is configured as SWD, SWDIO. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_2, DEBUG_SWD_SWDIO);
const uint32_t DEBUG_SWD_SWDCLK = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN3 (coords: 8) is configured as SWD, SWCLK. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_3, DEBUG_SWD_SWDCLK);
const uint32_t DEBUG_SWD_RESETN = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN5 (coords: 6) is configured as SYSCON, RESETN. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_5, DEBUG_SWD_RESETN);
/* SWCLK connect to P0_3 */
SWM_SetFixedPinSelect(SWM0, kSWM_SWCLK, true);
/* SWDIO connect to P0_2 */
SWM_SetFixedPinSelect(SWM0, kSWM_SWDIO, true);
/* RESETN connect to P0_5 */
SWM_SetFixedPinSelect(SWM0, kSWM_RESETN, true);
/* Disable clock for switch matrix. */
CLOCK_DisableClock(kCLOCK_Swm);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitI2CPins:
- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '23', peripheral: I2C0, signal: SCL, pin_signal: PIO0_14/ACMP_I3/ADC_2, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
- {pin_num: '20', peripheral: I2C0, signal: SDA, pin_signal: PIO0_7/ADC_1/ACMPVREF, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitI2CPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitI2CPins(void)
{
/* Enables clock for IOCON.: enable */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables clock for switch matrix.: enable */
CLOCK_EnableClock(kCLOCK_Swm);
const uint32_t I2C_SCL = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN14 (coords: 23) is configured as I2C0, SCL. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_14, I2C_SCL);
const uint32_t I2C_SDA = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN7 (coords: 20) is configured as I2C0, SDA. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_7, I2C_SDA);
/* I2C0_SDA connect to P0_7 */
SWM_SetMovablePinSelect(SWM0, kSWM_I2C0_SDA, kSWM_PortPin_P0_7);
/* I2C0_SCL connect to P0_14 */
SWM_SetMovablePinSelect(SWM0, kSWM_I2C0_SCL, kSWM_PortPin_P0_14);
/* Disable clock for switch matrix. */
CLOCK_DisableClock(kCLOCK_Swm);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitBUTTONsPins:
- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
- pin_list:
- {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/ADC_10, identifier: S1, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: enabled,
opendrain: disabled}
- {pin_num: '5', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: S2, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: enabled,
opendrain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBUTTONsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
/* Function assigned for the Cortex-M0P */
void BOARD_InitBUTTONsPins(void)
{
/* Enables clock for IOCON.: enable */
CLOCK_EnableClock(kCLOCK_Iocon);
/* Enables the clock for the GPIO0 module */
CLOCK_EnableClock(kCLOCK_Gpio0);
gpio_pin_config_t S2_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U,
};
/* Initialize GPIO functionality on pin PIO0_12 (pin 5) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
gpio_pin_config_t S1_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U,
};
/* Initialize GPIO functionality on pin PIO0_13 (pin 4) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
const uint32_t S2 = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN12 (coords: 5) is configured as GPIO, PIO0, 12. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_12, S2);
const uint32_t S1 = (/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Enable hysteresis */
IOCON_PIO_HYS_EN |
/* Input not invert */
IOCON_PIO_INV_DI |
/* Disables Open-drain function */
IOCON_PIO_OD_DI);
/* PIO0 PIN13 (coords: 4) is configured as GPIO, PIO0, 13. */
IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_13, S1);
/* Disable clock for switch matrix. */
CLOCK_DisableClock(kCLOCK_Swm);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

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boards/lpcxpresso804/demo_apps/new_project/pin_mux.h Normal file
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@ -0,0 +1,536 @@
/*
* Copyright 2017-2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/***********************************************************************************************************************
* Definitions
**********************************************************************************************************************/
/*! @brief Direction type */
typedef enum _pin_mux_direction
{
kPIN_MUX_DirectionInput = 0U, /* Input direction */
kPIN_MUX_DirectionOutput = 1U, /* Output direction */
kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
} pin_mux_direction_t;
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
/*! @name PIO0_11 (number 10), CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
/*!
* @brief Signal name */
#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
/*!
* @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 11
/*!
* @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_11
/*!
* @brief Label */
#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11"
/*!
* @brief Identifier */
#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
/*!
* @brief Direction */
#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
/* Symbols to be used with GPIO driver */
/*!
* @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
/*!
* @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 11U
/*!
* @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 11U)
/*!
* @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN 11U
/*!
* @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 11U)
/* @} */
/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
/*!
* @brief Signal name */
#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
/*!
* @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 12
/*!
* @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_12
/*!
* @brief Label */
#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
/*!
* @brief Identifier */
#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
/*!
* @brief Direction */
#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
/* Symbols to be used with GPIO driver */
/*!
* @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
/*!
* @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 12U
/*!
* @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 12U)
/*!
* @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN 12U
/*!
* @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 12U)
/* @} */
/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
/*!
* @brief Signal name */
#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
/*!
* @brief Signal channel */
#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 13
/*!
* @brief Routed pin name */
#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_13
/*!
* @brief Label */
#define BOARD_INITLEDSPINS_LED_RED_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
/*!
* @brief Identifier */
#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
/*!
* @brief Direction */
#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
/* Symbols to be used with GPIO driver */
/*!
* @brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
/*!
* @brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 13U
/*!
* @brief GPIO pin mask */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 13U)
/*!
* @brief PORT device index: 0 */
#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_RED_PIN 13U
/*!
* @brief PORT pin mask */
#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 13U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
/*! @name PIO0_0 (number 22), CN7[3]/CN8[8]/JP2/PIO0_0
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
/*!
* @brief Signal name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
/*!
* @brief Routed pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_0
/*!
* @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "CN7[3]/CN8[8]/JP2/PIO0_0"
/*!
* @brief Identifier */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 0U
/*!
* @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 0U)
/* @} */
/*! @name PIO0_4 (number 7), CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
/*!
* @brief Signal name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
/*!
* @brief Routed pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_4
/*!
* @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4"
/*!
* @brief Identifier */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 4U
/*!
* @brief PORT pin mask */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 4U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
/*! @name SWCLK (number 8), CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD
/*!
* @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK
/*!
* @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK
/*!
* @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3"
/*!
* @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 3U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 3U)
/* @} */
/*! @name SWDIO (number 9), CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
/*!
* @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
/*!
* @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
/*!
* @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2"
/*!
* @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 2U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 2U)
/* @} */
/*! @name RESETN (number 6), CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
/*!
* @brief Signal name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
/*!
* @brief Routed pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
/*!
* @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5"
/*!
* @brief Identifier */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN 5U
/*!
* @brief PORT pin mask */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_MASK (1U << 5U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
/*! @name PIO0_14 (number 23), CN7[2]/CN3[1]/JP4/PIO0_14
@{ */
/* Routed pin properties */
#define BOARD_INITI2CPINS_I2C_SCL_PERIPHERAL I2C0 /*!<@brief Peripheral name */
#define BOARD_INITI2CPINS_I2C_SCL_SIGNAL SCL /*!<@brief Signal name */
#define BOARD_INITI2CPINS_I2C_SCL_PIN_NAME PIO0_14 /*!<@brief Routed pin name */
#define BOARD_INITI2CPINS_I2C_SCL_LABEL "CN7[2]/CN3[1]/JP4/PIO0_14" /*!<@brief Label */
#define BOARD_INITI2CPINS_I2C_SCL_NAME "I2C_SCL" /*!<@brief Identifier */
#define BOARD_INITI2CPINS_I2C_SCL_PORT 0U /*!<@brief PORT device index: 0 */
#define BOARD_INITI2CPINS_I2C_SCL_PIN 14U /*!<@brief PORT pin number */
#define BOARD_INITI2CPINS_I2C_SCL_PIN_MASK (1U << 14U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PIO0_7 (number 20), CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITI2CPINS_I2C_SDA_PERIPHERAL I2C0
/*!
* @brief Signal name */
#define BOARD_INITI2CPINS_I2C_SDA_SIGNAL SDA
/*!
* @brief Routed pin name */
#define BOARD_INITI2CPINS_I2C_SDA_PIN_NAME PIO0_7
/*!
* @brief Label */
#define BOARD_INITI2CPINS_I2C_SDA_LABEL "CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7"
/*!
* @brief Identifier */
#define BOARD_INITI2CPINS_I2C_SDA_NAME "I2C_SDA"
/*!
* @brief PORT device index: 0 */
#define BOARD_INITI2CPINS_I2C_SDA_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITI2CPINS_I2C_SDA_PIN 7U
/*!
* @brief PORT pin mask */
#define BOARD_INITI2CPINS_I2C_SDA_PIN_MASK (1U << 7U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */
#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITBUTTONSPINS_S1_PERIPHERAL GPIO
/*!
* @brief Signal name */
#define BOARD_INITBUTTONSPINS_S1_SIGNAL PIO0
/*!
* @brief Signal channel */
#define BOARD_INITBUTTONSPINS_S1_CHANNEL 13
/*!
* @brief Routed pin name */
#define BOARD_INITBUTTONSPINS_S1_PIN_NAME PIO0_13
/*!
* @brief Label */
#define BOARD_INITBUTTONSPINS_S1_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
/*!
* @brief Identifier */
#define BOARD_INITBUTTONSPINS_S1_NAME "S1"
/*!
* @brief Direction */
#define BOARD_INITBUTTONSPINS_S1_DIRECTION kPIN_MUX_DirectionInput
/* Symbols to be used with GPIO driver */
/*!
* @brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO
/*!
* @brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN 13U
/*!
* @brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 13U)
/*!
* @brief PORT device index: 0 */
#define BOARD_INITBUTTONSPINS_S1_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S1_PIN 13U
/*!
* @brief PORT pin mask */
#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 13U)
/* @} */
/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
@{ */
/* Routed pin properties */
/*!
* @brief Peripheral name */
#define BOARD_INITBUTTONSPINS_S2_PERIPHERAL GPIO
/*!
* @brief Signal name */
#define BOARD_INITBUTTONSPINS_S2_SIGNAL PIO0
/*!
* @brief Signal channel */
#define BOARD_INITBUTTONSPINS_S2_CHANNEL 12
/*!
* @brief Routed pin name */
#define BOARD_INITBUTTONSPINS_S2_PIN_NAME PIO0_12
/*!
* @brief Label */
#define BOARD_INITBUTTONSPINS_S2_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
/*!
* @brief Identifier */
#define BOARD_INITBUTTONSPINS_S2_NAME "S2"
/*!
* @brief Direction */
#define BOARD_INITBUTTONSPINS_S2_DIRECTION kPIN_MUX_DirectionInput
/* Symbols to be used with GPIO driver */
/*!
* @brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO
/*!
* @brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN 12U
/*!
* @brief GPIO pin mask */
#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 12U)
/*!
* @brief PORT device index: 0 */
#define BOARD_INITBUTTONSPINS_S2_PORT 0U
/*!
* @brief PORT pin number */
#define BOARD_INITBUTTONSPINS_S2_PIN 12U
/*!
* @brief PORT pin mask */
#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 12U)
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

24
boards/lpcxpresso804/demo_apps/new_project/readme.md Normal file
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@ -0,0 +1,24 @@
Overview
========
The new project is provided as empty project with device/board setup prepared. User can add additional customization take this project as starting point.
SDK version
===========
- Version: 2.15.000
Toolchain supported
===================
- IAR embedded Workbench 9.40.1
- Keil MDK 5.38.1
- GCC ARM Embedded 12.2
- MCUXpresso 11.8.0
Prepare the Demo
================
NA
Running the demo
================
NA

0
boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/build_all.sh Executable file → Normal file
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boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/clean.sh Executable file → Normal file
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boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

BIN
boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/power_mode_switch_lpc.bin Executable file → Normal file
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0
boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/power_mode_switch_lpc_v3_13.xml → boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/power_mode_switch_lpc_v3_14.xml
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/acomp_basic_v3_13.xml → boards/lpcxpresso804/driver_examples/acomp/acomp_basic/acomp_basic_v3_14.xml
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/build_all.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/build_debug.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/build_release.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/clean.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/driver_examples/acomp/acomp_basic/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/acomp_interrupt_v3_13.xml → boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/acomp_interrupt_v3_14.xml
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/build_all.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/build_debug.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/build_release.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/clean.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/driver_examples/acomp/acomp_interrupt/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/build_all.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/build_debug.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/build_release.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/clean.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/lpc_adc_basic_v3_13.xml → boards/lpcxpresso804/driver_examples/adc/lpc_adc_basic/lpc_adc_basic_v3_14.xml
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/build_all.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/build_debug.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/build_release.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/clean.sh Executable file → Normal file
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0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/lpc_adc_burst_v3_13.xml → boards/lpcxpresso804/driver_examples/adc/lpc_adc_burst/lpc_adc_burst_v3_14.xml
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0
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boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/armgcc/build_debug.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/armgcc/build_release.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/armgcc/clean.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/armgcc/config.cmake Executable file → Normal file
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4
boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/lpc_adc_interrupt_v3_13.xml → boards/lpcxpresso804/driver_examples/adc/lpc_adc_interrupt/lpc_adc_interrupt_v3_14.xml
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0
boards/lpcxpresso804/driver_examples/bod/armgcc/build_all.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/bod/armgcc/build_debug.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/bod/armgcc/build_release.sh Executable file → Normal file
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boards/lpcxpresso804/driver_examples/bod/armgcc/config.cmake Executable file → Normal file
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boards/lpcxpresso804/driver_examples/bod/armgcc/flags.cmake Executable file → Normal file
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@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")
SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
-Wl,--print-memory-usage \
${FPU} \
${SPECS} \
-T${ProjDirPath}/LPC804_flash.ld -static \
-T\"${ProjDirPath}/LPC804_flash.ld\" -static \
")

0
boards/lpcxpresso804/driver_examples/bod/lpc_bod_v3_13.xml → boards/lpcxpresso804/driver_examples/bod/lpc_bod_v3_14.xml
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boards/lpcxpresso804/driver_examples/capt/capt_acomp/armgcc/build_all.sh Executable file → Normal file
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