WCH_CH57x_PAC/src/spi0/r8_spi0_int_flag.rs
Yilin Sun 4efd89758a
Initial commit.
Signed-off-by: Yilin Sun <imi415@imi.moe>
2023-01-27 20:39:58 +08:00

177 lines
7.7 KiB
Rust

#[doc = "Register `R8_SPI0_INT_FLAG` reader"]
pub struct R(crate::R<R8_SPI0_INT_FLAG_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<R8_SPI0_INT_FLAG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<R8_SPI0_INT_FLAG_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<R8_SPI0_INT_FLAG_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `R8_SPI0_INT_FLAG` writer"]
pub struct W(crate::W<R8_SPI0_INT_FLAG_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<R8_SPI0_INT_FLAG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<R8_SPI0_INT_FLAG_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<R8_SPI0_INT_FLAG_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RB_SPI_IF_CNT_END` reader - RW1, interrupt flag for SPI total byte count end"]
pub type RB_SPI_IF_CNT_END_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_CNT_END` writer - RW1, interrupt flag for SPI total byte count end"]
pub type RB_SPI_IF_CNT_END_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_IF_BYTE_END` reader - RW1, interrupt flag for SPI byte exchanged"]
pub type RB_SPI_IF_BYTE_END_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_BYTE_END` writer - RW1, interrupt flag for SPI byte exchanged"]
pub type RB_SPI_IF_BYTE_END_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_IF_FIFO_HF` reader - RW1, interrupt flag for SPI FIFO half (RB_SPI_FIFO_DIR ? >=4bytes : less than 4bytes)"]
pub type RB_SPI_IF_FIFO_HF_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_FIFO_HF` writer - RW1, interrupt flag for SPI FIFO half (RB_SPI_FIFO_DIR ? >=4bytes : less than 4bytes)"]
pub type RB_SPI_IF_FIFO_HF_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_IF_DMA_END` reader - RW1, interrupt flag for SPI0 DMA completion"]
pub type RB_SPI_IF_DMA_END_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_DMA_END` writer - RW1, interrupt flag for SPI0 DMA completion"]
pub type RB_SPI_IF_DMA_END_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_IF_FIFO_OV` reader - RW1, interrupt flag for SPI0 FIFO overflow"]
pub type RB_SPI_IF_FIFO_OV_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_FIFO_OV` writer - RW1, interrupt flag for SPI0 FIFO overflow"]
pub type RB_SPI_IF_FIFO_OV_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_FREE` reader - RO, current SPI free status"]
pub type RB_SPI_FREE_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_FREE` writer - RO, current SPI free status"]
pub type RB_SPI_FREE_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
#[doc = "Field `RB_SPI_IF_FST_BYTE` reader - RW1, interrupt flag for SPI0 slave mode first byte received"]
pub type RB_SPI_IF_FST_BYTE_R = crate::BitReader<bool>;
#[doc = "Field `RB_SPI_IF_FST_BYTE` writer - RW1, interrupt flag for SPI0 slave mode first byte received"]
pub type RB_SPI_IF_FST_BYTE_W<'a, const O: u8> =
crate::BitWriter<'a, u8, R8_SPI0_INT_FLAG_SPEC, bool, O>;
impl R {
#[doc = "Bit 0 - RW1, interrupt flag for SPI total byte count end"]
#[inline(always)]
pub fn rb_spi_if_cnt_end(&self) -> RB_SPI_IF_CNT_END_R {
RB_SPI_IF_CNT_END_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - RW1, interrupt flag for SPI byte exchanged"]
#[inline(always)]
pub fn rb_spi_if_byte_end(&self) -> RB_SPI_IF_BYTE_END_R {
RB_SPI_IF_BYTE_END_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - RW1, interrupt flag for SPI FIFO half (RB_SPI_FIFO_DIR ? >=4bytes : less than 4bytes)"]
#[inline(always)]
pub fn rb_spi_if_fifo_hf(&self) -> RB_SPI_IF_FIFO_HF_R {
RB_SPI_IF_FIFO_HF_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - RW1, interrupt flag for SPI0 DMA completion"]
#[inline(always)]
pub fn rb_spi_if_dma_end(&self) -> RB_SPI_IF_DMA_END_R {
RB_SPI_IF_DMA_END_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - RW1, interrupt flag for SPI0 FIFO overflow"]
#[inline(always)]
pub fn rb_spi_if_fifo_ov(&self) -> RB_SPI_IF_FIFO_OV_R {
RB_SPI_IF_FIFO_OV_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 6 - RO, current SPI free status"]
#[inline(always)]
pub fn rb_spi_free(&self) -> RB_SPI_FREE_R {
RB_SPI_FREE_R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - RW1, interrupt flag for SPI0 slave mode first byte received"]
#[inline(always)]
pub fn rb_spi_if_fst_byte(&self) -> RB_SPI_IF_FST_BYTE_R {
RB_SPI_IF_FST_BYTE_R::new(((self.bits >> 7) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - RW1, interrupt flag for SPI total byte count end"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_cnt_end(&mut self) -> RB_SPI_IF_CNT_END_W<0> {
RB_SPI_IF_CNT_END_W::new(self)
}
#[doc = "Bit 1 - RW1, interrupt flag for SPI byte exchanged"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_byte_end(&mut self) -> RB_SPI_IF_BYTE_END_W<1> {
RB_SPI_IF_BYTE_END_W::new(self)
}
#[doc = "Bit 2 - RW1, interrupt flag for SPI FIFO half (RB_SPI_FIFO_DIR ? >=4bytes : less than 4bytes)"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_fifo_hf(&mut self) -> RB_SPI_IF_FIFO_HF_W<2> {
RB_SPI_IF_FIFO_HF_W::new(self)
}
#[doc = "Bit 3 - RW1, interrupt flag for SPI0 DMA completion"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_dma_end(&mut self) -> RB_SPI_IF_DMA_END_W<3> {
RB_SPI_IF_DMA_END_W::new(self)
}
#[doc = "Bit 4 - RW1, interrupt flag for SPI0 FIFO overflow"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_fifo_ov(&mut self) -> RB_SPI_IF_FIFO_OV_W<4> {
RB_SPI_IF_FIFO_OV_W::new(self)
}
#[doc = "Bit 6 - RO, current SPI free status"]
#[inline(always)]
#[must_use]
pub fn rb_spi_free(&mut self) -> RB_SPI_FREE_W<6> {
RB_SPI_FREE_W::new(self)
}
#[doc = "Bit 7 - RW1, interrupt flag for SPI0 slave mode first byte received"]
#[inline(always)]
#[must_use]
pub fn rb_spi_if_fst_byte(&mut self) -> RB_SPI_IF_FST_BYTE_W<7> {
RB_SPI_IF_FST_BYTE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "RW1, SPI0 interrupt flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_spi0_int_flag](index.html) module"]
pub struct R8_SPI0_INT_FLAG_SPEC;
impl crate::RegisterSpec for R8_SPI0_INT_FLAG_SPEC {
type Ux = u8;
}
#[doc = "`read()` method returns [r8_spi0_int_flag::R](R) reader structure"]
impl crate::Readable for R8_SPI0_INT_FLAG_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [r8_spi0_int_flag::W](W) writer structure"]
impl crate::Writable for R8_SPI0_INT_FLAG_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets R8_SPI0_INT_FLAG to value 0"]
impl crate::Resettable for R8_SPI0_INT_FLAG_SPEC {
const RESET_VALUE: Self::Ux = 0;
}