10 lines
641 B
Markdown
10 lines
641 B
Markdown
# STi7105 hardware boot procedure
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## What we have learned
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* STi7105 starts execution at address `0xA000_0000`, in little endian mode.
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* Boot from SPI flash: the flash is mapped to EMI address space at `0xA000_0000`, determined by hardware pins.
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* In 29-bit mode, these ranges are the same EMI address space as the processor simply discarded the higher 3 address bits.
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* The EMI can only be accessed in 32 bits, so XIP cannot be achieved.
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* MMU is forced active in 32bit(SE) mode, TLB or PMB has to be configured before mode switching
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* Most address space which PMB can configure is in P2/P3, which cannot be accessed when in user mode (U0)
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