2008-02-29 12:37:45 +00:00
|
|
|
/***************************************************************************
|
|
|
|
* Copyright (C) 2007, 2008 by Ben Dooks *
|
|
|
|
* ben@fluff.org *
|
|
|
|
* *
|
|
|
|
* This program is free software; you can redistribute it and/or modify *
|
|
|
|
* it under the terms of the GNU General Public License as published by *
|
|
|
|
* the Free Software Foundation; either version 2 of the License, or *
|
|
|
|
* (at your option) any later version. *
|
|
|
|
* *
|
|
|
|
* This program is distributed in the hope that it will be useful, *
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
|
|
|
* GNU General Public License for more details. *
|
|
|
|
* *
|
|
|
|
* You should have received a copy of the GNU General Public License *
|
|
|
|
* along with this program; if not, write to the *
|
|
|
|
* Free Software Foundation, Inc., *
|
2013-06-02 19:32:36 +00:00
|
|
|
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
|
2008-02-29 12:37:45 +00:00
|
|
|
***************************************************************************/
|
|
|
|
|
2009-11-09 11:10:11 +00:00
|
|
|
#ifndef S3C24xx_NAND_H
|
|
|
|
#define S3C24xx_NAND_H
|
|
|
|
|
2008-02-29 12:37:45 +00:00
|
|
|
/*
|
2008-02-19 19:52:09 +00:00
|
|
|
* S3C24XX Series OpenOCD NAND Flash controller support.
|
|
|
|
*
|
|
|
|
* Many thanks to Simtec Electronics for sponsoring this work.
|
|
|
|
*/
|
|
|
|
|
2009-12-05 06:04:37 +00:00
|
|
|
#include "imp.h"
|
|
|
|
#include "s3c24xx_regs.h"
|
|
|
|
#include <target/target.h>
|
2008-02-19 19:52:09 +00:00
|
|
|
|
2012-01-31 11:07:53 +00:00
|
|
|
struct s3c24xx_nand_controller {
|
2008-02-19 19:52:09 +00:00
|
|
|
/* register addresses */
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t cmd;
|
|
|
|
uint32_t addr;
|
|
|
|
uint32_t data;
|
|
|
|
uint32_t nfstat;
|
2009-11-13 15:38:52 +00:00
|
|
|
};
|
2008-02-19 19:52:09 +00:00
|
|
|
|
|
|
|
/* Default to using the un-translated NAND register based address */
|
|
|
|
#undef S3C2410_NFREG
|
|
|
|
#define S3C2410_NFREG(x) ((x) + 0x4e000000)
|
|
|
|
|
2009-11-10 13:32:51 +00:00
|
|
|
#define S3C24XX_DEVICE_COMMAND() \
|
|
|
|
COMMAND_HELPER(s3c24xx_nand_device_command, \
|
2009-11-13 19:32:17 +00:00
|
|
|
struct nand_device *nand, \
|
2009-11-13 15:38:52 +00:00
|
|
|
struct s3c24xx_nand_controller **info)
|
2009-11-10 13:32:51 +00:00
|
|
|
|
|
|
|
S3C24XX_DEVICE_COMMAND();
|
|
|
|
|
|
|
|
#define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
|
|
|
|
do { \
|
|
|
|
int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
|
|
|
|
if (ERROR_OK != retval) \
|
|
|
|
return retval; \
|
|
|
|
} while (0)
|
2009-11-09 11:10:11 +00:00
|
|
|
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c24xx_reset(struct nand_device *nand);
|
2008-02-19 19:52:09 +00:00
|
|
|
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c24xx_command(struct nand_device *nand, uint8_t command);
|
|
|
|
int s3c24xx_address(struct nand_device *nand, uint8_t address);
|
2009-11-09 11:10:11 +00:00
|
|
|
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c24xx_write_data(struct nand_device *nand, uint16_t data);
|
|
|
|
int s3c24xx_read_data(struct nand_device *nand, void *data);
|
2009-11-09 11:10:11 +00:00
|
|
|
|
2008-02-19 19:52:09 +00:00
|
|
|
#define s3c24xx_write_page NULL
|
|
|
|
#define s3c24xx_read_page NULL
|
|
|
|
|
|
|
|
/* code shared between different controllers */
|
|
|
|
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c2440_nand_ready(struct nand_device *nand, int timeout);
|
2009-11-09 11:10:11 +00:00
|
|
|
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c2440_read_block_data(struct nand_device *nand,
|
2009-11-09 11:10:11 +00:00
|
|
|
uint8_t *data, int data_size);
|
2009-11-13 19:32:17 +00:00
|
|
|
int s3c2440_write_block_data(struct nand_device *nand,
|
2009-11-09 11:10:11 +00:00
|
|
|
uint8_t *data, int data_size);
|
2008-02-19 19:52:09 +00:00
|
|
|
|
2012-01-31 11:07:53 +00:00
|
|
|
#endif /* S3C24xx_NAND_H */
|