2022-06-26 23:06:45 +00:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2006-06-02 10:36:31 +00:00
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/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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2009-07-17 19:54:25 +00:00
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* Copyright (C) 2007,2008 Øyvind Harboe *
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2008-07-25 06:54:17 +00:00
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* oyvind.harboe@zylin.com *
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2006-06-02 10:36:31 +00:00
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***************************************************************************/
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2012-02-02 15:08:51 +00:00
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2014-12-11 18:11:49 +00:00
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/* 2014-12: Addition of the SWD protocol support is based on the initial work
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* by Paul Fertser and modifications by Jean-Christian de Rivaz. */
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2006-07-17 14:13:27 +00:00
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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2006-06-02 10:36:31 +00:00
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#include "bitbang.h"
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2009-12-03 12:14:31 +00:00
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#include <jtag/interface.h>
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2009-12-03 12:14:30 +00:00
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#include <jtag/commands.h>
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2009-01-09 07:42:45 +00:00
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2009-01-23 07:10:11 +00:00
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/**
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* Function bitbang_stableclocks
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* issues a number of clock cycles while staying in a stable state.
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* Because the TMS value required to stay in the RESET state is a 1, whereas
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* the TMS value required to stay in any of the other stable states is a 0,
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* this function checks the current stable state to decide on the value of TMS
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* to use.
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*/
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2017-12-13 21:13:22 +00:00
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static int bitbang_stableclocks(int num_cycles);
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2009-01-09 07:42:45 +00:00
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2015-11-13 22:48:46 +00:00
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static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
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2009-11-13 12:10:56 +00:00
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struct bitbang_interface *bitbang_interface;
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2006-06-02 10:36:31 +00:00
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2008-05-26 12:12:03 +00:00
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/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
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2008-12-13 06:25:50 +00:00
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*
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2008-05-26 12:12:03 +00:00
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* Set this to 1 and str912 reset halt will fail.
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2008-12-13 06:25:50 +00:00
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*
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2008-05-26 12:12:03 +00:00
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* If someone can submit a patch with an explanation it will be greatly
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2009-07-17 19:54:25 +00:00
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* appreciated, but as far as I can tell (ØH) DCLK is generated upon
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2009-06-23 22:42:54 +00:00
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* clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
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2008-12-13 06:25:50 +00:00
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* The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
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2008-05-26 12:12:03 +00:00
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* state". With hardware there is no such thing as *while* in a state. There
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* are only edges. So clk => 0 is in fact a very subtle state transition that
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2009-07-17 19:54:25 +00:00
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* happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
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2008-12-13 06:25:50 +00:00
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*
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2008-05-26 12:12:03 +00:00
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* For "reset halt" the last thing that happens before srst is asserted
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* is that the breakpoint is set up. If DCLK is not wiggled one last
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* time before the reset, then the breakpoint is not set up and
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* "reset halt" will fail to halt.
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2008-12-13 06:25:50 +00:00
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*
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2008-05-26 12:12:03 +00:00
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*/
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2008-12-13 06:25:50 +00:00
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#define CLOCK_IDLE() 0
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2008-05-26 11:46:05 +00:00
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2008-03-12 16:01:30 +00:00
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/* The bitbang driver leaves the TCK 0 when in idle */
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2009-04-21 05:29:23 +00:00
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static void bitbang_end_state(tap_state_t state)
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2006-06-02 10:36:31 +00:00
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{
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2017-12-13 21:13:22 +00:00
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assert(tap_is_state_stable(state));
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tap_set_end_state(state);
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2006-06-02 10:36:31 +00:00
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}
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2017-12-13 21:13:22 +00:00
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static int bitbang_state_move(int skip)
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2009-02-03 05:59:17 +00:00
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{
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2009-06-23 22:42:54 +00:00
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int i = 0, tms = 0;
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2009-06-18 07:07:12 +00:00
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uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
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2009-05-18 20:21:53 +00:00
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int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
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2009-06-04 00:56:41 +00:00
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2012-02-02 15:08:51 +00:00
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for (i = skip; i < tms_count; i++) {
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2006-06-02 10:36:31 +00:00
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tms = (tms_scan >> i) & 1;
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2006-06-02 10:36:31 +00:00
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}
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2008-12-13 06:25:50 +00:00
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2009-02-03 05:59:17 +00:00
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tap_set_state(tap_get_end_state());
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2017-12-13 21:13:22 +00:00
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return ERROR_OK;
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2006-06-02 10:36:31 +00:00
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}
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2010-03-01 07:25:18 +00:00
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/**
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* Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
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* (or SWD) state machine.
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*/
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static int bitbang_execute_tms(struct jtag_command *cmd)
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{
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2012-02-02 15:08:51 +00:00
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unsigned num_bits = cmd->cmd.tms->num_bits;
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const uint8_t *bits = cmd->cmd.tms->bits;
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2010-03-01 07:25:18 +00:00
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2016-12-14 00:33:17 +00:00
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LOG_DEBUG_IO("TMS: %d bits", num_bits);
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2010-03-01 07:25:18 +00:00
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int tms = 0;
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2012-02-02 15:08:51 +00:00
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for (unsigned i = 0; i < num_bits; i++) {
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2010-03-01 07:25:18 +00:00
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tms = ((bits[i/8] >> (i % 8)) & 1);
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2010-03-01 07:25:18 +00:00
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}
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2010-03-01 07:25:18 +00:00
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return ERROR_OK;
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}
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2017-12-13 21:13:22 +00:00
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static int bitbang_path_move(struct pathmove_command *cmd)
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2006-07-17 14:13:27 +00:00
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{
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int num_states = cmd->num_states;
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int state_count;
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2008-03-26 13:29:48 +00:00
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int tms = 0;
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2006-07-17 14:13:27 +00:00
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state_count = 0;
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2012-02-02 15:08:51 +00:00
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while (num_states) {
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2009-02-10 18:21:17 +00:00
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if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
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2008-03-12 18:05:07 +00:00
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tms = 0;
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2009-02-10 18:21:17 +00:00
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else if (tap_state_transition(tap_get_state(), true) == cmd->path[state_count])
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2008-03-12 18:05:07 +00:00
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tms = 1;
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2012-02-02 15:08:51 +00:00
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else {
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LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
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tap_state_name(tap_get_state()),
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tap_state_name(cmd->path[state_count]));
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2006-07-17 14:13:27 +00:00
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exit(-1);
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}
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2008-12-13 06:25:50 +00:00
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2008-03-12 18:05:07 +00:00
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2009-02-03 05:59:17 +00:00
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tap_set_state(cmd->path[state_count]);
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2006-07-17 14:13:27 +00:00
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state_count++;
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num_states--;
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}
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2008-12-13 06:25:50 +00:00
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2008-03-12 18:05:07 +00:00
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2009-02-03 05:59:17 +00:00
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tap_set_end_state(tap_get_state());
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2017-12-13 21:13:22 +00:00
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return ERROR_OK;
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2006-07-17 14:13:27 +00:00
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}
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2017-12-13 21:13:22 +00:00
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static int bitbang_runtest(int num_cycles)
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2006-06-02 10:36:31 +00:00
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{
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int i;
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2008-12-13 06:25:50 +00:00
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2009-02-03 05:59:17 +00:00
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tap_state_t saved_end_state = tap_get_end_state();
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2008-12-13 06:25:50 +00:00
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2008-12-13 06:59:24 +00:00
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/* only do a state_move when we're not already in IDLE */
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2012-02-02 15:08:51 +00:00
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if (tap_get_state() != TAP_IDLE) {
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2008-12-13 06:25:50 +00:00
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bitbang_end_state(TAP_IDLE);
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2017-12-13 21:13:22 +00:00
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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2006-06-02 10:36:31 +00:00
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}
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2008-12-13 06:25:50 +00:00
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2006-06-02 10:36:31 +00:00
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/* execute num_cycles */
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2012-02-02 15:08:51 +00:00
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for (i = 0; i < num_cycles; i++) {
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(0, 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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2006-06-02 10:36:31 +00:00
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}
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(CLOCK_IDLE(), 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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2008-12-13 06:25:50 +00:00
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2006-06-02 10:36:31 +00:00
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/* finish in end_state */
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bitbang_end_state(saved_end_state);
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2009-02-03 05:59:17 +00:00
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if (tap_get_state() != tap_get_end_state())
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2017-12-13 21:13:22 +00:00
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_OK;
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2006-06-02 10:36:31 +00:00
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}
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2017-12-13 21:13:22 +00:00
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static int bitbang_stableclocks(int num_cycles)
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2009-01-09 07:42:45 +00:00
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{
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2009-02-03 05:59:17 +00:00
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int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
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2009-01-09 07:42:45 +00:00
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int i;
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/* send num_cycles clocks onto the cable */
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2012-02-02 15:08:51 +00:00
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for (i = 0; i < num_cycles; i++) {
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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2009-01-09 07:42:45 +00:00
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}
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2017-12-13 21:13:22 +00:00
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return ERROR_OK;
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2009-01-09 07:42:45 +00:00
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}
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2017-12-13 21:13:22 +00:00
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static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
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unsigned scan_size)
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2006-06-02 10:36:31 +00:00
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{
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2009-02-03 05:59:17 +00:00
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tap_state_t saved_end_state = tap_get_end_state();
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2017-12-13 21:13:22 +00:00
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unsigned bit_cnt;
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2008-12-13 06:25:50 +00:00
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2012-02-02 15:08:51 +00:00
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if (!((!ir_scan &&
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(tap_get_state() == TAP_DRSHIFT)) ||
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(ir_scan && (tap_get_state() == TAP_IRSHIFT)))) {
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2007-06-21 13:15:22 +00:00
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if (ir_scan)
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2008-12-13 06:25:50 +00:00
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bitbang_end_state(TAP_IRSHIFT);
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2007-06-21 13:15:22 +00:00
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else
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2008-12-13 06:25:50 +00:00
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bitbang_end_state(TAP_DRSHIFT);
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2006-06-02 10:36:31 +00:00
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2017-12-13 21:13:22 +00:00
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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2007-06-21 13:15:22 +00:00
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bitbang_end_state(saved_end_state);
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}
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2006-06-02 10:36:31 +00:00
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2017-12-13 21:13:22 +00:00
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size_t buffered = 0;
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2012-02-02 15:08:51 +00:00
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for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++) {
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2009-06-23 22:42:54 +00:00
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int tms = (bit_cnt == scan_size-1) ? 1 : 0;
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2008-10-05 19:44:41 +00:00
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int tdi;
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2009-06-23 22:42:54 +00:00
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int bytec = bit_cnt/8;
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int bcval = 1 << (bit_cnt % 8);
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2008-10-05 19:44:41 +00:00
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2006-08-17 14:53:15 +00:00
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/* if we're just reading the scan, but don't care about the output
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* default to outputting 'low', this also makes valgrind traces more readable,
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* as it removes the dependency on an uninitialised value
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2008-12-13 06:25:50 +00:00
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*/
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2009-06-23 22:42:54 +00:00
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tdi = 0;
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2008-10-05 19:44:41 +00:00
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if ((type != SCAN_IN) && (buffer[bytec] & bcval))
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2009-06-23 22:42:54 +00:00
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tdi = 1;
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2008-10-05 19:44:41 +00:00
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->write(0, tms, tdi) != ERROR_OK)
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return ERROR_FAIL;
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2008-12-13 06:25:50 +00:00
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2012-02-02 15:08:51 +00:00
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if (type != SCAN_OUT) {
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2017-12-13 21:13:22 +00:00
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if (bitbang_interface->buf_size) {
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if (bitbang_interface->sample() != ERROR_OK)
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return ERROR_FAIL;
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buffered++;
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} else {
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switch (bitbang_interface->read()) {
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case BB_LOW:
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buffer[bytec] &= ~bcval;
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break;
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case BB_HIGH:
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buffer[bytec] |= bcval;
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break;
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default:
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return ERROR_FAIL;
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}
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}
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}
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if (bitbang_interface->write(1, tms, tdi) != ERROR_OK)
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return ERROR_FAIL;
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if (type != SCAN_OUT && bitbang_interface->buf_size &&
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(buffered == bitbang_interface->buf_size ||
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bit_cnt == scan_size - 1)) {
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for (unsigned i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) {
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switch (bitbang_interface->read_sample()) {
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case BB_LOW:
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|
|
|
buffer[i/8] &= ~(1 << (i % 8));
|
|
|
|
break;
|
|
|
|
case BB_HIGH:
|
|
|
|
buffer[i/8] |= 1 << (i % 8);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
buffered = 0;
|
2006-06-02 10:36:31 +00:00
|
|
|
}
|
|
|
|
}
|
2008-12-13 06:25:50 +00:00
|
|
|
|
2012-02-02 15:08:51 +00:00
|
|
|
if (tap_get_state() != tap_get_end_state()) {
|
2009-05-06 17:25:14 +00:00
|
|
|
/* we *KNOW* the above loop transitioned out of
|
|
|
|
* the shift state, so we skip the first state
|
|
|
|
* and move directly to the end state.
|
|
|
|
*/
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_state_move(1) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2009-05-06 17:25:14 +00:00
|
|
|
}
|
2017-12-13 21:13:22 +00:00
|
|
|
return ERROR_OK;
|
2006-06-02 10:36:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int bitbang_execute_queue(void)
|
|
|
|
{
|
2012-02-02 15:08:51 +00:00
|
|
|
struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
|
2006-06-02 10:36:31 +00:00
|
|
|
int scan_size;
|
|
|
|
enum scan_type type;
|
2009-06-18 07:07:12 +00:00
|
|
|
uint8_t *buffer;
|
2007-04-25 20:15:59 +00:00
|
|
|
int retval;
|
2008-12-13 06:25:50 +00:00
|
|
|
|
2012-02-02 15:08:51 +00:00
|
|
|
if (!bitbang_interface) {
|
2008-03-25 15:45:17 +00:00
|
|
|
LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
|
2006-06-02 10:36:31 +00:00
|
|
|
exit(-1);
|
|
|
|
}
|
2008-12-13 06:25:50 +00:00
|
|
|
|
2007-04-25 20:15:59 +00:00
|
|
|
/* return ERROR_OK, unless a jtag_read_buffer returns a failed check
|
|
|
|
* that wasn't handled by a caller-provided error handler
|
2008-12-13 06:25:50 +00:00
|
|
|
*/
|
2007-04-25 20:15:59 +00:00
|
|
|
retval = ERROR_OK;
|
2008-12-13 06:25:50 +00:00
|
|
|
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_interface->blink) {
|
|
|
|
if (bitbang_interface->blink(1) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
2007-09-05 06:22:37 +00:00
|
|
|
|
2012-02-02 15:08:51 +00:00
|
|
|
while (cmd) {
|
|
|
|
switch (cmd->type) {
|
2006-06-02 10:36:31 +00:00
|
|
|
case JTAG_RUNTEST:
|
2016-12-14 00:33:17 +00:00
|
|
|
LOG_DEBUG_IO("runtest %i cycles, end in %s",
|
2012-02-02 15:08:51 +00:00
|
|
|
cmd->cmd.runtest->num_cycles,
|
|
|
|
tap_state_name(cmd->cmd.runtest->end_state));
|
2009-06-02 07:21:44 +00:00
|
|
|
bitbang_end_state(cmd->cmd.runtest->end_state);
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_runtest(cmd->cmd.runtest->num_cycles) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2006-06-02 10:36:31 +00:00
|
|
|
break;
|
2009-01-09 07:42:45 +00:00
|
|
|
|
|
|
|
case JTAG_STABLECLOCKS:
|
2009-01-23 07:10:11 +00:00
|
|
|
/* this is only allowed while in a stable state. A check for a stable
|
|
|
|
* state was done in jtag_add_clocks()
|
|
|
|
*/
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_stableclocks(cmd->cmd.stableclocks->num_cycles) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2009-01-09 07:42:45 +00:00
|
|
|
break;
|
|
|
|
|
2010-06-05 09:30:49 +00:00
|
|
|
case JTAG_TLR_RESET:
|
2016-12-14 00:33:17 +00:00
|
|
|
LOG_DEBUG_IO("statemove end in %s",
|
2012-02-02 15:08:51 +00:00
|
|
|
tap_state_name(cmd->cmd.statemove->end_state));
|
2009-06-02 07:21:44 +00:00
|
|
|
bitbang_end_state(cmd->cmd.statemove->end_state);
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_state_move(0) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2006-06-02 10:36:31 +00:00
|
|
|
break;
|
2006-07-17 14:13:27 +00:00
|
|
|
case JTAG_PATHMOVE:
|
2016-12-14 00:33:17 +00:00
|
|
|
LOG_DEBUG_IO("pathmove: %i states, end in %s",
|
2012-02-02 15:08:51 +00:00
|
|
|
cmd->cmd.pathmove->num_states,
|
|
|
|
tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_path_move(cmd->cmd.pathmove) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2006-07-17 14:13:27 +00:00
|
|
|
break;
|
2006-06-02 10:36:31 +00:00
|
|
|
case JTAG_SCAN:
|
2017-12-13 21:13:22 +00:00
|
|
|
bitbang_end_state(cmd->cmd.scan->end_state);
|
|
|
|
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
|
2016-12-14 00:33:17 +00:00
|
|
|
LOG_DEBUG_IO("%s scan %d bits; end in %s",
|
2012-02-02 15:08:51 +00:00
|
|
|
(cmd->cmd.scan->ir_scan) ? "IR" : "DR",
|
2017-12-13 21:13:22 +00:00
|
|
|
scan_size,
|
2012-02-02 15:08:51 +00:00
|
|
|
tap_state_name(cmd->cmd.scan->end_state));
|
2006-06-02 10:36:31 +00:00
|
|
|
type = jtag_scan_type(cmd->cmd.scan);
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_scan(cmd->cmd.scan->ir_scan, type, buffer,
|
|
|
|
scan_size) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
2006-06-02 10:36:31 +00:00
|
|
|
if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
|
2007-04-25 20:15:59 +00:00
|
|
|
retval = ERROR_JTAG_QUEUE_FAILED;
|
2020-08-17 08:05:11 +00:00
|
|
|
free(buffer);
|
2006-06-02 10:36:31 +00:00
|
|
|
break;
|
|
|
|
case JTAG_SLEEP:
|
2020-08-18 16:55:25 +00:00
|
|
|
LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us);
|
2006-06-02 10:36:31 +00:00
|
|
|
jtag_sleep(cmd->cmd.sleep->us);
|
|
|
|
break;
|
2010-03-01 07:25:18 +00:00
|
|
|
case JTAG_TMS:
|
|
|
|
retval = bitbang_execute_tms(cmd);
|
|
|
|
break;
|
2006-06-02 10:36:31 +00:00
|
|
|
default:
|
2008-03-25 15:45:17 +00:00
|
|
|
LOG_ERROR("BUG: unknown JTAG command type encountered");
|
2006-06-02 10:36:31 +00:00
|
|
|
exit(-1);
|
|
|
|
}
|
|
|
|
cmd = cmd->next;
|
|
|
|
}
|
2017-12-13 21:13:22 +00:00
|
|
|
if (bitbang_interface->blink) {
|
|
|
|
if (bitbang_interface->blink(0) != ERROR_OK)
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
2008-12-13 06:25:50 +00:00
|
|
|
|
2007-04-25 20:15:59 +00:00
|
|
|
return retval;
|
2006-06-02 10:36:31 +00:00
|
|
|
}
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
static int queued_retval;
|
|
|
|
|
|
|
|
static int bitbang_swd_init(void)
|
|
|
|
{
|
|
|
|
LOG_DEBUG("bitbang_swd_init");
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2020-04-01 09:00:39 +00:00
|
|
|
static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
2020-04-01 09:00:39 +00:00
|
|
|
LOG_DEBUG("bitbang_swd_exchange");
|
2014-12-11 18:11:49 +00:00
|
|
|
|
2020-04-04 17:47:09 +00:00
|
|
|
if (bitbang_interface->blink) {
|
|
|
|
/* FIXME: we should manage errors */
|
|
|
|
bitbang_interface->blink(1);
|
|
|
|
}
|
|
|
|
|
2014-12-11 18:11:49 +00:00
|
|
|
for (unsigned int i = offset; i < bit_cnt + offset; i++) {
|
|
|
|
int bytec = i/8;
|
|
|
|
int bcval = 1 << (i % 8);
|
2020-04-01 09:00:39 +00:00
|
|
|
int swdio = !rnw && (buf[bytec] & bcval);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_interface->swd_write(0, swdio);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
if (rnw && buf) {
|
|
|
|
if (bitbang_interface->swdio_read())
|
|
|
|
buf[bytec] |= bcval;
|
|
|
|
else
|
|
|
|
buf[bytec] &= ~bcval;
|
|
|
|
}
|
|
|
|
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_interface->swd_write(1, swdio);
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
2020-04-04 17:47:09 +00:00
|
|
|
|
|
|
|
if (bitbang_interface->blink) {
|
|
|
|
/* FIXME: we should manage errors */
|
|
|
|
bitbang_interface->blink(0);
|
|
|
|
}
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
|
|
|
|
2020-04-01 07:39:40 +00:00
|
|
|
static int bitbang_swd_switch_seq(enum swd_special_seq seq)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
|
|
|
LOG_DEBUG("bitbang_swd_switch_seq");
|
|
|
|
|
|
|
|
switch (seq) {
|
|
|
|
case LINE_RESET:
|
|
|
|
LOG_DEBUG("SWD line reset");
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
|
2014-12-11 18:11:49 +00:00
|
|
|
break;
|
|
|
|
case JTAG_TO_SWD:
|
|
|
|
LOG_DEBUG("JTAG-to-SWD");
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
|
2014-12-11 18:11:49 +00:00
|
|
|
break;
|
2021-11-11 15:44:27 +00:00
|
|
|
case JTAG_TO_DORMANT:
|
|
|
|
LOG_DEBUG("JTAG-to-DORMANT");
|
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_dormant, 0, swd_seq_jtag_to_dormant_len);
|
|
|
|
break;
|
2014-12-11 18:11:49 +00:00
|
|
|
case SWD_TO_JTAG:
|
|
|
|
LOG_DEBUG("SWD-to-JTAG");
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len);
|
2014-12-11 18:11:49 +00:00
|
|
|
break;
|
2021-11-11 15:44:27 +00:00
|
|
|
case SWD_TO_DORMANT:
|
|
|
|
LOG_DEBUG("SWD-to-DORMANT");
|
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_dormant, 0, swd_seq_swd_to_dormant_len);
|
|
|
|
break;
|
|
|
|
case DORMANT_TO_SWD:
|
|
|
|
LOG_DEBUG("DORMANT-to-SWD");
|
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_swd, 0, swd_seq_dormant_to_swd_len);
|
|
|
|
break;
|
|
|
|
case DORMANT_TO_JTAG:
|
|
|
|
LOG_DEBUG("DORMANT-to-JTAG");
|
|
|
|
bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_jtag, 0, swd_seq_dormant_to_jtag_len);
|
|
|
|
break;
|
2014-12-11 18:11:49 +00:00
|
|
|
default:
|
|
|
|
LOG_ERROR("Sequence %d not supported", seq);
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2015-11-13 22:48:46 +00:00
|
|
|
static void swd_clear_sticky_errors(void)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
2015-11-13 22:48:46 +00:00
|
|
|
bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT),
|
|
|
|
STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
|
|
|
|
2015-11-13 22:48:46 +00:00
|
|
|
static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
|
|
|
LOG_DEBUG("bitbang_swd_read_reg");
|
2021-06-06 15:20:10 +00:00
|
|
|
assert(cmd & SWD_CMD_RNW);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
if (queued_retval != ERROR_OK) {
|
|
|
|
LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
|
|
|
|
|
2021-11-11 15:44:27 +00:00
|
|
|
cmd |= SWD_CMD_START | SWD_CMD_PARK;
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, &cmd, 0, 8);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
bitbang_interface->swdio_drive(false);
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1);
|
2014-12-11 18:11:49 +00:00
|
|
|
bitbang_interface->swdio_drive(true);
|
|
|
|
|
|
|
|
int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
|
|
|
|
uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
|
|
|
|
int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
|
|
|
|
|
2021-11-12 14:28:30 +00:00
|
|
|
LOG_DEBUG("%s %s read reg %X = %08"PRIx32,
|
2014-12-11 18:11:49 +00:00
|
|
|
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
|
2021-06-06 15:20:10 +00:00
|
|
|
cmd & SWD_CMD_APNDP ? "AP" : "DP",
|
2014-12-11 18:11:49 +00:00
|
|
|
(cmd & SWD_CMD_A32) >> 1,
|
|
|
|
data);
|
|
|
|
|
2021-11-12 14:28:30 +00:00
|
|
|
if (ack == SWD_ACK_WAIT) {
|
2015-11-13 22:48:46 +00:00
|
|
|
swd_clear_sticky_errors();
|
2021-11-12 14:28:30 +00:00
|
|
|
continue;
|
|
|
|
} else if (ack != SWD_ACK_OK) {
|
|
|
|
queued_retval = swd_ack_to_error_code(ack);
|
2014-12-11 18:11:49 +00:00
|
|
|
return;
|
2021-11-12 14:28:30 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (parity != parity_u32(data)) {
|
|
|
|
LOG_ERROR("Wrong parity detected");
|
|
|
|
queued_retval = ERROR_FAIL;
|
2014-12-11 18:11:49 +00:00
|
|
|
return;
|
|
|
|
}
|
2021-11-12 14:28:30 +00:00
|
|
|
if (value)
|
|
|
|
*value = data;
|
|
|
|
if (cmd & SWD_CMD_APNDP)
|
|
|
|
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
|
|
|
|
return;
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-13 22:48:46 +00:00
|
|
|
static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
|
|
|
LOG_DEBUG("bitbang_swd_write_reg");
|
2021-06-06 15:20:10 +00:00
|
|
|
assert(!(cmd & SWD_CMD_RNW));
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
if (queued_retval != ERROR_OK) {
|
|
|
|
LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2021-11-12 14:28:30 +00:00
|
|
|
/* Devices do not reply to DP_TARGETSEL write cmd, ignore received ack */
|
|
|
|
bool check_ack = swd_cmd_returns_ack(cmd);
|
|
|
|
|
2022-06-01 17:47:48 +00:00
|
|
|
/* init the array to silence scan-build */
|
|
|
|
uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)] = {0};
|
2014-12-11 18:11:49 +00:00
|
|
|
for (;;) {
|
|
|
|
buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32, value);
|
|
|
|
buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value));
|
|
|
|
|
2021-11-11 15:44:27 +00:00
|
|
|
cmd |= SWD_CMD_START | SWD_CMD_PARK;
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, &cmd, 0, 8);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
bitbang_interface->swdio_drive(false);
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
|
2014-12-11 18:11:49 +00:00
|
|
|
bitbang_interface->swdio_drive(true);
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
|
2021-11-12 14:28:30 +00:00
|
|
|
|
|
|
|
LOG_DEBUG("%s%s %s write reg %X = %08"PRIx32,
|
|
|
|
check_ack ? "" : "ack ignored ",
|
2014-12-11 18:11:49 +00:00
|
|
|
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
|
2021-06-06 15:20:10 +00:00
|
|
|
cmd & SWD_CMD_APNDP ? "AP" : "DP",
|
2014-12-11 18:11:49 +00:00
|
|
|
(cmd & SWD_CMD_A32) >> 1,
|
|
|
|
buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
|
|
|
|
|
2021-11-12 14:28:30 +00:00
|
|
|
if (check_ack) {
|
|
|
|
if (ack == SWD_ACK_WAIT) {
|
|
|
|
swd_clear_sticky_errors();
|
|
|
|
continue;
|
|
|
|
} else if (ack != SWD_ACK_OK) {
|
|
|
|
queued_retval = swd_ack_to_error_code(ack);
|
|
|
|
return;
|
|
|
|
}
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
2021-11-12 14:28:30 +00:00
|
|
|
|
|
|
|
if (cmd & SWD_CMD_APNDP)
|
|
|
|
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
|
|
|
|
return;
|
2014-12-11 18:11:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-13 22:48:46 +00:00
|
|
|
static int bitbang_swd_run_queue(void)
|
2014-12-11 18:11:49 +00:00
|
|
|
{
|
|
|
|
LOG_DEBUG("bitbang_swd_run_queue");
|
|
|
|
/* A transaction must be followed by another transaction or at least 8 idle cycles to
|
|
|
|
* ensure that data is clocked through the AP. */
|
2020-04-01 09:00:39 +00:00
|
|
|
bitbang_swd_exchange(true, NULL, 0, 8);
|
2014-12-11 18:11:49 +00:00
|
|
|
|
|
|
|
int retval = queued_retval;
|
|
|
|
queued_retval = ERROR_OK;
|
|
|
|
LOG_DEBUG("SWD queue return value: %02x", retval);
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
const struct swd_driver bitbang_swd = {
|
|
|
|
.init = bitbang_swd_init,
|
|
|
|
.switch_seq = bitbang_swd_switch_seq,
|
|
|
|
.read_reg = bitbang_swd_read_reg,
|
|
|
|
.write_reg = bitbang_swd_write_reg,
|
|
|
|
.run = bitbang_swd_run_queue,
|
|
|
|
};
|