flash: don't write to FLASH_CR in stm32x_write_block
It's unnecessary and prevents reusing this function to fix option byte writes. Also try to disable flash writing after an error. Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083 Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/479 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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8cf671ea7b
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0900d5a3cd
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@ -37,7 +37,6 @@
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* r7 - tmp
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* r7 - tmp
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*/
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*/
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#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register from flash reg base */
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#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
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#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
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wait_fifo:
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wait_fifo:
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@ -47,8 +46,6 @@ wait_fifo:
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ldr r5, [r2, #4] /* read rp */
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ldr r5, [r2, #4] /* read rp */
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cmp r5, r6 /* wait until rp != wp */
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cmp r5, r6 /* wait until rp != wp */
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beq wait_fifo
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beq wait_fifo
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movs r6, #1 /* set PG flag to enable flash programming */
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str r6, [r0, #STM32_FLASH_CR_OFFSET]
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ldrh r6, [r5] /* "*target_address++ = *rp++" */
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ldrh r6, [r5] /* "*target_address++ = *rp++" */
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strh r6, [r4]
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strh r6, [r4]
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adds r5, #2
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adds r5, #2
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@ -604,17 +604,14 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
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/* see contrib/loaders/flash/stm32f1x.S for src */
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/* see contrib/loaders/flash/stm32f1x.S for src */
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static const uint8_t stm32x_flash_write_code[] = {
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static const uint8_t stm32x_flash_write_code[] = {
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/* #define STM32_FLASH_CR_OFFSET 0x10 */
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/* #define STM32_FLASH_SR_OFFSET 0x0C */
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/* #define STM32_FLASH_SR_OFFSET 0x0C */
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/* wait_fifo: */
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/* wait_fifo: */
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0x16, 0x68, /* ldr r6, [r2, #0] */
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0x16, 0x68, /* ldr r6, [r2, #0] */
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0x00, 0x2e, /* cmp r6, #0 */
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0x00, 0x2e, /* cmp r6, #0 */
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0x1a, 0xd0, /* beq exit */
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0x18, 0xd0, /* beq exit */
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0x55, 0x68, /* ldr r5, [r2, #4] */
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0x55, 0x68, /* ldr r5, [r2, #4] */
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0xb5, 0x42, /* cmp r5, r6 */
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0xb5, 0x42, /* cmp r5, r6 */
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0xf9, 0xd0, /* beq wait_fifo */
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0xf9, 0xd0, /* beq wait_fifo */
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0x01, 0x26, /* movs r6, #1 */
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0x06, 0x61, /* str r6, [r0, #STM32_FLASH_CR_OFFSET] */
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0x2e, 0x88, /* ldrh r6, [r5, #0] */
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0x2e, 0x88, /* ldrh r6, [r5, #0] */
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0x26, 0x80, /* strh r6, [r4, #0] */
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0x26, 0x80, /* strh r6, [r4, #0] */
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0x02, 0x35, /* adds r5, #2 */
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0x02, 0x35, /* adds r5, #2 */
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@ -636,7 +633,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
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0x01, 0x39, /* subs r1, r1, #1 */
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0x01, 0x39, /* subs r1, r1, #1 */
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0x00, 0x29, /* cmp r1, #0 */
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0x00, 0x29, /* cmp r1, #0 */
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0x02, 0xd0, /* beq exit */
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0x02, 0xd0, /* beq exit */
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0xe3, 0xe7, /* b wait_fifo */
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0xe5, 0xe7, /* b wait_fifo */
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/* error: */
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/* error: */
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0x00, 0x20, /* movs r0, #0 */
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0x00, 0x20, /* movs r0, #0 */
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0x50, 0x60, /* str r0, [r2, #4] */
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0x50, 0x60, /* str r0, [r2, #4] */
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@ -751,6 +748,10 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
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if (retval != ERROR_OK)
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return retval;
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/* multiple half words (2-byte) to be programmed? */
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/* multiple half words (2-byte) to be programmed? */
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if (words_remaining > 0) {
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if (words_remaining > 0) {
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/* try using a block write */
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/* try using a block write */
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@ -769,22 +770,19 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
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}
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}
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if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
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if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
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return retval;
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goto reset_pg_and_lock;
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while (words_remaining > 0) {
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while (words_remaining > 0) {
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uint16_t value;
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uint16_t value;
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memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
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memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
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retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, address, value);
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retval = target_write_u16(target, address, value);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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goto reset_pg_and_lock;
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retval = stm32x_wait_status_busy(bank, 5);
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retval = stm32x_wait_status_busy(bank, 5);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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goto reset_pg_and_lock;
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bytes_written += 2;
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bytes_written += 2;
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words_remaining--;
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words_remaining--;
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@ -795,19 +793,20 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
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uint16_t value = 0xffff;
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uint16_t value = 0xffff;
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memcpy(&value, buffer + bytes_written, bytes_remaining);
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memcpy(&value, buffer + bytes_written, bytes_remaining);
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retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, address, value);
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retval = target_write_u16(target, address, value);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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goto reset_pg_and_lock;
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retval = stm32x_wait_status_busy(bank, 5);
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retval = stm32x_wait_status_busy(bank, 5);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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goto reset_pg_and_lock;
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}
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}
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return target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
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return target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
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reset_pg_and_lock:
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target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
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return retval;
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}
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}
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static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
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static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
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