doc: Updated RISC-V memory-related cmds in documentation

- "riscv set_prefer_sba" - removed from the doc, superseded
  by the latter
- "riscv set_mem_access" - new command, new entry added
  into the doc

This change only addresses the documentation. The corresponding
implementation of the RISC-V commands is already merged.

Change-Id: I3c07672cde94324407cf667504dba5402f63a543
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6743
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This commit is contained in:
Jan Matyas 2021-11-22 14:50:30 +01:00 committed by Antonio Borneo
parent d8f64f8e35
commit 654c18a408
1 changed files with 21 additions and 3 deletions

View File

@ -10272,9 +10272,27 @@ Set the maximum time to wait for a hart to come out of reset after reset is
deasserted. deasserted.
@end deffn @end deffn
@deffn {Command} {riscv set_prefer_sba} on|off @deffn {Command} {riscv set_scratch_ram} none|[address]
When on, prefer to use System Bus Access to access memory. When off (default), Set the address of 16 bytes of scratch RAM the debugger can use, or 'none'.
prefer to use the Program Buffer to access memory. This is used to access 64-bit floating point registers on 32-bit targets.
@end deffn
@deffn Command {riscv set_mem_access} method1 [method2] [method3]
Specify which RISC-V memory access method(s) shall be used, and in which order
of priority. At least one method must be specified.
Available methods are:
@itemize
@item @code{progbuf} - Use RISC-V Debug Program Buffer to access memory.
@item @code{sysbus} - Access memory via RISC-V Debug System Bus interface.
@item @code{abstract} - Access memory via RISC-V Debug abstract commands.
@end itemize
By default, all memory access methods are enabled in the following order:
@code{progbuf sysbus abstract}.
This command can be used to change the memory access methods if the default
behavior is not suitable for a particular target.
@end deffn @end deffn
@deffn {Command} {riscv set_enable_virtual} on|off @deffn {Command} {riscv set_enable_virtual} on|off