doxygen: remove warnings
Change-Id: I020845a8df7b67f3b6c1a233b3ee07a5d14fa685 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/556 Tested-by: jenkins
This commit is contained in:
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e2535e7901
commit
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2
HACKING
2
HACKING
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@ -90,7 +90,7 @@ chmod +x .git/hooks/commit-msg
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@code
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tools/initial.sh <username>
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@endcode
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With <username> being your Gerrit username.
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With @<username@> being your Gerrit username.
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-# Set up git with your name and email:
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@code
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git config --global user.name "John Smith"
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@ -19,7 +19,8 @@
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***************************************************************************/
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/**
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* @file Definition of the commands supported by the OpenULINK firmware.
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* @file
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* Definition of the commands supported by the OpenULINK firmware.
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*
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* Basically, two types of commands can be distinguished:
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* - Commands with fixed payload size
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@ -22,7 +22,8 @@
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#define REG_EZUSB_H
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/**
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* @file All information in this file was taken from the EZ-USB Technical
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* @file
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* All information in this file was taken from the EZ-USB Technical
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* Reference Manual, Cypress Semiconductor, 3901 North First Street
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* San Jose, CA 95134 (www.cypress.com).
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*
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@ -28,7 +28,8 @@
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#include "reg_ezusb.h"
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/**
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* @file Implementation of the OpenULINK communication protocol.
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* @file
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* Implementation of the OpenULINK communication protocol.
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*
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* The OpenULINK protocol uses one OUT and one IN endpoint. These two endpoints
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* are configured to use the maximum packet size for full-speed transfers,
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@ -75,8 +76,6 @@ void execute_set_led_command(void)
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/**
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* Executes one command and updates global command indexes.
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*
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* @param index the index of the Bulk EP2-OUT data buffer at which the
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* command ID is stored.
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* @return true if this command was the last command.
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* @return false if there are more commands within the current contents of the
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* Bulk EP2-OUT data buffer.
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@ -19,7 +19,8 @@
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***************************************************************************/
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/**
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* @file Defines USB descriptors, interrupt routines and helper functions.
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* @file
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* Defines USB descriptors, interrupt routines and helper functions.
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* To minimize code size, we make the following assumptions:
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* - The OpenULINK has exactly one configuration
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* - and exactly one alternate setting
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@ -74,7 +74,7 @@ static int reset_jtag(void)
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static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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uint8_t *d_out, int len)
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{
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*Inputs:
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* - d_in: This is the data that will be shifted into the JTAG DR reg.
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@ -113,14 +113,14 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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return retval;
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}
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*Inputs:
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* - data_to_shift_into_ir: This is the data that will be shifted into the JTAG IR reg.
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* - data_shifted_out_of_ir: The data that will be shifted out of the JTAG IR reg will be
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* stored here
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* - len: Length of the data to be shifted to JTAG IR.
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/**
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* Test func
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*
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* @param target
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* @param d_in This is the data that will be shifted into the JTAG IR reg.
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* @param d_out The data that will be shifted out of the JTAG IR reg will be stored here.
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* @apram ir_len Length of the data to be shifted to JTAG IR.
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*
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*-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*/
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static int dsp5680xx_irscan(struct target *target, uint32_t *d_in,
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uint32_t *d_out, uint8_t ir_len)
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@ -302,7 +302,7 @@ static int dsp5680xx_exe3(struct target *target, uint16_t opcode1,
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return retval;
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}
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/**
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/*
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*--------------- Real-time data exchange ---------------
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* The EOnCE Transmit (OTX) and Receive (ORX) registers are data memory mapped, each with an upper
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* and lower 16 bit word.
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@ -372,7 +372,7 @@ static int core_rx_lower_data(struct target *target, uint8_t *data_read)
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return retval;
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}
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/**
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/*
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*-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- --
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*-- -- -- -- --- -- -- -Core Instructions- -- -- -- --- -- -- -- --- --
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*-- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- -- -- -- --- --
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@ -884,7 +884,7 @@ static int dsp5680xx_init_target(struct command_context *cmd_ctx,
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dsp5680xx_context.debug_mode_enabled = false;
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LOG_DEBUG("target initiated!");
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/* TODO core tap must be enabled before running these commands, currently
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this is done in the .cfg tcl script. */
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* this is done in the .cfg tcl script. */
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return ERROR_OK;
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}
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@ -1049,7 +1049,7 @@ static int dsp5680xx_resume(struct target *target, int current,
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}
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LOG_DEBUG("EOnCE status: 0x%02X.", eonce_status);
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} else {
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/**
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/*
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* If debug mode was not enabled but target was halted, then it is most likely that
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* access to eonce registers is locked.
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* Reset target to make it run again.
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@ -1090,7 +1090,7 @@ static int dsp5680xx_resume(struct target *target, int current,
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*/
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static int dsp5680xx_convert_address(uint32_t *address, int *pmem)
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{
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/**
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/*
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* Distinguish data memory (x) from program memory (p) by the address.
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* Addresses over S_FILE_DATA_OFFSET are considered (x) memory.
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*/
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@ -1818,7 +1818,7 @@ static int dsp5680xx_f_signature(struct target *t, uint32_t a, uint32_t words,
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if (!dsp5680xx_context.debug_mode_enabled) {
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retval = eonce_enter_debug_mode_without_reset(target, NULL);
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/**
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/*
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* Generate error here, since it is not done in eonce_enter_debug_mode_without_reset
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*/
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err_check(retval, DSP5680XX_ERROR_HALT,
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@ -1849,7 +1849,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased,
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}
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retval = set_fm_ck_div(target);
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err_check_propagate(retval);
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/**
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/*
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* Check if chip is already erased.
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*/
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tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2;
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retval = dsp5680xx_halt(target);
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err_check_propagate(retval);
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}
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Reset SIM
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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retval = dsp5680xx_f_SIM_reset(target);
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err_check_propagate(retval);
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Set hfmdiv
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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retval = set_fm_ck_div(target);
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err_check_propagate(retval);
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@ -1936,7 +1936,7 @@ int dsp5680xx_f_erase(struct target *target, int first, int last)
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return ERROR_OK;
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}
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/**
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/*
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* Algorithm for programming normal p: flash
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* Follow state machine from "56F801x Peripheral Reference Manual"@163.
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* Registers to set up before calling:
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@ -2005,15 +2005,15 @@ int dsp5680xx_f_wr(struct target *t, uint8_t *b, uint32_t a, uint32_t count,
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retval = eonce_enter_debug_mode(target, NULL);
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err_check_propagate(retval);
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}
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Download the pgm that flashes.
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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const uint32_t len = pgm_write_pflash_length;
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uint32_t ram_addr = 0x8700;
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/**
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/*
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* This seems to be a safe address.
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* This one is the one used by codewarrior in 56801x_flash.cfg
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*/
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retval = dsp5680xx_execute_queue();
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err_check_propagate(retval);
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}
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Set hfmdiv
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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retval = set_fm_ck_div(target);
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err_check_propagate(retval);
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Setup registers needed by pgm_write_pflash
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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dsp5680xx_context.flush = 0;
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err_check_propagate(retval);
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retval = core_move_long_to_r2(target, HFM_BASE_ADDR); /* FM base address to r2 */
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err_check_propagate(retval);
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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* Run flashing program.
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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/* write to HFM_CNFG (lock=0, select bank) */
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retval = core_move_value_at_r2_disp(target, 0x00, HFM_CNFG);
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}
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dsp5680xx_context.flush = 1;
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if (!is_flash_lock) {
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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/*
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*Verify flash (skip when exec lock sequence)
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*
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*/
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uint16_t signature;
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err_check_propagate(retval);
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instr = HFM_CLK_DEFAULT;
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retval =
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dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
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16);
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retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out, 16);
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err_check_propagate(retval);
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jtag_add_sleep(TIME_DIV_FREESCALE * 150 * 1000);
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jtag_add_sleep(150);
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instr = 0x0606ffff;
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retval =
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dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
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retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
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32);
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err_check_propagate(retval);
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DSP5680XX_JTAG_MASTER_TAP_IRLEN);
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err_check_propagate(retval);
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instr = 0x2;
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retval =
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dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
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retval = dsp5680xx_drscan(target, (uint8_t *) &instr, (uint8_t *) &ir_out,
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4);
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err_check_propagate(retval);
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struct jtag_tap *tap_cpu;
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uint16_t lock_word[] = { HFM_LOCK_FLASH };
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retval =
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dsp5680xx_f_wr(target, (uint8_t *) (lock_word), HFM_LOCK_ADDR_L, 2,
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1);
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retval = dsp5680xx_f_wr(target, (uint8_t *) (lock_word), HFM_LOCK_ADDR_L, 2, 1);
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err_check_propagate(retval);
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jtag_add_reset(0, 1);
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@ -35,7 +35,6 @@
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* The chip has two taps in the JTAG chain, the Master tap and the Core tap.
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* In this code the Master tap is only used to unlock the flash memory by executing a JTAG instruction.
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*
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*
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*/
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#define S_FILE_DATA_OFFSET 0x200000
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*/
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/** ----------------------------------------------------------------
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* Register Select Encoding (eonce_rev.1.0_0208081.pdf@14)
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* Register Select Encoding (eonce_rev.1.0_0208081.pdf:14)
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* ----------------------------------------------------------------
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*/
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#define DSP5680XX_ONCE_NOREG 0x00 /* No register selected */
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#define FLUSH_COUNT_READ_WRITE 8192 /* This value works, higher values (and lower...) may work as well. */
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#define FLUSH_COUNT_FLASH 8192
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/** ----------------------------------------------------------------
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* HFM (flash module) Commands (ref:MC56F801xRM.pdf@159)
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* HFM (flash module) Commands (ref:MC56F801xRM.pdf:159)
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* ----------------------------------------------------------------
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*/
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#define HFM_ERASE_VERIFY 0x05
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*/
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/** ----------------------------------------------------------------
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* Flashing (ref:MC56F801xRM.pdf@159)
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* Flashing (ref:MC56F801xRM.pdf:159)
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* ----------------------------------------------------------------
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*/
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#define HFM_BASE_ADDR 0x0F400 /** In x: mem. (write to S_FILE_DATA_OFFSET+HFM_BASE_ADDR
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#define HFM_EXEC_COMPLETE 0x40
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/* User status register (USTAT) masks (MC56F80XXRM.pdf@6.7.5) */
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/* User status register (USTAT) masks (MC56F80XXRM.pdf:6.7.5) */
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#define HFM_USTAT_MASK_BLANK 0x4
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#define HFM_USTAT_MASK_PVIOL_ACCER 0x30
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*/
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/** ----------------------------------------------------------------
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* Register Memory Map (eonce_rev.1.0_0208081.pdf@16)
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* Register Memory Map (eonce_rev.1.0_0208081.pdf:16)
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* ----------------------------------------------------------------
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*/
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#define MC568013_EONCE_OBASE_ADDR 0xFF
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* @param buffer
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* @param address Word addressing.
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* @param count In bytes.
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* @param verify_flash Execute a CRC check after flashing.
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* @param is_flash_lock
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*
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* @return
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*/
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uint32_t count, int is_flash_lock);
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/**
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* The FM has the funcionality of checking if the flash array is erased. This function
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* The FM has the functionality of checking if the flash array is erased. This function
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* executes it. It does not support individual sector analysis.
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*
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* @param target
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@ -337,7 +336,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t * erased,
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/**
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* Erases either a sector or the complete flash array. If either the range first-last covers
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* the complete array or if @first == 0 and @last == 0 then a mass erase command is executed
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* the complete array or if first == 0 and last == 0 then a mass erase command is executed
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* on the FM. If not, then individual sectors are erased.
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*
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* @param target
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@ -382,4 +381,4 @@ int dsp5680xx_f_lock(struct target *target);
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*/
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int dsp5680xx_f_unlock(struct target *target);
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#endif /* dsp5680xx.h */
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#endif /* DSP5680XX_H */
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