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target/arm_dpm: prevent endless loop in arm_dpm_full_context()

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The code treats registers that are shadowed in FIQ mode in a special
way: to read them out the target is first switches to USR mode. But
since USR != ANY the current implementation later skips register read,
and the loop becomes endless in case any !valid ARM_MODE_ANY is
present at the moment arm_dpm_full_context() is called. This was
reported in https://sourceforge.net/p/openocd/tickets/76/. The issue
surfaced because 2efb1f14f6 added two
ARM_MODE_ANY registers ("sp" and "lr") which were not normally read,
so at the time a user was calling "arm reg" they were not valid.

Fix this by changing the mode appropriately while keeping the "mode"
variable state intact so it would later match register's mode.

Compile-tested only.

Change-Id: I01840e8fa20ec392220138a3f1497ac25deb080a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2278
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Paul Fertser 2014-08-31 11:04:39 +04:00 committed by Spencer Oliver
parent 447fb25324
commit e77b7447f7
1 changed files with 7 additions and 6 deletions
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13
src/target/arm_dpm.c
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@ -648,14 +648,15 @@ static int arm_dpm_full_context(struct target *target)
did_read = true;
mode = r->mode;
/* For R8..R12 when we've entered debug
* state in FIQ mode... patch mode.
/* For regular (ARM_MODE_ANY) R8..R12
* in case we've entered debug state
* in FIQ mode we need to patch mode.
*/
if (mode == ARM_MODE_ANY)
mode = ARM_MODE_USR;
if (mode != ARM_MODE_ANY)
retval = dpm_modeswitch(dpm, mode);
else
retval = dpm_modeswitch(dpm, ARM_MODE_USR);
/* REVISIT error checks */
retval = dpm_modeswitch(dpm, mode);
if (retval != ERROR_OK)
goto done;
}