The exception being declarations for drivers. Those should
be split out in some clean way -- like driver add/remove calls
made by initialization code -- but that's for another day.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In target_type.h it's documented that the target must be
halted for add_breakpoint() ... and with slight ambiguity,
also for its add_watchpoint() sibling. So rather than
verifying that constraint in the CPU drivers, do it in the
target_add_{break,watch}point() routines.
Add minor paranoia on the remove_*point() paths too: save
the return value, and print it out in in the LOG_DEBUG message
in case it's nonzero.
Note that with some current cores, like all ARMv7 ones I've
looked at, there's no technical issue preventing watchpoint or
breakpoint add/remove operations on active cores. This model
seems deeply wired into OpenOCD though.
ALSO: the ARM targets were fairly "good" about enforcing that
constraint themselves. The MIPS ones were relied on other code
to catch such stuff, but it's not clear such code existed ...
keep an eye out for new issues on MIPS.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
Create a generic register_cache_invalidate(), and use it to
replace three all-but-identical core-specific routines:
- armv4_5_invalidate_core_regs()
- armv7m_invalidate_core_regs
- mips32_invalidate_core_regs() too.
Make cache->num_regs be unsigned, avoiding various errors.
Net code shrink and simplification.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No need to indirect from registered integers to pointers.
Just stash the pointers directly in the register struct,
and don't even bother registering.
This is a small code shrink, speeds register access just
a smidgeon, and gets rid of another rude exit() path.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARRAY_SIZE macro was defined in several target files, so move it
to types.h.
This patch also removes two other identical macros: DIM (from jtag.h)
and asizeof (from arm11.h).
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
breakpoints actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Subsequent patches expect all command handlers to use a uniform
parameter naming scheme. In the entire tree, these two files used
standard 'argv' instead of our non-standard 'args'. This patch opts
to reduces the noise required to unify the command handlers, using
dominant 'args' form.
A future patch may be used to convert us back to the standard argv, but
that requires coordination with all developers to minimize disruptions.
This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use new target_to_cm3() and target_to_armv7m() inlines,
instead of a series of x->arch_info conversions. Remove
arch_info, since nothing uses it.
Also fix an omission: the Cortex-M3 commands didn't verify
that they were operating on that kind of target. Add comment
about the ARMv7M version of that omission.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fail watchpoint_add() if it's the same address but the
parameters are different ... don't just assume having
the same address means the same watchpoint! (Note that
overlapping watchpoints aren't detected...)
Handle unrecognized return codes more sanely; don't exit()!
And describe command params right.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Expose most DWT registers via Tcl; there are a few more, but
those are mostly for profiling along with the ITM. Having
this set available enables operations which aren't possible
with just the standard watchpoint operations.
The cycle counter may be interesting. Turn it on after reset
by setting the LSB of the dwt_ctrl register, and it counts
CPU clocks. You can program the comparator 0 watchpoint to
trigger on a given cycle count, rather than a data address.
Likewise, comparator 1 may be able to match data values given
address matches from one or two other comparators. (Not all
hardware supports this capability though; try it. That is
something the standard watchpoint methods should eventually
handle, for the single address case.)
Minor cleanup: remove needless functional indirection for
exposing the v7m architctural registers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There's no reason to read which interrupts are enabled from
the NVIC; that state isn't used. Plus, it's highly dynamic
since firmware can change it at any time; remove the support
for those state records.
Remove duplicate definition of DWT_CTRL address; shrink a line.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix the watchpoint error checks, and do them in add(), not later
in set() when it's mostly too late. Support the full range of
watchpoint sizes (1 to 32K bytes each), and check alignments.
Minor cleanup of DWT access: shrink lines, use "+" for address
calculations, comment a few issues. Add debug message reporting
DWT capabilities, matching the message for FBP, and some minor
code and spec review comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Unneeded exports cause confusion about the module interfaces.
Make most functions static, and fix some line-too-long issues.
Delete some now-obviously-unused code.
The forward decls are just code clutter; move their references
later, after the normal declarations. (Or vice versa.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
