32 lines
758 B
INI
32 lines
758 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Cadence virtual debug interface
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# Arm Cortex A53x2 through JTAG
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source [find interface/vdebug.cfg]
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set _CORES 2
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set _CHIPNAME a53
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set _MEMSTART 0x00000000
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set _MEMSIZE 0x1000000
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set _CPUTAPID 0x5ba00477
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# vdebug select transport
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transport select jtag
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# JTAG reset config, frequency and reset delay
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reset_config trst_and_srst
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adapter speed 50000
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adapter srst delay 5
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# BFM hierarchical path and input clk period
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vdebug bfm_path tbench.u_vd_jtag_bfm 10ns
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# DMA Memories to access backdoor (up to 4)
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vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag arp_init-reset
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source [find target/vd_aarch64.cfg]
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