66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2008 Lou Deluxe *
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* lou.openocd012@fixit.nospammail.net *
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***************************************************************************/
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#ifndef OPENOCD_JTAG_DRIVERS_RLINK_DTC_CMD_H
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#define OPENOCD_JTAG_DRIVERS_RLINK_DTC_CMD_H
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/* A command position with the high nybble of 0x0 is reserved for an error condition.
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* If executed, it stops the DTC and raises the ERROR flag */
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#define DTC_CMD_SHIFT_TMS_BYTES(bytes) ((0x1 << 4) | ((bytes) - 1))
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/* Shift 1-16 bytes out TMS. TDI is 0. */
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/* Bytes to shift follow. */
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#define DTC_CMD_SHIFT_TDI_BYTES(bytes) ((0x2 << 4) | ((bytes) - 1))
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/* Shift 1-16 bytes out TDI. TMS is 0. */
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/* Bytes to shift follow. */
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#define DTC_CMD_SHIFT_TDI_AND_TMS_BYTES(bytes) ((0x3 << 4) | ((bytes) - 1))
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/* Shift 1-16 byte pairs out TDI and TMS. */
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/* Byte pairs to shift follow in TDI, TMS order. */
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#define DTC_CMD_SHIFT_TDO_BYTES(bytes) ((0x4 << 4) | ((bytes) - 1))
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/* Shift 1-16 bytes in TDO. TMS is unaffected. */
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/* Reply buffer contains bytes shifted in. */
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#define DTC_CMD_SHIFT_TDIO_BYTES(bytes) ((0x6 << 4) | ((bytes) - 1))
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/* Shift 1-16 bytes out TDI and in TDO. TMS is unaffected. */
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#define DTC_CMD_SHIFT_TMS_TDI_BIT_PAIR(tms, tdi, tdo) ((0x8 << 4) | (\
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(tms) ? (1 << 0) : 0 \
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) | (\
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(tdi) ? (1 << 1) : 0 \
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) | (\
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(tdo) ? (1 << 3) : 0 \
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))
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/* Single bit shift.
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* tms and tdi are the levels shifted out on TMS and TDI, respectively.
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* tdo indicates whether a byte will be returned in the reply buffer with its
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* least significant bit set to reflect TDO
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* Care should be taken when tdo is zero, as the underlying code actually does put
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* that byte in the reply buffer. Setting tdo to zero just moves the pointer back.
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* The result is that if this command is executed when the reply buffer is already full,
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* a byte will be written erroneously to memory not belonging to the reply buffer.
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* This could be worked around at the expense of DTC code space and speed. */
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#define DTC_CMD_SHIFT_TMS_BITS(bits) ((0x9 << 4) | ((bits) - 1))
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/* Shift 1-8 bits out TMS. */
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/* Bits to be shifted out are left justified in the following byte. */
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#define DTC_CMD_SHIFT_TDIO_BITS(bits) ((0xe << 4) | ((bits) - 1))
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/* Shift 1-8 bits out TDI and in TDO, TMS is unaffected. */
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/* Bits to be shifted out are left justified in the following byte. */
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/* Bits shifted in are right justified in the byte placed in the reply buffer. */
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#define DTC_CMD_STOP (0xf << 4)
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/* Stop processing the command buffer and wait for the next one. */
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/* A shared status byte is updated with bit 0 set when this has happened,
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* and it is cleared when a new command buffer becomes ready.
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* The host can poll that byte to see when it is safe to read a reply. */
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#endif /* OPENOCD_JTAG_DRIVERS_RLINK_DTC_CMD_H */
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