openocd/src/target/riscv
Tim Newsome 57e30102ea gdb_server, target: Add target_address_bits()
Targets can use this to expose how many address bits there are.
gdb_server uses this to send gdb the appropriate upper limit in the
memory-map. (Before this change the upper limit would only be correct
for 32-bit targets.)

Change-Id: Idb0933255ed53951fcfb05e040674bcdf19441e1
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4947
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-08 14:05:19 +00:00
..
asm.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
batch.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
batch.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
debug_defines.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
encoding.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
gdb_regs.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
Makefile.am Add RISC-V support. 2018-07-24 13:07:26 +01:00
opcodes.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
program.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
program.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv_semihosting.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv-011.c target/riscv-011: Fix memory leak in handle_halt_routine() 2019-02-14 09:28:33 +00:00
riscv-013.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv.c gdb_server, target: Add target_address_bits() 2019-03-08 14:05:19 +00:00
riscv.h Add RISC-V support. 2018-07-24 13:07:26 +01:00