openocd/src/target/riscv
Adrian Negreanu 850e85fa6f semihosting: print the semihosting operation id
Change-Id: If5c3568bd1c99a48ac492137f48da0d9764efe14
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/5923
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-11-07 20:50:16 +00:00
..
asm.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
batch.c Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
batch.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
debug_defines.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
encoding.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
gdb_regs.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
Makefile.am Add RISC-V support. 2018-07-24 13:07:26 +01:00
opcodes.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
program.c Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
program.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
riscv_semihosting.c semihosting: print the semihosting operation id 2020-11-07 20:50:16 +00:00
riscv-011.c Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
riscv-013.c Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00
riscv.c riscv: fix compile error 2020-10-14 11:05:22 +01:00
riscv.h Upstream tons of RISC-V changes. 2020-10-14 05:43:05 +01:00