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Author SHA1 Message Date
imi415 6cb6382aeb
Fixed PFIC handling. 2022-05-02 22:13:35 +08:00
imi415 b5305a5777
Use RISC-V vectored mode. 2022-05-02 21:56:03 +08:00
3 changed files with 111 additions and 274 deletions
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364
BSP/Startup/startup_ch32v30x_D8C.S
View File

@ -14,226 +14,116 @@
_start: _start:
j Reset_Handler /* Go! */ j Reset_Handler /* Go! */
/**
* The only mode WCH didn't break is MODE 0, non-vectored exception.
* We place the jump table here, but processed by software.
* We use `jr t1` to locate the vector table, pop t1 from stack before jumping.
*/
.align 8 .align 8
.option push .option push
.option norvc .option norvc
_vectors: _vectors:
nop .word Fault_Handler /* 0: Exception */
j Exception_Handler /* 0: Exception */ .word Default_Handler /* 1: Reserved */
lw t1, 0(sp) .word NMI_Handler /* 2: NMI */
j Default_Handler /* 1: Reserved */ .word Default_Handler /* 3: Reserved */
lw t1, 0(sp) .word Default_Handler /* 4: Reserved */
j NMI_Handler /* 2: NMI */ .word Ecall_M_Handler /* 5: M mode Ecall */
lw t1, 0(sp) .word Default_Handler /* 6: Reserved */
j Default_Handler /* 3: Reserved */ .word Default_Handler /* 7: Reserved */
lw t1, 0(sp) .word Ecall_U_Handler /* 8: U mode Ecall */
j Default_Handler /* 4: Reserved */ .word Default_Handler /* 9: Reserved */
lw t1, 0(sp) .word Default_Handler /* 10: Reserved */
j Default_Handler /* 5: Reserved */ .word Default_Handler /* 11: Reserved */
lw t1, 0(sp) .word SysTick_Handler /* 12: SysTick */
j Default_Handler /* 6: Reserved */ .word Default_Handler /* 13: Reserved */
lw t1, 0(sp) .word SW_Handler /* 14: Software */
j Default_Handler /* 7: Reserved */ .word Default_Handler /* 15: Reserved */
lw t1, 0(sp) .word WWDG_IRQHandler /* 16: Window Watchdog */
j Default_Handler /* 8: Reserved */ .word PVD_IRQHandler /* 17: PVD through EXTI Line detect */
lw t1, 0(sp) .word TAMPER_IRQHandler /* 18: TAMPER */
j Default_Handler /* 9: Reserved */ .word RTC_IRQHandler /* 19: RTC */
lw t1, 0(sp) .word FLASH_IRQHandler /* 20: Flash */
j Default_Handler /* 10: Reserved */ .word RCC_IRQHandler /* 21: RCC */
lw t1, 0(sp) .word EXTI0_IRQHandler /* 22: EXTI Line 0 */
j Default_Handler /* 11: Reserved */ .word EXTI1_IRQHandler /* 23: EXTI Line 1 */
lw t1, 0(sp) .word EXTI2_IRQHandler /* 24: EXTI Line 2 */
j SysTick_Handler /* 12: SysTick */ .word EXTI3_IRQHandler /* 25: EXTI Line 3 */
lw t1, 0(sp) .word EXTI4_IRQHandler /* 26: EXTI Line 4 */
j Default_Handler /* 13: Reserved */ .word DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */
lw t1, 0(sp) .word DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */
j SW_Handler /* 14: Software */ .word DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */
lw t1, 0(sp) .word DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */
j Default_Handler /* 15: Reserved */ .word DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */
lw t1, 0(sp) .word DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */
j WWDG_IRQHandler /* 16: Window Watchdog */ .word DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */
lw t1, 0(sp) .word ADC1_2_IRQHandler /* 34: ADC1_2 */
j PVD_IRQHandler /* 17: PVD through EXTI Line detect */ .word USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */
lw t1, 0(sp) .word USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */
j TAMPER_IRQHandler /* 18: TAMPER */ .word CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */
lw t1, 0(sp) .word CAN1_SCE_IRQHandler /* 38: CAN1 SCE */
j RTC_IRQHandler /* 19: RTC */ .word EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */
lw t1, 0(sp) .word TIM1_BRK_IRQHandler /* 40: TIM1 Break */
j FLASH_IRQHandler /* 20: Flash */ .word TIM1_UP_IRQHandler /* 41: TIM1 Update */
lw t1, 0(sp) .word TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */
j RCC_IRQHandler /* 21: RCC */ .word TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */
lw t1, 0(sp) .word TIM2_IRQHandler /* 44: TIM2 */
j EXTI0_IRQHandler /* 22: EXTI Line 0 */ .word TIM3_IRQHandler /* 45: TIM3 */
lw t1, 0(sp) .word TIM4_IRQHandler /* 46: TIM4 */
j EXTI1_IRQHandler /* 23: EXTI Line 1 */ .word I2C1_EV_IRQHandler /* 47: I2C1 Event */
lw t1, 0(sp) .word I2C1_ER_IRQHandler /* 48: I2C1 Error */
j EXTI2_IRQHandler /* 24: EXTI Line 2 */ .word I2C2_EV_IRQHandler /* 49: I2C2 Event */
lw t1, 0(sp) .word I2C2_ER_IRQHandler /* 50: I2C2 Error */
j EXTI3_IRQHandler /* 25: EXTI Line 3 */ .word SPI1_IRQHandler /* 51: SPI1 */
lw t1, 0(sp) .word SPI2_IRQHandler /* 52: SPI2 */
j EXTI4_IRQHandler /* 26: EXTI Line 4 */ .word USART1_IRQHandler /* 53: USART1 */
lw t1, 0(sp) .word USART2_IRQHandler /* 54: USART2 */
j DMA1_Channel1_IRQHandler /* 27: DMA1 Channel 1 */ .word USART3_IRQHandler /* 55: USART3 */
lw t1, 0(sp) .word EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */
j DMA1_Channel2_IRQHandler /* 28: DMA1 Channel 2 */ .word RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */
lw t1, 0(sp) .word USBWakeUp_IRQHandler /* 58: USB Wakeup from suspend */
j DMA1_Channel3_IRQHandler /* 29: DMA1 Channel 3 */ .word TIM8_BRK_IRQHandler /* 59: TIM8 Break */
lw t1, 0(sp) .word TIM8_UP_IRQHandler /* 60: TIM8 Update */
j DMA1_Channel4_IRQHandler /* 30: DMA1 Channel 4 */ .word TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */
lw t1, 0(sp) .word TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */
j DMA1_Channel5_IRQHandler /* 31: DMA1 Channel 5 */ .word RNG_IRQHandler /* 63: RNG */
lw t1, 0(sp) .word FSMC_IRQHandler /* 64: FSMC */
j DMA1_Channel6_IRQHandler /* 32: DMA1 Channel 6 */ .word SDIO_IRQHandler /* 65: SDIO */
lw t1, 0(sp) .word TIM5_IRQHandler /* 66: TIM5 */
j DMA1_Channel7_IRQHandler /* 33: DMA1 Channel 7 */ .word SPI3_IRQHandler /* 67: SPI3 */
lw t1, 0(sp) .word UART4_IRQHandler /* 68: UART4 */
j ADC1_2_IRQHandler /* 34: ADC1_2 */ .word UART5_IRQHandler /* 69: UART5 */
lw t1, 0(sp) .word TIM6_IRQHandler /* 70: TIM6 */
j USB_HP_CAN1_TX_IRQHandler /* 35: USB HP and CAN1 TX */ .word TIM7_IRQHandler /* 71: TIM7 */
lw t1, 0(sp) .word DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */
j USB_LP_CAN1_RX0_IRQHandler /* 36: USB LP and CAN1RX0 */ .word DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */
lw t1, 0(sp) .word DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */
j CAN1_RX1_IRQHandler /* 37: CAN1 RX1 */ .word DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */
lw t1, 0(sp) .word DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */
j CAN1_SCE_IRQHandler /* 38: CAN1 SCE */ .word ETH_IRQHandler /* 77: ETH */
lw t1, 0(sp) .word ETH_WKUP_IRQHandler /* 78: ETH WakeUp */
j EXTI9_5_IRQHandler /* 39: EXTI Line 9..5 */ .word CAN2_TX_IRQHandler /* 79: CAN2 TX */
lw t1, 0(sp) .word CAN2_RX0_IRQHandler /* 80: CAN2 RX0 */
j TIM1_BRK_IRQHandler /* 40: TIM1 Break */ .word CAN2_RX1_IRQHandler /* 81: CAN2 RX1 */
lw t1, 0(sp) .word CAN2_SCE_IRQHandler /* 82: CAN2 SCE */
j TIM1_UP_IRQHandler /* 41: TIM1 Update */ .word OTG_FS_IRQHandler /* 83: OTGFS */
lw t1, 0(sp) .word USBHSWakeup_IRQHandler /* 84: USBHS Wakeup */
j TIM1_TRG_COM_IRQHandler /* 42: TIM1 Trigger and Commutation */ .word USBHS_IRQHandler /* 85: USBHS */
lw t1, 0(sp) .word DVP_IRQHandler /* 86: DVP */
j TIM1_CC_IRQHandler /* 43: TIM1 Capture Compare */ .word UART6_IRQHandler /* 87: UART6 */
lw t1, 0(sp) .word UART7_IRQHandler /* 88: UART7 */
j TIM2_IRQHandler /* 44: TIM2 */ .word UART8_IRQHandler /* 89: UART8 */
lw t1, 0(sp) .word TIM9_BRK_IRQHandler /* 90: TIM9 Break */
j TIM3_IRQHandler /* 45: TIM3 */ .word TIM9_UP_IRQHandler /* 91: TIM9 Update */
lw t1, 0(sp) .word TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */
j TIM4_IRQHandler /* 46: TIM4 */ .word TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */
lw t1, 0(sp) .word TIM10_BRK_IRQHandler /* 94: TIM10 Break */
j I2C1_EV_IRQHandler /* 47: I2C1 Event */ .word TIM10_UP_IRQHandler /* 95: TIM10 Update */
lw t1, 0(sp) .word TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */
j I2C1_ER_IRQHandler /* 48: I2C1 Error */ .word TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */
lw t1, 0(sp) .word DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */
j I2C2_EV_IRQHandler /* 49: I2C2 Event */ .word DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */
lw t1, 0(sp) .word DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */
j I2C2_ER_IRQHandler /* 50: I2C2 Error */ .word DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */
lw t1, 0(sp) .word DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */
j SPI1_IRQHandler /* 51: SPI1 */ .word DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */
lw t1, 0(sp)
j SPI2_IRQHandler /* 52: SPI2 */
lw t1, 0(sp)
j USART1_IRQHandler /* 53: USART1 */
lw t1, 0(sp)
j USART2_IRQHandler /* 54: USART2 */
lw t1, 0(sp)
j USART3_IRQHandler /* 55: USART3 */
lw t1, 0(sp)
j EXTI15_10_IRQHandler /* 56: EXTI Line 15..10 */
lw t1, 0(sp)
j RTCAlarm_IRQHandler /* 57: RTC Alarm through EXTI Line */
lw t1, 0(sp)
j USBWakeUp_IRQHandler /* 58: USB Wakeup from suspend */
lw t1, 0(sp)
j TIM8_BRK_IRQHandler /* 59: TIM8 Break */
lw t1, 0(sp)
j TIM8_UP_IRQHandler /* 60: TIM8 Update */
lw t1, 0(sp)
j TIM8_TRG_COM_IRQHandler /* 61: TIM8 Trigger and Commutation */
lw t1, 0(sp)
j TIM8_CC_IRQHandler /* 62: TIM8 Capture Compare */
lw t1, 0(sp)
j RNG_IRQHandler /* 63: RNG */
lw t1, 0(sp)
j FSMC_IRQHandler /* 64: FSMC */
lw t1, 0(sp)
j SDIO_IRQHandler /* 65: SDIO */
lw t1, 0(sp)
j TIM5_IRQHandler /* 66: TIM5 */
lw t1, 0(sp)
j SPI3_IRQHandler /* 67: SPI3 */
lw t1, 0(sp)
j UART4_IRQHandler /* 68: UART4 */
lw t1, 0(sp)
j UART5_IRQHandler /* 69: UART5 */
lw t1, 0(sp)
j TIM6_IRQHandler /* 70: TIM6 */
lw t1, 0(sp)
j TIM7_IRQHandler /* 71: TIM7 */
lw t1, 0(sp)
j DMA2_Channel1_IRQHandler /* 72: DMA2 Channel 1 */
lw t1, 0(sp)
j DMA2_Channel2_IRQHandler /* 73: DMA2 Channel 2 */
lw t1, 0(sp)
j DMA2_Channel3_IRQHandler /* 74: DMA2 Channel 3 */
lw t1, 0(sp)
j DMA2_Channel4_IRQHandler /* 75: DMA2 Channel 4 */
lw t1, 0(sp)
j DMA2_Channel5_IRQHandler /* 76: DMA2 Channel 5 */
lw t1, 0(sp)
j ETH_IRQHandler /* 77: ETH */
lw t1, 0(sp)
j ETH_WKUP_IRQHandler /* 78: ETH WakeUp */
lw t1, 0(sp)
j CAN2_TX_IRQHandler /* 79: CAN2 TX */
lw t1, 0(sp)
j CAN2_RX0_IRQHandler /* 80: CAN2 RX0 */
lw t1, 0(sp)
j CAN2_RX1_IRQHandler /* 81: CAN2 RX1 */
lw t1, 0(sp)
j CAN2_SCE_IRQHandler /* 82: CAN2 SCE */
lw t1, 0(sp)
j OTG_FS_IRQHandler /* 83: OTGFS */
lw t1, 0(sp)
j USBHSWakeup_IRQHandler /* 84: USBHS Wakeup */
lw t1, 0(sp)
j USBHS_IRQHandler /* 85: USBHS */
lw t1, 0(sp)
j DVP_IRQHandler /* 86: DVP */
lw t1, 0(sp)
j UART6_IRQHandler /* 87: UART6 */
lw t1, 0(sp)
j UART7_IRQHandler /* 88: UART7 */
lw t1, 0(sp)
j UART8_IRQHandler /* 89: UART8 */
lw t1, 0(sp)
j TIM9_BRK_IRQHandler /* 90: TIM9 Break */
lw t1, 0(sp)
j TIM9_UP_IRQHandler /* 91: TIM9 Update */
lw t1, 0(sp)
j TIM9_TRG_COM_IRQHandler /* 92: TIM9 Trigger and Commutation */
lw t1, 0(sp)
j TIM9_CC_IRQHandler /* 93: TIM9 Capture Compare */
lw t1, 0(sp)
j TIM10_BRK_IRQHandler /* 94: TIM10 Break */
lw t1, 0(sp)
j TIM10_UP_IRQHandler /* 95: TIM10 Update */
lw t1, 0(sp)
j TIM10_TRG_COM_IRQHandler /* 96: TIM10 Trigger and Commutation */
lw t1, 0(sp)
j TIM10_CC_IRQHandler /* 97: TIM10 Capture Compare */
lw t1, 0(sp)
j DMA2_Channel6_IRQHandler /* 98: DMA2 Channel 6 */
lw t1, 0(sp)
j DMA2_Channel7_IRQHandler /* 99: DMA2 Channel 7 */
lw t1, 0(sp)
j DMA2_Channel8_IRQHandler /* 100: DMA2 Channel 8 */
lw t1, 0(sp)
j DMA2_Channel9_IRQHandler /* 101: DMA2 Channel 9 */
lw t1, 0(sp)
j DMA2_Channel10_IRQHandler /* 102: DMA2 Channel 10 */
lw t1, 0(sp)
j DMA2_Channel11_IRQHandler /* 103: DMA2 Channel 11 */
.option pop .option pop
.section .text,"ax",@progbits .section .text,"ax",@progbits
Reset_Handler: Reset_Handler:
@ -284,53 +174,11 @@ setup_interrupts:
csrs mstatus, t0 csrs mstatus, t0
la t0, _vectors la t0, _vectors
ori t0, t0, 0 /* Non-vectored exception handling */ ori t0, t0, 3 /* PFIC exception handling */
csrw mtvec, t0 /* Use standard RISC-V exception model. */ csrw mtvec, t0
jal SystemInit jal SystemInit
jal main jal main
dead_loop: dead_loop:
j dead_loop j dead_loop
Exception_Handler:
addi sp, sp, -8
sw t0, 4(sp)
sw t1, 8(sp)
csrr t0, mcause
ble t0, x0, interrupt_handler /* Check interrupt */
li t1, 11 /* Find an M mode ecall (11) */
beq t1, t0, ecall_m_handler
li t1, 8
beq t1, t0, ecall_u_handler
j fault_handler
ecall_m_handler:
lw t0, 4(sp)
lw t1, 8(sp)
addi sp, sp, 8
j Ecall_M_Handler
ecall_u_handler:
lw t0, 4(sp)
lw t1, 8(sp)
addi sp, sp, 8
j Ecall_U_Handler
fault_handler:
lw t0, 4(sp)
lw t1, 8(sp)
addi sp, sp, 8
j Fault_Handler
interrupt_handler: /* Home made vector table */
slli t0, t0, 3 /* t0 = t0 * 8 */
la t1, _vectors
add t1, t1, t0
lw t0, 4(sp)
addi sp, sp, 8
jr t1

17
src/freertos_helper.c
View File

@ -4,19 +4,6 @@
#include "ch32v30x.h" #include "ch32v30x.h"
#include "system_ch32v30x.h" #include "system_ch32v30x.h"
void SysTick_Handler(void) __attribute__((interrupt()));
void Ecall_M_Mode_Handler(void) __attribute__((interrupt()));
extern void freertos_risc_v_mtimer_interrupt_handler(void);
/**
* Notes on FreeRTOS:
* Current FreeRTOS supports both vectored and Non-Vectored exception model,
* handled in portASM.h. WCH, however, has an unique exception model which
* vectors both exceptions and interrupts to a fixed vector table, making trap handler
* useless while handling ECALL exceptions, since they have their own entry point in IVT.
*/
/** /**
* @brief Initialize SysTick interrupt. * @brief Initialize SysTick interrupt.
* *
@ -29,8 +16,8 @@ void vPortSetupTimerInterrupt(void) {
NVIC_EnableIRQ(SysTicK_IRQn); NVIC_EnableIRQ(SysTicK_IRQn);
SysTick->CMP = (uint64_t)((SystemCoreClock / configTICK_RATE_HZ) - 1); SysTick->CMP = (uint64_t)((SystemCoreClock / (configTICK_RATE_HZ * 8)) - 1);
SysTick->CTLR = 0x1E; /* COUNTDOWN | AUTO RELOAD | HCLK | INT */ SysTick->CTLR = 0x1A; /* COUNTDOWN | AUTO RELOAD | HCLK/8 | INT */
SysTick->CTLR |= 0x20; /* INIT */ SysTick->CTLR |= 0x20; /* INIT */
SysTick->CTLR |= 0x01; /* EN */ SysTick->CTLR |= 0x01; /* EN */

4
src/main.c
View File

@ -9,6 +9,8 @@
#include "FreeRTOS.h" #include "FreeRTOS.h"
#include "task.h" #include "task.h"
const char *compile_dt = __DATE__ " " __TIME__;
void vTaskHello(void *pvParameters); void vTaskHello(void *pvParameters);
int main(void) { int main(void) {
@ -20,7 +22,7 @@ int main(void) {
/* Initialize UART for libc function calls. */ /* Initialize UART for libc function calls. */
USART_Printf_Init(115200); USART_Printf_Init(115200);
printf("Hello world, FreeRTOS?\r\n"); printf("FreeRTOS demo compiled AT %s\r\n", compile_dt);
xTaskCreate(vTaskHello, "HELLO", 256, NULL, 4, NULL); xTaskCreate(vTaskHello, "HELLO", 256, NULL, 4, NULL);