Change SRAM MPU attributes back to NORMAL WB
All checks were successful
continuous-integration/drone/push Build is passing
All checks were successful
continuous-integration/drone/push Build is passing
This commit is contained in:
parent
65dad330ae
commit
61fbc21f8f
|
@ -567,12 +567,12 @@ void MPU_Config(void)
|
||||||
MPU_InitStruct.BaseAddress = 0x20000000;
|
MPU_InitStruct.BaseAddress = 0x20000000;
|
||||||
MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
|
MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
|
||||||
MPU_InitStruct.SubRegionDisable = 0x0;
|
MPU_InitStruct.SubRegionDisable = 0x0;
|
||||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
|
||||||
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
||||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
||||||
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
|
||||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
||||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
||||||
|
|
||||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||||
/** Initializes and configures the Region and the memory to be protected
|
/** Initializes and configures the Region and the memory to be protected
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,5 +1,5 @@
|
||||||
##########################################################################################################################
|
##########################################################################################################################
|
||||||
# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 19:15:28 CST 2021]
|
# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun Jan 17 20:33:52 CST 2021]
|
||||||
##########################################################################################################################
|
##########################################################################################################################
|
||||||
|
|
||||||
# ------------------------------------------------
|
# ------------------------------------------------
|
||||||
|
|
|
@ -43,7 +43,7 @@ RCC.AHB4Freq_Value=120000000
|
||||||
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
||||||
Dma.SPI2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
Dma.SPI2_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
|
||||||
RCC.VCOInput3Freq_Value=250000
|
RCC.VCOInput3Freq_Value=250000
|
||||||
CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_SHAREABLE
|
CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_NOT_SHAREABLE
|
||||||
RCC.LPTIM1Freq_Value=120000000
|
RCC.LPTIM1Freq_Value=120000000
|
||||||
Mcu.IP4=NVIC
|
Mcu.IP4=NVIC
|
||||||
Mcu.IP5=QUADSPI
|
Mcu.IP5=QUADSPI
|
||||||
|
@ -106,7 +106,7 @@ ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.8.0
|
||||||
MxDb.Version=DB.6.0.10
|
MxDb.Version=DB.6.0.10
|
||||||
CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_CACHEABLE
|
CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_CACHEABLE
|
||||||
RCC.DIVP1Freq_Value=240000000
|
RCC.DIVP1Freq_Value=240000000
|
||||||
CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_TEX_LEVEL0
|
CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_TEX_LEVEL1
|
||||||
ProjectManager.BackupPrevious=false
|
ProjectManager.BackupPrevious=false
|
||||||
RCC.FMCFreq_Value=120000000
|
RCC.FMCFreq_Value=120000000
|
||||||
PC11.GPIO_Label=LED1
|
PC11.GPIO_Label=LED1
|
||||||
|
@ -187,7 +187,7 @@ NVIC.SavedSvcallIrqHandlerGenerated=true
|
||||||
CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_NOT_SHAREABLE
|
CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_NOT_SHAREABLE
|
||||||
PC11.Signal=GPIO_Output
|
PC11.Signal=GPIO_Output
|
||||||
VP_SYS_VS_tim7.Mode=TIM7
|
VP_SYS_VS_tim7.Mode=TIM7
|
||||||
CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_NOT_BUFFERABLE
|
CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_BUFFERABLE
|
||||||
RCC.SWPMI1Freq_Value=120000000
|
RCC.SWPMI1Freq_Value=120000000
|
||||||
CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_CACHEABLE
|
CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_CACHEABLE
|
||||||
RCC.SAI4BFreq_Value=60000000
|
RCC.SAI4BFreq_Value=60000000
|
||||||
|
|
Loading…
Reference in New Issue
Block a user