Commit Graph

30 Commits

Author SHA1 Message Date
Sean Anderson
c9309f40a6 treewide: Remove clk_free
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
2024-01-29 22:35:02 -05:00
Igor Prusov
bc3e313ff6 clk: treewide: switch to clock dump from clk_ops
Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.

Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
2023-12-15 13:05:54 -05:00
Venkatesh Yadav Abbarapu
4f340244b9 clk: zynqmp: enable topsw_lsbus clock
Display port is using topsw_lsbus clock, it is failing
while enabling the clock, so enable the topsw_lsbus clock.

Signed-off-by: Sreekanth Sunnam <sreekanth.sunnam@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231204084515.9488-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 16:48:15 +01:00
Ashok Reddy Soma
2a907542c7 clk: zynqmp: Add gem rx and tsu clocks to return register
Add gem_tsu and gem0_rx till gem3_rx to return proper register from
zynqmp_clk_get_register. Otherwise firmware won't be able to set clock
for these due to incorrect register address.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21 09:00:39 +02:00
Ashok Reddy Soma
7a480fd995 clk: zynqmp: Add set_rate support for gem rx and tsu clks
gem0_rx till gem3_rx  and gem_tsu are missing from set rate function.
Add them, so that they can be set from pmu firmware via clock framework.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230719084912.30209-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21 09:00:39 +02:00
Michal Simek
5b90412cbf xilinx: Consolidate zynqmp_mmio_read/write in zynqmp_firmware.h
zynqmp_mmio_read/write() are firmware provided hooks that's why use only
zynqmp_firmware.h for function declaration.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e7489556f9e447c737a578c169d7e1e43586a273.1687524706.git.michal.simek@amd.com
2023-07-21 09:00:38 +02:00
Algapally Santosh Sagar
71c5fdc2a3 clk: zynqmp: Add fallthrough statement in the switch case
Add fallthrough statement in switch case to fix the sparse warning.
In function 'zynqmp_clk_get_rate': warning: this statement may
fall through [-Wimplicit-fallthrough=]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230519113816.22083-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-12 13:24:31 +02:00
Michal Simek
6f735e4178 clk: zynqmp: Add support for for DP audio/video clocks
Add support for getting rate for DP audio and video clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8792efe1fd9715f7c8a2e1e24f0454fb5b25d833.1648552434.git.michal.simek@xilinx.com
2022-04-05 15:09:47 +02:00
Michal Simek
0e789d26b7 clk: zynqmp: Fix gem tx/rx/ref clock handling
gemX_ref clock IDs starts at number 104. Till now it was at gemX_tx
location which wasn't correct.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d073e159b6316707306092a62bccb876cd89a602.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
e959ade02c clk: zynqmp: Add support for setting up clock for USB
USB range is not enabled but for setting up frequency it is needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c55c423f48ca8f953a2dfbdcb25068278d8e5ad6.1635506016.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
0c383a7957 clk: zynqmp: Add support for enabling clock on lpd_lsbus
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis,
spis, ttcs, uarts, watchdog that's why make sense to also enable access to
change this clock. For this clock you already get the rate.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
T Karthik Reddy
dd4c642757 clk: zynqmp: Fix clk dump values
With "clk dump" command, few clocks are showing up incorrect values
and some clocks are displayed as "unknown".

Add missing clocks to zynqmp clock driver to display proper
clocks rates.

Implement a simple way to get clock source, instead of calling
functions. Change existing functions to this simple mechanism.

Fix gem clock name "gem_rx" to "gem_tx" which was incorrect.
Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-03-30 12:03:24 +02:00
T Karthik Reddy
a72a6ae362 clk: zynqmp: Add support to enable clocks
Add clock enable functionality in zynqmp clock driver to enable
clocks from peripheral drivers using clk_ops.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Michal Simek
6c0e59fcd9 xilinx: drivers: Use '_' instead of '-' in driver name
The most of drivers are using '_' instead of '-' in driver name. That's why
sync up these names to be aligned. It looks quite bad to see both in use.
It is visible via dm tree command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23 10:31:40 +02:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Michal Simek
039c740d66 arm64: zynqmp: Switch to xlnx-zynqmp-clk header
Use prepared header instead of hardcoded values.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Vipul Kumar
b4f015845a clk: zynqmp: Fixed the same if/else part error reported by coverity
This patch fixed the same if/else part error by adding the required
source select on the basis of is_pre_src check.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 10:49:53 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Michal Simek
969dd4c7db clk: zynqmp: Add new compatible string for clock driver
New and old clk drivers are sharing IDs and descriptions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Vipul Kumar
a79b590f78 arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump
This patch print pl clocks (pl0...pl3) and watchdog
clock using clk dump.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:44 +01:00
Michal Simek
cf772e9690 clk: zynqmp: Remove unused macros/variables
These macros and one variable is not used anywhere that's why
they should be removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
154799ac95 clk: zynqmp: Dont panic incase of mmio write/read failures
Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
ad76f8cedf clk: zynqmp: Add support for CCF driver
Add support for CCF, this CCF reads the ref clocks
from dt and checks all the required clock control
registers for its source , divisors and calculates
the clock from them. This supports clock and set
functions.

Panic when read/write fails.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02 09:11:52 +02:00
Simon Glass
9d922450aa dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 06:57:52 -06:00
Siva Durga Prasad Paladugu
128ec1fe6f clk: zynqmp: Add clock driver support for zynqmp
Add basic clock driver support for zynqmp which
sets the required clock for GEM controller

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-10 10:18:12 +01:00