Commit Graph

89519 Commits

Author SHA1 Message Date
Andre Przywara
ae79c1d01f sunxi: remove CONFIG_SATAPWR
The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
enables the power for a SATA harddisk.
In the DT this is described with the target-supply property in the AHCI
DT node, pointing to a (GPIO controlled) regulator. Since we need SATA
only in U-Boot proper, and use a DM driver for AHCI there, we should use
the DT instead of hardcoding this.

Add code to the sunxi AHCI driver to check the DT for that regulator and
enable it, at probe time. Then drop the current code from board.c, which
was doing that job before.
This allows us to remove the SATAPWR Kconfig definition and the
respective values from the defconfigs.
We also select the generic fixed regulator driver, which handles those
GPIO controlled regulators.

Please note that the OrangePi Plus is a bit special here, it's a H3
board without native SATA, but with a USB-to-SATA bridge. The DT models
the SATA power via a VBUS supply regulator, which we don't parse yet in
the USB PHY driver. Use the hardcoded CONFIG_USB3_VBUS_PIN for that
board meanwhile.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-10-22 23:40:47 +01:00
Andre Przywara
a14c250625 sunxi: dts: arm: add T113s/D1 DT files from Linux-v6.6-rc6
This copies in some devicetree files from the official Linux kernel tree,
v6.6-rc6. It covers a board with the Allwinner T113s SoC, which shares
many devices with its RISC-V sibling, the Allwinner D1(s). This is the
reason for the core .dtsi files landing in the arch/riscv directory.

We are only adjusting the include path to accommodate for the differences
in the U-Boot build system.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-22 01:12:26 +01:00
Andre Przywara
1fe28c0aa6 sunxi: dts: arm: update devicetree files from Linux-v6.6-rc6
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6.
This is covering Allwinner SoCs with 32-bit ARM cores, minus the T113s
board and related .dtsi files, which come separately.

Only small changes: Bluetooth got enabled on the C.H.I.P., and a clock
got renamed. More interesting is the addition of a board, for which
U-Boot enablement patches are pending.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-22 01:12:26 +01:00
Andre Przywara
95c3b0635e sunxi: dts: arm64: update devicetree files from Linux-v6.6-rc6
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6.
This is covering Allwinner SoCs with 64-bit ARM cores.

Only small cosmetic changes (clock name fixed), but we add the DT for
the new OrangePi Zero 3 board, for which U-Boot enablement patches are
pending.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-10-22 01:12:25 +01:00
Tom Rini
9a3a58396b Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- kirkwood: Pogo v4: Enable LTO (Tony)
2023-10-20 12:54:33 -04:00
Tony Dinh
1060db76b0 arm: kirkwood: Pogo v4: Enable LTO
Enable building Pogo V4 u-boot image with LTO, which results in about 30K
reduction in size.

Rebased to latest master and resend.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-20 11:57:26 +02:00
Tom Rini
a65c3990e5 Merge branch 'master_uart_test' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-10-19 16:27:09 -04:00
Paul Barker
966caedfa8 serial: sh: Add RZ/G2L SCIF support
Extend the existing driver to support the SCIF serial ports on the
Renesas RZ/G2L (R9A07G044) SoC. This also requires us to ensure that if
there is a reset signal defined in the device tree, it is de-asserted
before we try to talk to the SCIF module.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
2023-10-19 17:03:20 +02:00
Paul Barker
0f924d88fa serial: sh: Fix error handling
The current SCIF error handling is broken for the RZ/G2L. After a break
condition has been triggered, the current code is unable to clear the
error and serial port output never resumes.

The RZ/G2L datasheet says that most error conditions are cleared by
resetting the relevant error bits in the FSR & LSR registers to zero.
To clear framing errors on SCIF ports, the invalid data also needs to be
read out of the receive FIFO.

After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3
and even SH7751 SoCs, it's clear that this is the way to clear errors
for all of these SoCs.

While we're here, annotate the handle_error() function with a couple of
comments as the reads and writes themselves don't immediately make it
clear what we're doing.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Chris Paterson <chris.paterson2@renesas.com> # HiHope RZ/G2M board
Tested-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # R-Car H3 Salvator-XS
2023-10-19 17:03:15 +02:00
Tom Rini
e463222cce Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
+ riscv: Add Zbb support
+ riscv: Add preliminary RISC-V falcon mode support
+ riscv: Remove dram_init_banksize()
+ andes: rearrange PLICSW scheme
+ visionfive2: enable bootstage configs
2023-10-19 09:40:04 -04:00
Tom Rini
48bc9de282 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-watchdog
- sandbox: watchdog: Avoid an error on startup (Simon)
- nuvoton: Fix reset/expire function error (Jim)
2023-10-19 09:39:00 -04:00
Yu Chien Peter Lin
bc5a50452b riscv: Add Zbb support for building U-Boot
This patch adds ISA string to the -march to generate zbb instructions
for U-Boot binaries, along with optimized string functions introduced
from Linux kernel.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:50 +08:00
Randolph
03a4504659 riscv: spl: andes: Move the DTB in front of kernel
Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.

Moving the DTB in front of the kernel can avoid this error.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:33 +08:00
Randolph
fe192679ef andes: config: add riscv falcon mode for ae350 platform
Fork from ae350_rv[32/64]_spl_[xip]_defconfig and
append CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT=y

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:33 +08:00
Randolph
58fa2a5aa1 spl: riscv: add os type for next booting stage
If SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled, the function
spl_invoke_opensbi should change the target OS type to IH_OS_LINUX.
OpenSBI will load the Linux image as the next boot stage.
The os_takes_devicetree function returns a value of true or false
depending on whether or not SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:33 +08:00
Randolph
9421e41981 Makefile: delete file *.itb when make clean
Delete the output file *.itb

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:33 +08:00
Randolph
d311df8b31 riscv: dts: binman: add condition for opensbi os boot
Add condition for OpenSBI OS boot mode, by default it is not enabled.
By default, binman creates the output file u-boot.itb.
If SPL_OPENSBI_OS_BOOT is enabled, linux.itb will be created
after compilation instead of the default u-boot.itb.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:33 +08:00
Randolph
e09a2287c1 riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol
Introduce common Kconfig symbol for riscv architecture.
This symbol SPL_LOAD_FIT_OPENSBI_OS_BOOT is like falcon mode on ARM,
the Falcon boot is a shortcut boot method for SD/eMMC targets. It
skips the loading the RAM version U-Boot. Instead, it will loads
the FIT image and boots directly to Linux.

When SPL_OPENSBI_OS_BOOT is enabled, linux.itb is created after
compilation instead of the default u-boot.itb. It initialises memory
with the U-Boot SPL at the first stage, just as a normal boot process
does at the beginning. Instead of jumping to the U-Boot proper from
OpenSBI before booting the Linux kernel, the RISC-V falcon mode
process jumps directly to the Linux kernel to gain shorter booting time.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:33 +08:00
Randolph
5367b9e798 spl: riscv: opensbi: change the default os_type as varible
In order to introduce the Opensbi OS boot mode, the next stage boot
image of OpenSBI should be configurable.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:33 +08:00
Randolph
04b2123b4d riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy
Source hart information is not necessary in IPI, so we could
use single-bit-per-hart strategy to rearrange PLICSW mapping.

Bit 0 of Interrupt Pending Bits is hardwired to 0.
Therefore, we use bit 1 to send IPI to hart 0,
bit 2 to hart 1, ..., and so on.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:33 +08:00
Mayuresh Chitale
5a348ccf02 riscv: binman: Fix compilation error
Some platforms may not have any DDR memory below 4G and for such platforms
the TEXT_BASE and LOAD addresses etc are all 64 bit addresses due to
which the u-boot build fails with below error:

u-boot/arch/riscv/dts/binman.dtsi:30.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:43.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:44.15-26
Value out of range for 32-bit array element
FATAL ERROR: Syntax error parsing input tree

Fix by setting the address-cells property to 2 and converting load
addresses to 64 bit values.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:32 +08:00
Chanho Park
e96e537efd configs: visionfive2: enable bootstage configs
Enable BOOTSTAGE configuration and its command for visionfive2 board.
The feature can be useful for analyzing the elapsed time between boot
stages.

TODO: define / reserve memory region for boot stage stash

StarFive # bootstage report
Timer summary in microseconds (10 records):
       Mark    Elapsed  Stage
          0          0  reset
  3,139,338  3,139,338  board_init_f
  3,176,753     37,415  board_init_r
  4,036,111    859,358  eth_common_init
  4,101,599     65,488  eth_initialize
  4,105,799      4,200  main_loop
  4,145,207     39,408  usb_start
  5,440,963  1,295,756  cli_loop

Accumulated time:
                10,093  dm_f
                15,867  dm_r

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:32 +08:00
Heinrich Schuchardt
9385c9b0cd riscv: remove dram_init_banksize()
Remove dram_init_banksize() on the architecture level.

Limiting used RAM to under 4 GiB is only necessary for CPUs which have a
DMA issue. SoC specific code already exists for FU540, FU740, JH7110.

Not all RISC-V boards will have memory below 4 GiB.

A weak implementation of dram_init_banksize() exists in common/board_f.c.

See the discussion in
https://lore.kernel.org/u-boot/545fe813-cb1e-469c-a131-0025c77aeaa2@canonical.com/T/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2023-10-19 17:29:32 +08:00
Jim Liu
127d03893b wdt: nuvoton: Fix reset/expire function error
Fix npcm845 watchdog halt for reset function and expire function.
Reset function is restart wdt.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-19 07:51:12 +02:00
Simon Glass
bc003cad7f sandbox: watchdog: Avoid an error on startup
For some time now running sandbox with -T produces an error:

   Core:  270 devices, 95 uclasses, devicetree: board
   WDT:   Not starting wdt-gpio-toggle
   wdt_gpio wdt-gpio-level: Request for wdt gpio failed: -16
   WDT:   Not starting wdt@0
   MMC:   mmc2: 2 (SD), mmc1: 1 (SD), mmc0: 0 (SD)

Use an unallocated GPIO to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1fc45d6483 ("watchdog: add pulse support to gpio watchdog driver")
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-19 07:50:18 +02:00
Tom Rini
9a0cf3993f Merge branch '2023-10-17-spl-test-some-load-methods'
To quote the author:
This series adds some tests for various SPL load methods, with the
intent of helping debug v6 of [1]. With that in mind, notable omissions
include NAND and ROMAPI, which both lack sandbox implementations, and
OS_BOOT, which I have deferred due to its complexity. Semihosting is
also omitted, but I think we can test that with qemu.

In order to test all of these methods, we must first generate suitable
images, possibly on filesystems. While other tests have historically
generated these images using external tools (e.g. mkimage, mkfs, etc.),
I have chosen to generate them on the fly. This is for a few reasons:

- By removing external dependencies on pytest to create certain files,
  the tests become self-contained. This makes them easier to iterate on
  and debug.
- By generating tests at runtime, we can dynamically vary the content.
  This helps detect test failures, as even if tests are loaded to the
  same location, the expected content will be different.
- We are not testing the image parsers themselves (e.g.
  spl_load_simple_fit or fs_read) but rather the load methods (e.g.
  spl_mmc_load_image). It is unnecessary to exercise full functionality
  or generate 100% correct images.
- By reducing functionality to only what is necessary, the complexity of
  various formats can often be greatly reduced.

This series depends on [2-3], which are small fixes identified through
this patch set. The organization of patches in this series is as
follows:

- General fixes for bugs which are unlikely to be triggered outside of
  this series
- Changes to IMX8 container images to facilitate testing
- General prep. work, particularly regarding linker issues
- The tests themselves

Passing CI at [4].

[1] https://lore.kernel.org/all/20230731224304.111081-1-sean.anderson@seco.com/
[2] https://lore.kernel.org/all/20230930204246.515254-1-seanga2@gmail.com/
[3] https://lore.kernel.org/all/20231008014748.1987840-1-seanga2@gmail.com/
[4] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18128
2023-10-18 08:28:00 -04:00
Sean Anderson
60d76e332d test: spl: Add a test for the SPI load method
Add test for the SPI load method. This one is pretty straightforward. We
can't enable FIT_EXTERNAL with LOAD_FIT_FULL because spl_spi_load_image
doesn't know the total image size and has to guess from fdt_totalsize. This
doesn't include external data, so loading it will fail.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
65efaac425 test: spl: Add a test for the NOR load method
Add a test for the NOR load method. Since NOR is memory-mapped we can
substitute a buffer instead. The only major complication is testing LZMA
decompression.  It's too complex to implement LZMA compression in a test, and we
have no in-tree compressor, so we just include some pre-compressed data. This
data was generated through something like

    generate_data(plain, plain_size, "lzma")
    cat plain.dat | lzma | hexdump -C

and was cleaned up further in my editor.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
53d8bf8f9c test: spl: Add a test for the NET load method
Add a test for loading U-Boot over TFTP. As with other sandbox net
routines, we need to initialize our packets manually since things like
net_set_ether and net_set_udp_header always use "our" addresses. We use
BOOTP instead of DHCP, since DHCP has a tag/length-based format which is
harder to parse. Our TFTP implementation doesn't define as many constants
as I'd like, so I create some here. Note that the TFTP block size is
one-based, but offsets are zero-based.

In order to avoid address errors, we need to set up/define some additional
address information settings. dram_init_banksize would be a good candidate
for settig up bi_dram, but it gets called too late in board_init_r.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
6ba8ecaa96 test: spl: Add a test for the MMC load method
Add a test for the MMC load method. This shows the general shape of tests
to come: The main test function calls do_spl_test_load with an appropriate
callback to write the image to the medium.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
6c5d0d9398 test: spl: Add a test for spl_blk_load_image
Add a test for spl_blk_load_image, currently used only by NVMe. Because
there is no sandbox NVMe driver, just use MMC instead. Avoid falling back
to raw images to make failures more obvious.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
59b3633491 test: spl: Add functions to create filesystems
Add some functions for creating fat/ext2 filesystems with a single file and
a test for them. Filesystems require block devices, and it is easiest to
just use MMC for this. To get an MMC, we must also pull in the test device
tree. SPL_TIMER is necessary for SPL_MMC, perhaps because it uses a timeout.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b93cc1e73e test: spl: Add functions to create images
This add some basic functions to create images, and a test for said
functions. This is not intended to be a test of the image parsing
functions, but rather a framework for creating minimal images for testing
load methods. That said, it does do an OK job at finding bugs in the image
parsing directly.

Since we have two methods for loading/parsing FIT images, add LOAD_FIT_FULL
as a separate CI run.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b5bf83b691 test: spl: Fix spl_test_load not failing if fname doesn't exist
Returning a negative value from a unit test doesn't automatically fail the
test.  We have to fail an assertion. Modify the test to do so.

This now causes the test to count as a failure on VPL. This is because the
fname of SPL (and U-Boot) is generated with make_exec in os_jump_to_image.
The original name of SPL is gone, and we can't determine the name of U-Boot
from the generated name.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
c56468a60d test: spl: Split tests up and use some configs
In order to make adding new spl unit tests easier, especially when they may
have many dependencies, add some Kconfigs for the existing image test.
Split it into the parts which are generic (such as callbacks) and the
test-specific parts.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
a24be84df9 sandbox: Support -T in spl
The test devicetree is only compiled for U-Boot proper. When accessing it in
SPL we need to go up one directory.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b02c4e941c spl: Use map_sysmem where appropriate
All "physical" addresses in SPL must be converted to virtual addresses
before access in order for sandbox to work. Add some calls to map_sysmem in
appropriate places. We do not generally call unmap_sysmem, since we need
the image memory to still be mapped when we jump to the image. This doesn't
matter at the moment since unmap_sysmem is a no-op.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
93caa3efe2 spl: Add callbacks to invalidate cached devices
Several SPL functions try to avoid performing initialization twice by
caching devices. This is fine for regular boot, but does not work with
UNIT_TEST, since all devices are torn down after each test. Add some
functions to invalidate the caches which can be called before testing these
load methods.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
acb96c170d net: bootp: Fall back to BOOTP from DHCP when unit testing
If we sent a DHCP packet and get a BOOTP response from the server, we
shouldn't try to send a DHCPREQUEST packet, since it won't be DHCPACKed.
Transition straight to BIND. This is only enabled for UNIT_TEST to avoid
bloat, since I suspect the number of BOOTP servers in the wild is
vanishingly small.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
7ccc6044e9 net: bootp: Move port numbers to header
These defines are useful when testing bootp.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-10-17 20:50:52 -04:00
Sean Anderson
7d04986adf net: Fix compiling SPL when fastboot is enabled
When fastboot is enabled in U-Boot proper and SPL_NET is enabled, we will
try to (unsuccessfully) reference it in SPL. Fix these linker errors by
conditioning on SPL_UDP/TCP_FUNCTION_FASTBOOT.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
0bf3fec279 fs: ext4: Add some defines for testing
Add various defines which are not necessary for reading/writing
filesystems, but which are useful for creating them. These mostly come from
Linux v6.5-rc2 (what I had checked out).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
44071cd5a8 fs: ext4: Fix building ext4 in SPL if write is enabled
If EXT4_WRITE is enabled, write capabilities will be compiled into SPL, but
not CRC16. Add an option to enable CRC16 to avoid linker errors.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
c39d22c337 fs: Disable sandbox filesystem in SPL
Don't bother compiling the sandbox filesystem in SPL for now, as it is not
needed.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
841c4d6088 lib: acpi: Fix linking SPL when ACPIGEN is enabled
lib/acpi/acpigen.o is only compiled into SPL when SPL_ACPIGEN is enabled.
Update several files which reference these functions accordingly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
eaf738559c spl: Allow enabling SPL_OF_REAL and SPL_OF_PLATDATA at the same time
Sandbox unit tests in U-Boot proper load a test device tree to have some
devices to work with. In order to do the same in SPL, we must enable
SPL_OF_REAL. However, we already have SPL_OF_PLATDATA enabled. When
generating platdata from a devicetree, it is expected that we will not need
devicetree access functions (even though SPL_OF_CONTROL is enabled). This
expectation does not hold for sandbox, so allow user control of
SPL_OF_REAL.

There are several places in the tree where conditions involving OF_PLATDATA
or OF_REAL no longer function correctly when both of these options can be
selected at the same time. Adjust these conditions accordingly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
12b3339070 Move i.MX8 container image loading support to common/spl
To facilitate testing loading i.MX8 container images, move the
parse-container code to common/spl.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
ab12179b3e arm: imx: Check header before calling spl_load_imx_container
Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.

This is a functional change, one which likely should have been in place
from the start, but a functional change nonetheless. Previously, all
non-IMX8 images (except FITs without FIT_FULL) would be optimized out if
the only image load method enabled supported IMX8 images. With this change,
support for other image types now has an effect.

There are seven boards with SPL_LOAD_IMX_CONTAINER enabled: three with
SPL_BOOTROM_SUPPORT:

    imx93_11x11_evk_ld imx93_11x11_evk imx8ulp_evk

and four with SPL_MMC:

    deneb imx8qxp_mek giedi imx8qm_mek

All of these boards also have SPL_RAW_IMAGE_SUPPORT and
SPL_LEGACY_IMAGE_FORMAT enabled as well. However, none have FIT support
enabled. Of the six load methods affected by this patch, only SPL_MMC and
SPL_BOOTROM_SUPPORT are enabled with SPL_LOAD_IMX_CONTAINER.
spl_romapi_load_image_seekable does not support legacy or raw images, so
there is no growth. However, mmc_load_image_raw_sector does support loading
legacy/raw images. Since these images could not have been booted before, I
have disabled support for legacy/raw images on these four boards. This
reduces bloat from around 800 bytes to around 200.

There are no in-tree boards with SPL_LOAD_IMX_CONTAINER and AHAB_BOOT both
enabled, so we do not need to worry about potentially falling back to
legacy images in a secure boot scenario.

Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
d401e0b264 arm: imx: Add function to validate i.MX8 containers
Add a function to abstract the common task of validating i.MX8 container
image headers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
d9416cc449 arm: imx: Use log_err for errors in read_auth_container
To allow for more flexible handling of errors, use log_err instead of
printf.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00