Updated to SDK v2.15.000

Signed-off-by: Yilin Sun <imi415@imi.moe>

CMSIS/Core/Include/CMSIS_Include_core_cm.cmake

@@ -0,0 +1,9 @@
+# Add set(CONFIG_USE_CMSIS_Include_core_cm true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/.
+)
+

CMSIS/Core/Include/CMSIS_Include_core_cm_LPC804.cmake

@@ -1,8 +0,0 @@
-include_guard()
-message("CMSIS_Include_core_cm component is included.")
-
-
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
-    ${CMAKE_CURRENT_LIST_DIR}/.
-)
-

CMSIS/DSP/CMSIS_DSP_Include.cmake

@@ -0,0 +1,10 @@
+# Add set(CONFIG_USE_CMSIS_DSP_Include true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+  ${CMAKE_CURRENT_LIST_DIR}/PrivateInclude
+)
+

CMSIS/DSP/CMSIS_DSP_Source.cmake

@@ -0,0 +1,51 @@
+# Add set(CONFIG_USE_CMSIS_DSP_Source true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BasicMathFunctions/BasicMathFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BasicMathFunctions/BasicMathFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BayesFunctions/BayesFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BayesFunctions/BayesFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/CommonTables/CommonTables.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/CommonTables/CommonTablesF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ComplexMathFunctions/ComplexMathFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ControllerFunctions/ControllerFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/DistanceFunctions/DistanceFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/DistanceFunctions/DistanceFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FastMathFunctions/FastMathFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FastMathFunctions/FastMathFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FilteringFunctions/FilteringFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FilteringFunctions/FilteringFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/InterpolationFunctions/InterpolationFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/InterpolationFunctions/InterpolationFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/MatrixFunctions/MatrixFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/MatrixFunctions/MatrixFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/QuaternionMathFunctions/QuaternionMathFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SVMFunctions/SVMFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SVMFunctions/SVMFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/StatisticsFunctions/StatisticsFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/StatisticsFunctions/StatisticsFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SupportFunctions/SupportFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SupportFunctions/SupportFunctionsF16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/TransformFunctions/TransformFunctions.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/TransformFunctions/TransformFunctionsF16.c
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+  ${CMAKE_CURRENT_LIST_DIR}/PrivateInclude
+  ${CMAKE_CURRENT_LIST_DIR}/Source/DistanceFunctions
+)
+
+if(CONFIG_USE_COMPONENT_CONFIGURATION)
+  message("===>Import configuration from ${CMAKE_CURRENT_LIST_FILE}")
+
+  target_compile_definitions(${MCUX_SDK_PROJECT_NAME} PUBLIC
+    -DDISABLEFLOAT16
+  )
+
+endif()
+

CMSIS/Driver/CMSIS_Driver_Include_CAN.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_CAN true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_CAN.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_Ethernet.cmake

@@ -0,0 +1,13 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_Ethernet true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_ETH_MAC.c
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_ETH_PHY.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_Ethernet_MAC.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_Ethernet_MAC true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_ETH_MAC.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_Ethernet_PHY.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_Ethernet_PHY true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_ETH_PHY.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_Flash.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_Flash true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_Flash.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_I2C.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_I2C true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_I2C.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_MCI.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_MCI true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_MCI.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_NAND.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_NAND true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_NAND.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_SAI.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_SAI true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_SAI.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_SPI.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_SPI true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_SPI.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_USART.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_USART true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_USART.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_USB_Device.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_USB_Device true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_USBD.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_USB_Host.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_USB_Host true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_USBH.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/Driver/CMSIS_Driver_Include_WiFi.cmake

@@ -0,0 +1,12 @@
+# Add set(CONFIG_USE_CMSIS_Driver_Include_WiFi true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+# template file
+# ${CMAKE_CURRENT_LIST_DIR}/DriverTemplates/Driver_WiFi.c
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+

CMSIS/NN/CMSIS_NN_Source.cmake

@@ -0,0 +1,89 @@
+# Add set(CONFIG_USE_CMSIS_NN_Source true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+if(CONFIG_USE_CMSIS_DSP_Source)
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ActivationFunctions/arm_nn_activations_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ActivationFunctions/arm_nn_activations_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ActivationFunctions/arm_relu6_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ActivationFunctions/arm_relu_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ActivationFunctions/arm_relu_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BasicMathFunctions/arm_elementwise_add_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/BasicMathFunctions/arm_elementwise_mul_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConcatenationFunctions/arm_concatenation_s8_w.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConcatenationFunctions/arm_concatenation_s8_x.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConcatenationFunctions/arm_concatenation_s8_y.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConcatenationFunctions/arm_concatenation_s8_z.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/FullyConnectedFunctions/arm_fully_connected_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nntables.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_add_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_mult_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_mult_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/PoolingFunctions/arm_avgpool_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/PoolingFunctions/arm_max_pool_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/PoolingFunctions/arm_pool_q7_HWC.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/ReshapeFunctions/arm_reshape_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SoftmaxFunctions/arm_softmax_q15.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SoftmaxFunctions/arm_softmax_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SoftmaxFunctions/arm_softmax_s8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SoftmaxFunctions/arm_softmax_u8.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c
+  ${CMAKE_CURRENT_LIST_DIR}/Source/SVDFunctions/arm_svdf_s8.c
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+
+else()
+
+message(SEND_ERROR "CMSIS_NN_Source dependency does not meet, please check ${CMAKE_CURRENT_LIST_FILE}.")
+
+endif()

CMSIS/RTOS2/CMSIS_RTOS2_NonSecure.cmake

@@ -0,0 +1,95 @@
+# Add set(CONFIG_USE_CMSIS_RTOS2_NonSecure true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+if(CONFIG_USE_CMSIS_Device_API_OSTick AND CONFIG_USE_CMSIS_Device_API_RTOS2)
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Source/rtx_lib.c
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Config/RTX_Config.c
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Source
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Include
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Config
+)
+
+if(CONFIG_TOOLCHAIN STREQUAL iar AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_CM0.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL iar AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_CM4F.a
+      -Wl,--end-group
+  )
+endif()
+
+if((CONFIG_TOOLCHAIN STREQUAL armgcc OR CONFIG_TOOLCHAIN STREQUAL mcux) AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_CM0.a
+      -Wl,--end-group
+  )
+endif()
+
+if((CONFIG_TOOLCHAIN STREQUAL armgcc OR CONFIG_TOOLCHAIN STREQUAL mcux) AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_CM4F.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL mdk AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_CM0.lib
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL mdk AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_CM4F.lib
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL iar AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_V8MMFN.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL gcc AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_V8MMFN.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL armclang AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_V8MMFN.lib
+      -Wl,--end-group
+  )
+endif()
+
+else()
+
+message(SEND_ERROR "CMSIS_RTOS2_NonSecure dependency does not meet, please check ${CMAKE_CURRENT_LIST_FILE}.")
+
+endif()

CMSIS/RTOS2/CMSIS_RTOS2_Secure.cmake

@@ -0,0 +1,95 @@
+# Add set(CONFIG_USE_CMSIS_RTOS2_Secure true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+if(CONFIG_USE_CMSIS_Device_API_OSTick AND CONFIG_USE_CMSIS_Device_API_RTOS2)
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Source/rtx_lib.c
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Config/RTX_Config.c
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Source
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Include
+  ${CMAKE_CURRENT_LIST_DIR}/RTX/Config
+)
+
+if(CONFIG_TOOLCHAIN STREQUAL iar AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_CM0.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL iar AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_CM4F.a
+      -Wl,--end-group
+  )
+endif()
+
+if((CONFIG_TOOLCHAIN STREQUAL armgcc OR CONFIG_TOOLCHAIN STREQUAL mcux) AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_CM0.a
+      -Wl,--end-group
+  )
+endif()
+
+if((CONFIG_TOOLCHAIN STREQUAL armgcc OR CONFIG_TOOLCHAIN STREQUAL mcux) AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_CM4F.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL mdk AND CONFIG_CORE STREQUAL cm0p)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_CM0.lib
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_TOOLCHAIN STREQUAL mdk AND (CONFIG_CORE STREQUAL cm4f OR CONFIG_CORE STREQUAL cm7f))
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_CM4F.lib
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL iar AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/IAR/RTX_V8MMF.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL gcc AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/GCC/libRTX_V8MMF.a
+      -Wl,--end-group
+  )
+endif()
+
+if(CONFIG_COMPILER STREQUAL armclang AND CONFIG_CORE STREQUAL cm33 AND CONFIG_FPU STREQUAL SP_FPU)
+  target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    -Wl,--start-group
+      ${CMAKE_CURRENT_LIST_DIR}/RTX/Library/ARM/RTX_V8MMF.lib
+      -Wl,--end-group
+  )
+endif()
+
+else()
+
+message(SEND_ERROR "CMSIS_RTOS2_Secure dependency does not meet, please check ${CMAKE_CURRENT_LIST_FILE}.")
+
+endif()

CMSIS/RTOS2/Include/CMSIS_Device_API_OSTick.cmake

@@ -0,0 +1,9 @@
+# Add set(CONFIG_USE_CMSIS_Device_API_OSTick true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/.
+)
+

CMSIS/RTOS2/Include/CMSIS_Device_API_RTOS2.cmake

@@ -0,0 +1,9 @@
+# Add set(CONFIG_USE_CMSIS_Device_API_RTOS2 true) in config.cmake to use this component
+
+include_guard(GLOBAL)
+message("${CMAKE_CURRENT_LIST_FILE} component is included.")
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/.
+)
+

CMSIS/RTOS2/RTX/Config/RTX_Config.c

@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * $Revision:   V5.1.1
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Configuration
+ *
+ * -----------------------------------------------------------------------------
+ */
+ 
+#include "cmsis_compiler.h"
+#include "rtx_os.h"
+ 
+// OS Idle Thread
+__WEAK __NO_RETURN void osRtxIdleThread (void *argument) {
+  (void)argument;
+
+  for (;;) {}
+}
+ 
+// OS Error Callback function
+__WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
+  (void)object_id;
+
+  switch (code) {
+    case osRtxErrorStackOverflow:
+      // Stack overflow detected for thread (thread_id=object_id)
+      break;
+    case osRtxErrorISRQueueOverflow:
+      // ISR Queue overflow detected when inserting object (object_id)
+      break;
+    case osRtxErrorTimerQueueOverflow:
+      // User Timer Callback Queue overflow detected for timer (timer_id=object_id)
+      break;
+    case osRtxErrorClibSpace:
+      // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM
+      break;
+    case osRtxErrorClibMutex:
+      // Standard C/C++ library mutex initialization failed
+      break;
+    default:
+      // Reserved
+      break;
+  }
+  for (;;) {}
+//return 0U;
+}

CMSIS/RTOS2/RTX/Config/RTX_Config.h

@@ -0,0 +1,580 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * $Revision:   V5.5.2
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Configuration definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+ 
+#ifndef RTX_CONFIG_H_
+#define RTX_CONFIG_H_
+ 
+#ifdef   _RTE_
+#include "RTE_Components.h"
+#ifdef    RTE_RTX_CONFIG_H
+#include  RTE_RTX_CONFIG_H
+#endif
+#endif
+ 
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+ 
+// <h>System Configuration
+// =======================
+ 
+//   <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
+//   <i> Defines the combined global dynamic memory size.
+//   <i> Default: 32768
+#ifndef OS_DYNAMIC_MEM_SIZE
+#define OS_DYNAMIC_MEM_SIZE         32768
+#endif
+ 
+//   <o>Kernel Tick Frequency [Hz] <1-1000000>
+//   <i> Defines base time unit for delays and timeouts.
+//   <i> Default: 1000 (1ms tick)
+#ifndef OS_TICK_FREQ
+#define OS_TICK_FREQ                1000
+#endif
+ 
+//   <e>Round-Robin Thread switching
+//   <i> Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN_ENABLE
+#define OS_ROBIN_ENABLE             1
+#endif
+ 
+//     <o>Round-Robin Timeout <1-1000>
+//     <i> Defines how many ticks a thread will execute before a thread switch.
+//     <i> Default: 5
+#ifndef OS_ROBIN_TIMEOUT
+#define OS_ROBIN_TIMEOUT            5
+#endif
+ 
+//   </e>
+ 
+//   <o>ISR FIFO Queue
+//      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
+//     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
+//     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries
+//   <i> RTOS Functions called from ISR store requests to this buffer.
+//   <i> Default: 16 entries
+#ifndef OS_ISR_FIFO_QUEUE
+#define OS_ISR_FIFO_QUEUE           16
+#endif
+ 
+//   <q>Object Memory usage counters
+//   <i> Enables object memory usage counters (requires RTX source variant).
+#ifndef OS_OBJ_MEM_USAGE
+#define OS_OBJ_MEM_USAGE            0
+#endif
+ 
+// </h>
+ 
+// <h>Thread Configuration
+// =======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_THREAD_OBJ_MEM
+#define OS_THREAD_OBJ_MEM           0
+#endif
+ 
+//     <o>Number of user Threads <1-1000>
+//     <i> Defines maximum number of user threads that can be active at the same time.
+//     <i> Applies to user threads with system provided memory for control blocks.
+#ifndef OS_THREAD_NUM
+#define OS_THREAD_NUM               1
+#endif
+ 
+//     <o>Number of user Threads with default Stack size <0-1000>
+//     <i> Defines maximum number of user threads with default stack size.
+//     <i> Applies to user threads with zero stack size specified.
+#ifndef OS_THREAD_DEF_STACK_NUM
+#define OS_THREAD_DEF_STACK_NUM     0
+#endif
+ 
+//     <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
+//     <i> Defines the combined stack size for user threads with user-provided stack size.
+//     <i> Applies to user threads with user-provided stack size and system provided memory for stack.
+//     <i> Default: 0
+#ifndef OS_THREAD_USER_STACK_SIZE
+#define OS_THREAD_USER_STACK_SIZE   0
+#endif
+ 
+//   </e>
+ 
+//   <o>Default Thread Stack size [bytes] <96-1073741824:8>
+//   <i> Defines stack size for threads with zero stack size specified.
+//   <i> Default: 3072
+#ifndef OS_STACK_SIZE
+#define OS_STACK_SIZE               3072
+#endif
+ 
+//   <o>Idle Thread Stack size [bytes] <72-1073741824:8>
+//   <i> Defines stack size for Idle thread.
+//   <i> Default: 512
+#ifndef OS_IDLE_THREAD_STACK_SIZE
+#define OS_IDLE_THREAD_STACK_SIZE   512
+#endif
+ 
+//   <o>Idle Thread TrustZone Module Identifier
+//   <i> Defines TrustZone Thread Context Management Identifier.
+//   <i> Applies only to cores with TrustZone technology.
+//   <i> Default: 0 (not used)
+#ifndef OS_IDLE_THREAD_TZ_MOD_ID
+#define OS_IDLE_THREAD_TZ_MOD_ID    0
+#endif
+ 
+//   <q>Stack overrun checking
+//   <i> Enables stack overrun check at thread switch (requires RTX source variant).
+//   <i> Enabling this option increases slightly the execution time of a thread switch.
+#ifndef OS_STACK_CHECK
+#define OS_STACK_CHECK              0
+#endif
+ 
+//   <q>Stack usage watermark
+//   <i> Initializes thread stack with watermark pattern for analyzing stack usage.
+//   <i> Enabling this option increases significantly the execution time of thread creation.
+#ifndef OS_STACK_WATERMARK
+#define OS_STACK_WATERMARK          0
+#endif
+ 
+//   <o>Processor mode for Thread execution
+//     <0=> Unprivileged mode
+//     <1=> Privileged mode
+//   <i> Default: Privileged mode
+#ifndef OS_PRIVILEGE_MODE
+#define OS_PRIVILEGE_MODE           1
+#endif
+ 
+// </h>
+ 
+// <h>Timer Configuration
+// ======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_TIMER_OBJ_MEM
+#define OS_TIMER_OBJ_MEM            0
+#endif
+ 
+//     <o>Number of Timer objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_TIMER_NUM
+#define OS_TIMER_NUM                1
+#endif
+ 
+//   </e>
+ 
+//   <o>Timer Thread Priority
+//      <8=> Low
+//     <16=> Below Normal  <24=> Normal  <32=> Above Normal
+//     <40=> High
+//     <48=> Realtime
+//   <i> Defines priority for timer thread
+//   <i> Default: High
+#ifndef OS_TIMER_THREAD_PRIO
+#define OS_TIMER_THREAD_PRIO        40
+#endif
+ 
+//   <o>Timer Thread Stack size [bytes] <0-1073741824:8>
+//   <i> Defines stack size for Timer thread.
+//   <i> May be set to 0 when timers are not used.
+//   <i> Default: 512
+#ifndef OS_TIMER_THREAD_STACK_SIZE
+#define OS_TIMER_THREAD_STACK_SIZE  512
+#endif
+ 
+//   <o>Timer Thread TrustZone Module Identifier
+//   <i> Defines TrustZone Thread Context Management Identifier.
+//   <i> Applies only to cores with TrustZone technology.
+//   <i> Default: 0 (not used)
+#ifndef OS_TIMER_THREAD_TZ_MOD_ID
+#define OS_TIMER_THREAD_TZ_MOD_ID   0
+#endif
+ 
+//   <o>Timer Callback Queue entries <0-256>
+//   <i> Number of concurrent active timer callback functions.
+//   <i> May be set to 0 when timers are not used.
+//   <i> Default: 4
+#ifndef OS_TIMER_CB_QUEUE
+#define OS_TIMER_CB_QUEUE           4
+#endif
+ 
+// </h>
+ 
+// <h>Event Flags Configuration
+// ============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_EVFLAGS_OBJ_MEM
+#define OS_EVFLAGS_OBJ_MEM          0
+#endif
+ 
+//     <o>Number of Event Flags objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_EVFLAGS_NUM
+#define OS_EVFLAGS_NUM              1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Mutex Configuration
+// ======================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MUTEX_OBJ_MEM
+#define OS_MUTEX_OBJ_MEM            0
+#endif
+ 
+//     <o>Number of Mutex objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MUTEX_NUM
+#define OS_MUTEX_NUM                1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Semaphore Configuration
+// ==========================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_SEMAPHORE_OBJ_MEM
+#define OS_SEMAPHORE_OBJ_MEM        0
+#endif
+ 
+//     <o>Number of Semaphore objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_SEMAPHORE_NUM
+#define OS_SEMAPHORE_NUM            1
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Memory Pool Configuration
+// ============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MEMPOOL_OBJ_MEM
+#define OS_MEMPOOL_OBJ_MEM          0
+#endif
+ 
+//     <o>Number of Memory Pool objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MEMPOOL_NUM
+#define OS_MEMPOOL_NUM              1
+#endif
+ 
+//     <o>Data Storage Memory size [bytes] <0-1073741824:8>
+//     <i> Defines the combined data storage memory size.
+//     <i> Applies to objects with system provided memory for data storage.
+//     <i> Default: 0
+#ifndef OS_MEMPOOL_DATA_SIZE
+#define OS_MEMPOOL_DATA_SIZE        0
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Message Queue Configuration
+// ==============================
+ 
+//   <e>Object specific Memory allocation
+//   <i> Enables object specific memory allocation.
+#ifndef OS_MSGQUEUE_OBJ_MEM
+#define OS_MSGQUEUE_OBJ_MEM         0
+#endif
+ 
+//     <o>Number of Message Queue objects <1-1000>
+//     <i> Defines maximum number of objects that can be active at the same time.
+//     <i> Applies to objects with system provided memory for control blocks.
+#ifndef OS_MSGQUEUE_NUM
+#define OS_MSGQUEUE_NUM             1
+#endif
+ 
+//     <o>Data Storage Memory size [bytes] <0-1073741824:8>
+//     <i> Defines the combined data storage memory size.
+//     <i> Applies to objects with system provided memory for data storage.
+//     <i> Default: 0
+#ifndef OS_MSGQUEUE_DATA_SIZE
+#define OS_MSGQUEUE_DATA_SIZE       0
+#endif
+ 
+//   </e>
+ 
+// </h>
+ 
+// <h>Event Recorder Configuration
+// ===============================
+ 
+//   <e>Global Initialization
+//   <i> Initialize Event Recorder during 'osKernelInitialize'.
+#ifndef OS_EVR_INIT
+#define OS_EVR_INIT                 0
+#endif
+ 
+//     <q>Start recording
+//     <i> Start event recording after initialization.
+#ifndef OS_EVR_START
+#define OS_EVR_START                1
+#endif
+ 
+//     <h>Global Event Filter Setup
+//     <i> Initial recording level applied to all components.
+//       <o.0>Error events
+//       <o.1>API function call events
+//       <o.2>Operation events
+//       <o.3>Detailed operation events
+//     </h>
+#ifndef OS_EVR_LEVEL
+#define OS_EVR_LEVEL                0x00U
+#endif
+ 
+//     <h>RTOS Event Filter Setup
+//     <i> Recording levels for RTX components.
+//     <i> Only applicable if events for the respective component are generated.
+ 
+//       <e.7>Memory Management
+//       <i> Recording level for Memory Management events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_MEMORY_LEVEL
+#define OS_EVR_MEMORY_LEVEL         0x81U
+#endif
+ 
+//       <e.7>Kernel
+//       <i> Recording level for Kernel events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_KERNEL_LEVEL
+#define OS_EVR_KERNEL_LEVEL         0x81U
+#endif
+ 
+//       <e.7>Thread
+//       <i> Recording level for Thread events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_THREAD_LEVEL
+#define OS_EVR_THREAD_LEVEL         0x85U
+#endif
+ 
+//       <e.7>Generic Wait
+//       <i> Recording level for Generic Wait events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_WAIT_LEVEL
+#define OS_EVR_WAIT_LEVEL           0x81U
+#endif
+ 
+//       <e.7>Thread Flags
+//       <i> Recording level for Thread Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_THFLAGS_LEVEL
+#define OS_EVR_THFLAGS_LEVEL        0x81U
+#endif
+ 
+//       <e.7>Event Flags
+//       <i> Recording level for Event Flags events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_EVFLAGS_LEVEL
+#define OS_EVR_EVFLAGS_LEVEL        0x81U
+#endif
+ 
+//       <e.7>Timer
+//       <i> Recording level for Timer events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_TIMER_LEVEL
+#define OS_EVR_TIMER_LEVEL          0x81U
+#endif
+ 
+//       <e.7>Mutex
+//       <i> Recording level for Mutex events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_MUTEX_LEVEL
+#define OS_EVR_MUTEX_LEVEL          0x81U
+#endif
+ 
+//       <e.7>Semaphore
+//       <i> Recording level for Semaphore events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_SEMAPHORE_LEVEL
+#define OS_EVR_SEMAPHORE_LEVEL      0x81U
+#endif
+ 
+//       <e.7>Memory Pool
+//       <i> Recording level for Memory Pool events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_MEMPOOL_LEVEL
+#define OS_EVR_MEMPOOL_LEVEL        0x81U
+#endif
+ 
+//       <e.7>Message Queue
+//       <i> Recording level for Message Queue events.
+//         <o.0>Error events
+//         <o.1>API function call events
+//         <o.2>Operation events
+//         <o.3>Detailed operation events
+//       </e>
+#ifndef OS_EVR_MSGQUEUE_LEVEL
+#define OS_EVR_MSGQUEUE_LEVEL       0x81U
+#endif
+ 
+//     </h>
+ 
+//   </e>
+ 
+//   <h>RTOS Event Generation
+//   <i> Enables event generation for RTX components (requires RTX source variant).
+ 
+//     <q>Memory Management
+//     <i> Enables Memory Management event generation.
+#ifndef OS_EVR_MEMORY
+#define OS_EVR_MEMORY               1
+#endif
+ 
+//     <q>Kernel
+//     <i> Enables Kernel event generation.
+#ifndef OS_EVR_KERNEL
+#define OS_EVR_KERNEL               1
+#endif
+ 
+//     <q>Thread
+//     <i> Enables Thread event generation.
+#ifndef OS_EVR_THREAD
+#define OS_EVR_THREAD               1
+#endif
+ 
+//     <q>Generic Wait
+//     <i> Enables Generic Wait event generation.
+#ifndef OS_EVR_WAIT
+#define OS_EVR_WAIT                 1
+#endif
+ 
+//     <q>Thread Flags
+//     <i> Enables Thread Flags event generation.
+#ifndef OS_EVR_THFLAGS
+#define OS_EVR_THFLAGS              1
+#endif
+ 
+//     <q>Event Flags
+//     <i> Enables Event Flags event generation.
+#ifndef OS_EVR_EVFLAGS
+#define OS_EVR_EVFLAGS              1
+#endif
+ 
+//     <q>Timer
+//     <i> Enables Timer event generation.
+#ifndef OS_EVR_TIMER
+#define OS_EVR_TIMER                1
+#endif
+ 
+//     <q>Mutex
+//     <i> Enables Mutex event generation.
+#ifndef OS_EVR_MUTEX
+#define OS_EVR_MUTEX                1
+#endif
+ 
+//     <q>Semaphore
+//     <i> Enables Semaphore event generation.
+#ifndef OS_EVR_SEMAPHORE
+#define OS_EVR_SEMAPHORE            1
+#endif
+ 
+//     <q>Memory Pool
+//     <i> Enables Memory Pool event generation.
+#ifndef OS_EVR_MEMPOOL
+#define OS_EVR_MEMPOOL              1
+#endif
+ 
+//     <q>Message Queue
+//     <i> Enables Message Queue event generation.
+#ifndef OS_EVR_MSGQUEUE
+#define OS_EVR_MSGQUEUE             1
+#endif
+ 
+//   </h>
+ 
+// </h>
+ 
+// Number of Threads which use standard C/C++ library libspace
+// (when thread specific memory allocation is not used).
+#if (OS_THREAD_OBJ_MEM == 0)
+#ifndef OS_THREAD_LIBSPACE_NUM
+#define OS_THREAD_LIBSPACE_NUM      4
+#endif
+#else
+#define OS_THREAD_LIBSPACE_NUM      OS_THREAD_NUM
+#endif
+ 
+//------------- <<< end of configuration section >>> ---------------------------
+ 
+#endif  // RTX_CONFIG_H_

CMSIS/RTOS2/RTX/Include/rtx_def.h

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2021 Arm Limited. All rights reserved.
+ *
+ * This Software is licensed under an Arm proprietary license.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX derived definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+
+#ifndef RTX_DEF_H_
+#define RTX_DEF_H_
+
+#ifdef   _RTE_
+#include "RTE_Components.h"
+#endif
+#include "RTX_Config.h"
+
+#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))
+  #define RTX_OBJ_MEM_USAGE
+#endif
+
+#if (defined(OS_STACK_CHECK) && (OS_STACK_CHECK != 0))
+  #define RTX_STACK_CHECK
+#endif
+
+#ifdef  RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS
+  #define DOMAIN_NS             1
+#endif
+
+#endif  // RTX_DEF_H_

CMSIS/RTOS2/RTX/Include/rtx_os.h

@@ -0,0 +1,477 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX OS definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+ 
+#ifndef RTX_OS_H_
+#define RTX_OS_H_
+ 
+#include <stdint.h>
+#include <stddef.h>
+#include "cmsis_os2.h"
+#include "rtx_def.h"
+ 
+#ifdef  __cplusplus
+extern "C"
+{
+#endif
+ 
+ 
+/// Kernel Information
+#define osRtxVersionAPI      20010003   ///< API version (2.1.3)
+#define osRtxVersionKernel   50050003   ///< Kernel version (5.5.3)
+#define osRtxKernelId     "RTX V5.5.3"  ///< Kernel identification string
+ 
+ 
+//  ==== Common definitions ====
+ 
+/// Object Identifier definitions
+#define osRtxIdInvalid          0x00U
+#define osRtxIdThread           0xF1U
+#define osRtxIdTimer            0xF2U
+#define osRtxIdEventFlags       0xF3U
+#define osRtxIdMutex            0xF5U
+#define osRtxIdSemaphore        0xF6U
+#define osRtxIdMemoryPool       0xF7U
+#define osRtxIdMessage          0xF9U
+#define osRtxIdMessageQueue     0xFAU
+ 
+/// Object Flags definitions
+#define osRtxFlagSystemObject   0x01U
+#define osRtxFlagSystemMemory   0x02U
+ 
+ 
+//  ==== Kernel definitions ====
+ 
+/// Kernel State definitions
+#define osRtxKernelInactive             ((uint8_t)osKernelInactive)
+#define osRtxKernelReady                ((uint8_t)osKernelReady)
+#define osRtxKernelRunning              ((uint8_t)osKernelRunning)
+#define osRtxKernelLocked               ((uint8_t)osKernelLocked)
+#define osRtxKernelSuspended            ((uint8_t)osKernelSuspended)
+ 
+ 
+//  ==== Thread definitions ====
+ 
+/// Thread State definitions (extending osThreadState)
+#define osRtxThreadStateMask            0x0FU
+ 
+#define osRtxThreadInactive             ((uint8_t)osThreadInactive)
+#define osRtxThreadReady                ((uint8_t)osThreadReady)
+#define osRtxThreadRunning              ((uint8_t)osThreadRunning)
+#define osRtxThreadBlocked              ((uint8_t)osThreadBlocked)
+#define osRtxThreadTerminated           ((uint8_t)osThreadTerminated)
+ 
+#define osRtxThreadWaitingDelay         ((uint8_t)(osRtxThreadBlocked | 0x10U))
+#define osRtxThreadWaitingJoin          ((uint8_t)(osRtxThreadBlocked | 0x20U))
+#define osRtxThreadWaitingThreadFlags   ((uint8_t)(osRtxThreadBlocked | 0x30U))
+#define osRtxThreadWaitingEventFlags    ((uint8_t)(osRtxThreadBlocked | 0x40U))
+#define osRtxThreadWaitingMutex         ((uint8_t)(osRtxThreadBlocked | 0x50U))
+#define osRtxThreadWaitingSemaphore     ((uint8_t)(osRtxThreadBlocked | 0x60U))
+#define osRtxThreadWaitingMemoryPool    ((uint8_t)(osRtxThreadBlocked | 0x70U))
+#define osRtxThreadWaitingMessageGet    ((uint8_t)(osRtxThreadBlocked | 0x80U))
+#define osRtxThreadWaitingMessagePut    ((uint8_t)(osRtxThreadBlocked | 0x90U))
+ 
+/// Thread Flags definitions
+#define osRtxThreadFlagDefStack 0x10U   ///< Default Stack flag
+ 
+/// Stack Marker definitions
+#define osRtxStackMagicWord     0xE25A2EA5U ///< Stack Magic Word (Stack Base)
+#define osRtxStackFillPattern   0xCCCCCCCCU ///< Stack Fill Pattern 
+ 
+/// Thread Control Block
+typedef struct osRtxThread_s {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t                       state;  ///< Object State
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                        attr;  ///< Object Attributes
+  const char                    *name;  ///< Object Name
+  struct osRtxThread_s   *thread_next;  ///< Link pointer to next Thread in Object list
+  struct osRtxThread_s   *thread_prev;  ///< Link pointer to previous Thread in Object list
+  struct osRtxThread_s    *delay_next;  ///< Link pointer to next Thread in Delay list
+  struct osRtxThread_s    *delay_prev;  ///< Link pointer to previous Thread in Delay list
+  struct osRtxThread_s   *thread_join;  ///< Thread waiting to Join
+  uint32_t                      delay;  ///< Delay Time/Round Robin Time Tick
+  int8_t                     priority;  ///< Thread Priority
+  int8_t                priority_base;  ///< Base Priority
+  uint8_t                 stack_frame;  ///< Stack Frame (EXC_RETURN[7..0])
+  uint8_t               flags_options;  ///< Thread/Event Flags Options
+  uint32_t                 wait_flags;  ///< Waiting Thread/Event Flags
+  uint32_t               thread_flags;  ///< Thread Flags
+  struct osRtxMutex_s     *mutex_list;  ///< Link pointer to list of owned Mutexes
+  void                     *stack_mem;  ///< Stack Memory
+  uint32_t                 stack_size;  ///< Stack Size
+  uint32_t                         sp;  ///< Current Stack Pointer
+  uint32_t                thread_addr;  ///< Thread entry address
+  uint32_t                  tz_memory;  ///< TrustZone Memory Identifier
+#ifdef RTX_TF_M_EXTENSION
+  uint32_t                  tz_module;  ///< TrustZone Module Identifier
+#endif
+} osRtxThread_t;
+ 
+ 
+//  ==== Timer definitions ====
+ 
+/// Timer State definitions
+#define osRtxTimerInactive      0x00U   ///< Timer Inactive
+#define osRtxTimerStopped       0x01U   ///< Timer Stopped
+#define osRtxTimerRunning       0x02U   ///< Timer Running
+ 
+/// Timer Type definitions
+#define osRtxTimerPeriodic      ((uint8_t)osTimerPeriodic)
+ 
+/// Timer Function Information
+typedef struct {
+  osTimerFunc_t                  func;  ///< Function Pointer
+  void                           *arg;  ///< Function Argument
+} osRtxTimerFinfo_t;
+ 
+/// Timer Control Block
+typedef struct osRtxTimer_s {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t                       state;  ///< Object State
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                        type;  ///< Timer Type (Periodic/One-shot)
+  const char                    *name;  ///< Object Name
+  struct osRtxTimer_s           *prev;  ///< Pointer to previous active Timer
+  struct osRtxTimer_s           *next;  ///< Pointer to next active Timer
+  uint32_t                       tick;  ///< Timer current Tick
+  uint32_t                       load;  ///< Timer Load value
+  osRtxTimerFinfo_t             finfo;  ///< Timer Function Info
+} osRtxTimer_t;
+ 
+ 
+//  ==== Event Flags definitions ====
+ 
+/// Event Flags Control Block
+typedef struct {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    reserved;
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Waiting Threads List
+  uint32_t                event_flags;  ///< Event Flags
+} osRtxEventFlags_t;
+ 
+ 
+//  ==== Mutex definitions ====
+ 
+/// Mutex Control Block
+typedef struct osRtxMutex_s {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                        attr;  ///< Object Attributes
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Waiting Threads List
+  osRtxThread_t         *owner_thread;  ///< Owner Thread
+  struct osRtxMutex_s     *owner_prev;  ///< Pointer to previous owned Mutex
+  struct osRtxMutex_s     *owner_next;  ///< Pointer to next owned Mutex
+  uint8_t                        lock;  ///< Lock counter
+  uint8_t                  padding[3];
+} osRtxMutex_t;
+ 
+ 
+//  ==== Semaphore definitions ====
+ 
+/// Semaphore Control Block
+typedef struct {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    reserved;
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Waiting Threads List
+  uint16_t                     tokens;  ///< Current number of tokens
+  uint16_t                 max_tokens;  ///< Maximum number of tokens
+} osRtxSemaphore_t;
+ 
+ 
+//  ==== Memory Pool definitions ====
+ 
+/// Memory Pool Information
+typedef struct {
+  uint32_t                 max_blocks;  ///< Maximum number of Blocks
+  uint32_t                used_blocks;  ///< Number of used Blocks
+  uint32_t                 block_size;  ///< Block Size
+  void                    *block_base;  ///< Block Memory Base Address
+  void                     *block_lim;  ///< Block Memory Limit Address
+  void                    *block_free;  ///< First free Block Address
+} osRtxMpInfo_t;
+ 
+/// Memory Pool Control Block
+typedef struct {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    reserved;
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Waiting Threads List
+  osRtxMpInfo_t               mp_info;  ///< Memory Pool Info
+} osRtxMemoryPool_t;
+ 
+ 
+//  ==== Message Queue definitions ====
+ 
+/// Message Control Block
+typedef struct osRtxMessage_s {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    priority;  ///< Message Priority
+  struct osRtxMessage_s         *prev;  ///< Pointer to previous Message
+  struct osRtxMessage_s         *next;  ///< Pointer to next Message
+} osRtxMessage_t;
+ 
+/// Message Queue Control Block
+typedef struct {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t              reserved_state;  ///< Object State (not used)
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    reserved;
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Waiting Threads List
+  osRtxMpInfo_t               mp_info;  ///< Memory Pool Info
+  uint32_t                   msg_size;  ///< Message Size
+  uint32_t                  msg_count;  ///< Number of queued Messages
+  osRtxMessage_t           *msg_first;  ///< Pointer to first Message
+  osRtxMessage_t            *msg_last;  ///< Pointer to last Message
+} osRtxMessageQueue_t;
+ 
+ 
+//  ==== Generic Object definitions ====
+ 
+/// Generic Object Control Block
+typedef struct {
+  uint8_t                          id;  ///< Object Identifier
+  uint8_t                       state;  ///< Object State
+  uint8_t                       flags;  ///< Object Flags
+  uint8_t                    reserved;
+  const char                    *name;  ///< Object Name
+  osRtxThread_t          *thread_list;  ///< Threads List
+} osRtxObject_t;
+ 
+ 
+//  ==== OS Runtime Information definitions ====
+ 
+/// OS Runtime Information structure
+typedef struct {
+  const char                   *os_id;  ///< OS Identification
+  uint32_t                    version;  ///< OS Version
+  struct {                              ///< Kernel Info
+    uint8_t                     state;  ///< State
+    volatile uint8_t          blocked;  ///< Blocked
+    uint8_t                    pendSV;  ///< Pending SV
+    uint8_t                  reserved;
+    uint32_t                     tick;  ///< Tick counter
+  } kernel;
+  int32_t                   tick_irqn;  ///< Tick Timer IRQ Number
+  struct {                              ///< Thread Info
+    struct {                            ///< Thread Run Info
+      osRtxThread_t             *curr;  ///< Current running Thread
+      osRtxThread_t             *next;  ///< Next Thread to Run
+    } run;
+    osRtxObject_t               ready;  ///< Ready List Object
+    osRtxThread_t               *idle;  ///< Idle Thread
+    osRtxThread_t         *delay_list;  ///< Delay List
+    osRtxThread_t          *wait_list;  ///< Wait List (no Timeout)
+    osRtxThread_t     *terminate_list;  ///< Terminate Thread List
+    uint32_t                 reserved;
+    struct {                            ///< Thread Round Robin Info
+      osRtxThread_t           *thread;  ///< Round Robin Thread
+      uint32_t                timeout;  ///< Round Robin Timeout
+    } robin;
+  } thread;
+  struct {                              ///< Timer Info
+    osRtxTimer_t                *list;  ///< Active Timer List
+    osRtxThread_t             *thread;  ///< Timer Thread
+    osRtxMessageQueue_t           *mq;  ///< Timer Message Queue
+    void                (*tick)(void);  ///< Timer Tick Function
+  } timer;
+  struct {                              ///< ISR Post Processing Queue
+    uint16_t                      max;  ///< Maximum Items
+    uint16_t                      cnt;  ///< Item Count
+    uint16_t                       in;  ///< Incoming Item Index
+    uint16_t                      out;  ///< Outgoing Item Index
+    void                       **data;  ///< Queue Data
+  } isr_queue;
+  struct {                                      ///< ISR Post Processing functions
+    void          (*thread)(osRtxThread_t*);    ///< Thread Post Processing function
+    void (*event_flags)(osRtxEventFlags_t*);    ///< Event Flags Post Processing function
+    void    (*semaphore)(osRtxSemaphore_t*);    ///< Semaphore Post Processing function
+    void (*memory_pool)(osRtxMemoryPool_t*);    ///< Memory Pool Post Processing function
+    void        (*message)(osRtxMessage_t*);    ///< Message Post Processing function
+  } post_process;
+  struct {                              ///< Memory Pools (Variable Block Size)
+    void                       *stack;  ///< Stack Memory
+    void                     *mp_data;  ///< Memory Pool Data Memory
+    void                     *mq_data;  ///< Message Queue Data Memory
+    void                      *common;  ///< Common Memory
+  } mem;
+  struct {                              ///< Memory Pools (Fixed Block Size)
+    osRtxMpInfo_t              *stack;  ///< Stack for Threads
+    osRtxMpInfo_t             *thread;  ///< Thread Control Blocks
+    osRtxMpInfo_t              *timer;  ///< Timer Control Blocks
+    osRtxMpInfo_t        *event_flags;  ///< Event Flags Control Blocks
+    osRtxMpInfo_t              *mutex;  ///< Mutex Control Blocks
+    osRtxMpInfo_t          *semaphore;  ///< Semaphore Control Blocks
+    osRtxMpInfo_t        *memory_pool;  ///< Memory Pool Control Blocks
+    osRtxMpInfo_t      *message_queue;  ///< Message Queue Control Blocks
+  } mpi;
+} osRtxInfo_t;
+ 
+extern osRtxInfo_t osRtxInfo;           ///< OS Runtime Information
+ 
+/// OS Runtime Object Memory Usage structure
+typedef struct {
+  uint32_t cnt_alloc;                   ///< Counter for alloc
+  uint32_t cnt_free;                    ///< Counter for free
+  uint32_t max_used;                    ///< Maximum used
+} osRtxObjectMemUsage_t;
+ 
+/// OS Runtime Object Memory Usage variables
+extern osRtxObjectMemUsage_t osRtxThreadMemUsage;
+extern osRtxObjectMemUsage_t osRtxTimerMemUsage;
+extern osRtxObjectMemUsage_t osRtxEventFlagsMemUsage;
+extern osRtxObjectMemUsage_t osRtxMutexMemUsage;
+extern osRtxObjectMemUsage_t osRtxSemaphoreMemUsage;
+extern osRtxObjectMemUsage_t osRtxMemoryPoolMemUsage;
+extern osRtxObjectMemUsage_t osRtxMessageQueueMemUsage;
+ 
+ 
+//  ==== OS API definitions ====
+ 
+// Object Limits definitions
+#define osRtxThreadFlagsLimit    31U    ///< number of Thread Flags available per thread
+#define osRtxEventFlagsLimit     31U    ///< number of Event Flags available per object
+#define osRtxMutexLockLimit      255U   ///< maximum number of recursive mutex locks
+#define osRtxSemaphoreTokenLimit 65535U ///< maximum number of tokens per semaphore
+ 
+// Control Block sizes
+#define osRtxThreadCbSize        sizeof(osRtxThread_t)
+#define osRtxTimerCbSize         sizeof(osRtxTimer_t)
+#define osRtxEventFlagsCbSize    sizeof(osRtxEventFlags_t)
+#define osRtxMutexCbSize         sizeof(osRtxMutex_t)
+#define osRtxSemaphoreCbSize     sizeof(osRtxSemaphore_t)
+#define osRtxMemoryPoolCbSize    sizeof(osRtxMemoryPool_t)
+#define osRtxMessageQueueCbSize  sizeof(osRtxMessageQueue_t)
+ 
+/// Memory size in bytes for Memory Pool storage.
+/// \param         block_count   maximum number of memory blocks in memory pool.
+/// \param         block_size    memory block size in bytes.
+#define osRtxMemoryPoolMemSize(block_count, block_size) \
+  (4*(block_count)*(((block_size)+3)/4))
+ 
+/// Memory size in bytes for Message Queue storage.
+/// \param         msg_count     maximum number of messages in queue.
+/// \param         msg_size      maximum message size in bytes.
+#define osRtxMessageQueueMemSize(msg_count, msg_size) \
+  (4*(msg_count)*(3+(((msg_size)+3)/4)))
+ 
+ 
+//  ==== OS External Functions ====
+ 
+// OS Error Codes
+#define osRtxErrorStackUnderflow        1U  ///< \deprecated Superseded by \ref osRtxErrorStackOverflow.
+#define osRtxErrorStackOverflow         1U  ///< Stack overflow, i.e. stack pointer below its lower memory limit for descending stacks.
+#define osRtxErrorISRQueueOverflow      2U  ///< ISR Queue overflow detected when inserting object.
+#define osRtxErrorTimerQueueOverflow    3U  ///< User Timer Callback Queue overflow detected for timer.
+#define osRtxErrorClibSpace             4U  ///< Standard C/C++ library libspace not available: increase \c OS_THREAD_LIBSPACE_NUM.
+#define osRtxErrorClibMutex             5U  ///< Standard C/C++ library mutex initialization failed.
+ 
+/// OS Error Callback function
+extern uint32_t osRtxErrorNotify (uint32_t code, void *object_id);
+extern uint32_t osRtxKernelErrorNotify (uint32_t code, void *object_id);
+ 
+/// OS Idle Thread
+extern void osRtxIdleThread (void *argument);
+ 
+/// OS Exception handlers
+extern void SVC_Handler     (void);
+extern void PendSV_Handler  (void);
+extern void SysTick_Handler (void);
+ 
+/// OS Trusted Firmware M Extension
+#ifdef RTX_TF_M_EXTENSION
+extern uint32_t osRtxTzGetModuleId (void);
+#endif
+ 
+ 
+//  ==== OS External Configuration ====
+ 
+/// OS Configuration flags
+#define osRtxConfigPrivilegedMode   (1UL<<0)    ///< Threads in Privileged mode
+#define osRtxConfigStackCheck       (1UL<<1)    ///< Stack overrun checking
+#define osRtxConfigStackWatermark   (1UL<<2)    ///< Stack usage Watermark
+ 
+/// OS Configuration structure
+typedef struct {
+  uint32_t                             flags;   ///< OS Configuration Flags
+  uint32_t                         tick_freq;   ///< Kernel Tick Frequency
+  uint32_t                     robin_timeout;   ///< Round Robin Timeout Tick
+  struct {                                      ///< ISR Post Processing Queue
+    void                              **data;   ///< Queue Data
+    uint16_t                             max;   ///< Maximum Items
+    uint16_t                         padding;
+  } isr_queue;
+  struct {                                      ///< Memory Pools (Variable Block Size)
+    void                         *stack_addr;   ///< Stack Memory Address
+    uint32_t                      stack_size;   ///< Stack Memory Size
+    void                       *mp_data_addr;   ///< Memory Pool Memory Address
+    uint32_t                    mp_data_size;   ///< Memory Pool Memory Size
+    void                       *mq_data_addr;   ///< Message Queue Data Memory Address
+    uint32_t                    mq_data_size;   ///< Message Queue Data Memory Size
+    void                        *common_addr;   ///< Common Memory Address
+    uint32_t                     common_size;   ///< Common Memory Size
+  } mem;
+  struct {                                      ///< Memory Pools (Fixed Block Size)
+    osRtxMpInfo_t                     *stack;   ///< Stack for Threads
+    osRtxMpInfo_t                    *thread;   ///< Thread Control Blocks
+    osRtxMpInfo_t                     *timer;   ///< Timer Control Blocks
+    osRtxMpInfo_t               *event_flags;   ///< Event Flags Control Blocks
+    osRtxMpInfo_t                     *mutex;   ///< Mutex Control Blocks
+    osRtxMpInfo_t                 *semaphore;   ///< Semaphore Control Blocks
+    osRtxMpInfo_t               *memory_pool;   ///< Memory Pool Control Blocks
+    osRtxMpInfo_t             *message_queue;   ///< Message Queue Control Blocks
+  } mpi;
+  uint32_t                 thread_stack_size;   ///< Default Thread Stack Size
+  const
+  osThreadAttr_t           *idle_thread_attr;   ///< Idle Thread Attributes
+  const
+  osThreadAttr_t          *timer_thread_attr;   ///< Timer Thread Attributes
+  void               (*timer_thread)(void *);   ///< Timer Thread Function
+  int32_t               (*timer_setup)(void);   ///< Timer Setup Function
+  const
+  osMessageQueueAttr_t        *timer_mq_attr;   ///< Timer Message Queue Attributes
+  uint32_t                     timer_mq_mcnt;   ///< Timer Message Queue maximum Messages
+} osRtxConfig_t;
+ 
+extern const osRtxConfig_t osRtxConfig;         ///< OS Configuration
+ 
+ 
+#ifdef  __cplusplus
+}
+#endif
+ 
+#endif  // RTX_OS_H_

CMSIS/RTOS2/RTX/Source/rtx_core_c.h

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       Cortex Core definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+
+#ifndef RTX_CORE_C_H_
+#define RTX_CORE_C_H_
+
+//lint -emacro((923,9078),SCB) "cast from unsigned long to pointer" [MISRA Note 9]
+#ifndef RTE_COMPONENTS_H
+#include "RTE_Components.h"
+#endif
+#include CMSIS_device_header
+
+#if ((!defined(__ARM_ARCH_6M__))        && \
+     (!defined(__ARM_ARCH_7A__))        && \
+     (!defined(__ARM_ARCH_7M__))        && \
+     (!defined(__ARM_ARCH_7EM__))       && \
+     (!defined(__ARM_ARCH_8M_BASE__))   && \
+     (!defined(__ARM_ARCH_8M_MAIN__))   && \
+     (!defined(__ARM_ARCH_8_1M_MAIN__)))
+#error "Unknown Arm Architecture!"
+#endif
+
+#if   (defined(__ARM_ARCH_7A__) && (__ARM_ARCH_7A__ != 0))
+#include "rtx_core_ca.h"
+#else
+#include "rtx_core_cm.h"
+#endif
+
+#endif  // RTX_CORE_C_H_

CMSIS/RTOS2/RTX/Source/rtx_lib.c

@@ -0,0 +1,770 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Library Configuration
+ *
+ * -----------------------------------------------------------------------------
+ */
+
+#include "cmsis_compiler.h"
+#include "rtx_os.h"
+
+#ifdef    RTE_Compiler_EventRecorder
+#include "EventRecorder.h"
+#include "EventRecorderConf.h"
+#endif
+#include "rtx_evr.h"
+
+
+// System Configuration
+// ====================
+
+// Dynamic Memory
+#if (OS_DYNAMIC_MEM_SIZE != 0)
+#if ((OS_DYNAMIC_MEM_SIZE % 8) != 0)
+#error "Invalid Dynamic Memory size!"
+#endif
+static uint64_t os_mem[OS_DYNAMIC_MEM_SIZE/8] \
+__attribute__((section(".bss.os")));
+#endif
+
+// Kernel Tick Frequency
+#if (OS_TICK_FREQ < 1)
+#error "Invalid Kernel Tick Frequency!"
+#endif
+
+// ISR FIFO Queue
+#if (OS_ISR_FIFO_QUEUE < 4)
+#error "Invalid ISR FIFO Queue size!"
+#endif
+static void *os_isr_queue[OS_ISR_FIFO_QUEUE] \
+__attribute__((section(".bss.os")));
+
+
+// Thread Configuration
+// ====================
+
+#if (((OS_STACK_SIZE % 8) != 0) || (OS_STACK_SIZE < 72))
+#error "Invalid default Thread Stack size!"
+#endif
+
+#if (((OS_IDLE_THREAD_STACK_SIZE % 8) != 0) || (OS_IDLE_THREAD_STACK_SIZE < 72))
+#error "Invalid Idle Thread Stack size!"
+#endif
+
+
+#if (OS_THREAD_OBJ_MEM != 0)
+
+#if (OS_THREAD_NUM == 0)
+#error "Invalid number of user Threads!"
+#endif
+
+#if ((OS_THREAD_USER_STACK_SIZE != 0) && ((OS_THREAD_USER_STACK_SIZE % 8) != 0))
+#error "Invalid total Stack size!"
+#endif
+
+// Thread Control Blocks
+static osRtxThread_t os_thread_cb[OS_THREAD_NUM] \
+__attribute__((section(".bss.os.thread.cb")));
+
+// Thread Default Stack
+#if (OS_THREAD_DEF_STACK_NUM != 0)
+static uint64_t os_thread_def_stack[(OS_THREAD_DEF_STACK_NUM*OS_STACK_SIZE)/8] \
+__attribute__((section(".bss.os.thread.stack")));
+#endif
+
+// Memory Pool for Thread Control Blocks
+static osRtxMpInfo_t os_mpi_thread \
+__attribute__((section(".data.os.thread.mpi"))) =
+{ (uint32_t)OS_THREAD_NUM, 0U, (uint32_t)osRtxThreadCbSize, &os_thread_cb[0], NULL, NULL };
+
+// Memory Pool for Thread Default Stack
+#if (OS_THREAD_DEF_STACK_NUM != 0)
+static osRtxMpInfo_t os_mpi_def_stack \
+__attribute__((section(".data.os.thread.mpi"))) =
+{ (uint32_t)OS_THREAD_DEF_STACK_NUM, 0U, (uint32_t)OS_STACK_SIZE, &os_thread_def_stack[0], NULL, NULL };
+#endif
+
+// Memory Pool for Thread Stack
+#if (OS_THREAD_USER_STACK_SIZE != 0)
+static uint64_t os_thread_stack[(16 + (8*OS_THREAD_NUM) + OS_THREAD_USER_STACK_SIZE)/8] \
+__attribute__((section(".bss.os.thread.stack")));
+#endif
+
+#endif  // (OS_THREAD_OBJ_MEM != 0)
+
+
+// Idle Thread Control Block
+static osRtxThread_t os_idle_thread_cb \
+__attribute__((section(".bss.os.thread.cb")));
+
+// Idle Thread Stack
+static uint64_t os_idle_thread_stack[OS_IDLE_THREAD_STACK_SIZE/8] \
+__attribute__((section(".bss.os.thread.idle.stack")));
+
+// Idle Thread Attributes
+static const osThreadAttr_t os_idle_thread_attr = {
+#if defined(OS_IDLE_THREAD_NAME)
+  OS_IDLE_THREAD_NAME,
+#else
+  NULL,
+#endif
+  osThreadDetached,
+  &os_idle_thread_cb,
+  (uint32_t)sizeof(os_idle_thread_cb),
+  &os_idle_thread_stack[0],
+  (uint32_t)sizeof(os_idle_thread_stack),
+  osPriorityIdle,
+#if defined(OS_IDLE_THREAD_TZ_MOD_ID)
+  (uint32_t)OS_IDLE_THREAD_TZ_MOD_ID,
+#else
+  0U,
+#endif
+  0U
+};
+
+
+// Timer Configuration
+// ===================
+
+#if (OS_TIMER_OBJ_MEM != 0)
+
+#if (OS_TIMER_NUM == 0)
+#error "Invalid number of Timer objects!"
+#endif
+
+// Timer Control Blocks
+static osRtxTimer_t os_timer_cb[OS_TIMER_NUM] \
+__attribute__((section(".bss.os.timer.cb")));
+
+// Memory Pool for Timer Control Blocks
+static osRtxMpInfo_t os_mpi_timer \
+__attribute__((section(".data.os.timer.mpi"))) =
+{ (uint32_t)OS_TIMER_NUM, 0U, (uint32_t)osRtxTimerCbSize, &os_timer_cb[0], NULL, NULL };
+
+#endif  // (OS_TIMER_OBJ_MEM != 0)
+
+
+#if ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))
+
+#if (((OS_TIMER_THREAD_STACK_SIZE % 8) != 0) || (OS_TIMER_THREAD_STACK_SIZE < 96))
+#error "Invalid Timer Thread Stack size!"
+#endif
+
+// Timer Thread Control Block
+static osRtxThread_t os_timer_thread_cb \
+__attribute__((section(".bss.os.thread.cb")));
+
+// Timer Thread Stack
+static uint64_t os_timer_thread_stack[OS_TIMER_THREAD_STACK_SIZE/8] \
+__attribute__((section(".bss.os.thread.timer.stack")));
+
+// Timer Thread Attributes
+static const osThreadAttr_t os_timer_thread_attr = {
+#if defined(OS_TIMER_THREAD_NAME)
+  OS_TIMER_THREAD_NAME,
+#else
+  NULL,
+#endif
+  osThreadDetached,
+  &os_timer_thread_cb,
+  (uint32_t)sizeof(os_timer_thread_cb),
+  &os_timer_thread_stack[0],
+  (uint32_t)sizeof(os_timer_thread_stack),
+  //lint -e{9030} -e{9034} "cast from signed to enum"
+  (osPriority_t)OS_TIMER_THREAD_PRIO,
+#if defined(OS_TIMER_THREAD_TZ_MOD_ID)
+  (uint32_t)OS_TIMER_THREAD_TZ_MOD_ID,
+#else
+  0U,
+#endif
+  0U
+};
+
+// Timer Message Queue Control Block
+static osRtxMessageQueue_t os_timer_mq_cb \
+__attribute__((section(".bss.os.msgqueue.cb")));
+
+// Timer Message Queue Data
+static uint32_t os_timer_mq_data[osRtxMessageQueueMemSize(OS_TIMER_CB_QUEUE,8)/4] \
+__attribute__((section(".bss.os.msgqueue.mem")));
+
+// Timer Message Queue Attributes
+static const osMessageQueueAttr_t os_timer_mq_attr = {
+  NULL,
+  0U,
+  &os_timer_mq_cb,
+  (uint32_t)sizeof(os_timer_mq_cb),
+  &os_timer_mq_data[0],
+  (uint32_t)sizeof(os_timer_mq_data)
+};
+
+extern int32_t osRtxTimerSetup  (void);
+extern void    osRtxTimerThread (void *argument);
+
+#endif  // ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))
+
+
+// Event Flags Configuration
+// =========================
+
+#if (OS_EVFLAGS_OBJ_MEM != 0)
+
+#if (OS_EVFLAGS_NUM == 0)
+#error "Invalid number of Event Flags objects!"
+#endif
+
+// Event Flags Control Blocks
+static osRtxEventFlags_t os_ef_cb[OS_EVFLAGS_NUM] \
+__attribute__((section(".bss.os.evflags.cb")));
+
+// Memory Pool for Event Flags Control Blocks
+static osRtxMpInfo_t os_mpi_ef \
+__attribute__((section(".data.os.evflags.mpi"))) =
+{ (uint32_t)OS_EVFLAGS_NUM, 0U, (uint32_t)osRtxEventFlagsCbSize, &os_ef_cb[0], NULL, NULL };
+
+#endif  // (OS_EVFLAGS_OBJ_MEM != 0)
+
+
+// Mutex Configuration
+// ===================
+
+#if (OS_MUTEX_OBJ_MEM != 0)
+
+#if (OS_MUTEX_NUM == 0)
+#error "Invalid number of Mutex objects!"
+#endif
+
+// Mutex Control Blocks
+static osRtxMutex_t os_mutex_cb[OS_MUTEX_NUM] \
+__attribute__((section(".bss.os.mutex.cb")));
+
+// Memory Pool for Mutex Control Blocks
+static osRtxMpInfo_t os_mpi_mutex \
+__attribute__((section(".data.os.mutex.mpi"))) =
+{ (uint32_t)OS_MUTEX_NUM, 0U, (uint32_t)osRtxMutexCbSize, &os_mutex_cb[0], NULL, NULL };
+
+#endif  // (OS_MUTEX_OBJ_MEM != 0)
+
+
+// Semaphore Configuration
+// =======================
+
+#if (OS_SEMAPHORE_OBJ_MEM != 0)
+
+#if (OS_SEMAPHORE_NUM == 0)
+#error "Invalid number of Semaphore objects!"
+#endif
+
+// Semaphore Control Blocks
+static osRtxSemaphore_t os_semaphore_cb[OS_SEMAPHORE_NUM] \
+__attribute__((section(".bss.os.semaphore.cb")));
+
+// Memory Pool for Semaphore Control Blocks
+static osRtxMpInfo_t os_mpi_semaphore \
+__attribute__((section(".data.os.semaphore.mpi"))) =
+{ (uint32_t)OS_SEMAPHORE_NUM, 0U, (uint32_t)osRtxSemaphoreCbSize, &os_semaphore_cb[0], NULL, NULL };
+
+#endif  // (OS_SEMAPHORE_OBJ_MEM != 0)
+
+
+// Memory Pool Configuration
+// =========================
+
+#if (OS_MEMPOOL_OBJ_MEM != 0)
+
+#if (OS_MEMPOOL_NUM == 0)
+#error "Invalid number of Memory Pool objects!"
+#endif
+
+// Memory Pool Control Blocks
+static osRtxMemoryPool_t os_mp_cb[OS_MEMPOOL_NUM] \
+__attribute__((section(".bss.os.mempool.cb")));
+
+// Memory Pool for Memory Pool Control Blocks
+static osRtxMpInfo_t os_mpi_mp \
+__attribute__((section(".data.os.mempool.mpi"))) =
+{ (uint32_t)OS_MEMPOOL_NUM, 0U, (uint32_t)osRtxMemoryPoolCbSize, &os_mp_cb[0], NULL, NULL };
+
+// Memory Pool for Memory Pool Data Storage
+#if (OS_MEMPOOL_DATA_SIZE != 0)
+#if ((OS_MEMPOOL_DATA_SIZE % 8) != 0)
+#error "Invalid Data Memory size for Memory Pools!"
+#endif
+static uint64_t os_mp_data[(16 + (8*OS_MEMPOOL_NUM) + OS_MEMPOOL_DATA_SIZE)/8] \
+__attribute__((section(".bss.os.mempool.mem")));
+#endif
+
+#endif  // (OS_MEMPOOL_OBJ_MEM != 0)
+
+
+// Message Queue Configuration
+// ===========================
+
+#if (OS_MSGQUEUE_OBJ_MEM != 0)
+
+#if (OS_MSGQUEUE_NUM == 0)
+#error "Invalid number of Message Queue objects!"
+#endif
+
+// Message Queue Control Blocks
+static osRtxMessageQueue_t os_mq_cb[OS_MSGQUEUE_NUM] \
+__attribute__((section(".bss.os.msgqueue.cb")));
+
+// Memory Pool for Message Queue Control Blocks
+static osRtxMpInfo_t os_mpi_mq \
+__attribute__((section(".data.os.msgqueue.mpi"))) =
+{ (uint32_t)OS_MSGQUEUE_NUM, 0U, (uint32_t)osRtxMessageQueueCbSize, &os_mq_cb[0], NULL, NULL };
+
+// Memory Pool for Message Queue Data Storage
+#if (OS_MSGQUEUE_DATA_SIZE != 0)
+#if ((OS_MSGQUEUE_DATA_SIZE % 8) != 0)
+#error "Invalid Data Memory size for Message Queues!"
+#endif
+static uint64_t os_mq_data[(16 + ((8+12)*OS_MSGQUEUE_NUM) + OS_MSGQUEUE_DATA_SIZE + 7)/8] \
+__attribute__((section(".bss.os.msgqueue.mem")));
+#endif
+
+#endif  // (OS_MSGQUEUE_OBJ_MEM != 0)
+
+
+// Event Recorder Configuration
+// ============================
+
+#if (defined(OS_EVR_INIT) && (OS_EVR_INIT != 0))
+
+#ifdef RTE_Compiler_EventRecorder
+
+// Event Recorder Initialize
+__STATIC_INLINE void evr_initialize (void) {
+
+  (void)EventRecorderInitialize(OS_EVR_LEVEL, (uint32_t)OS_EVR_START);
+
+#if ((OS_EVR_MEMORY_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_MEMORY_LEVEL & 0x0FU,    EvtRtxMemoryNo,       EvtRtxMemoryNo);
+  (void)EventRecorderDisable(~OS_EVR_MEMORY_LEVEL & 0x0FU,    EvtRtxMemoryNo,       EvtRtxMemoryNo);
+#endif
+#if ((OS_EVR_KERNEL_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_KERNEL_LEVEL & 0x0FU,    EvtRtxKernelNo,       EvtRtxKernelNo);
+  (void)EventRecorderDisable(~OS_EVR_KERNEL_LEVEL & 0x0FU,    EvtRtxKernelNo,       EvtRtxMemoryNo);
+#endif
+#if ((OS_EVR_THREAD_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_THREAD_LEVEL & 0x0FU,    EvtRtxThreadNo,       EvtRtxThreadNo);
+  (void)EventRecorderDisable(~OS_EVR_THREAD_LEVEL & 0x0FU,    EvtRtxThreadNo,       EvtRtxThreadNo);
+#endif
+#if ((OS_EVR_WAIT_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_WAIT_LEVEL & 0x0FU,      EvtRtxWaitNo,         EvtRtxWaitNo);
+  (void)EventRecorderDisable(~OS_EVR_WAIT_LEVEL & 0x0FU,      EvtRtxWaitNo,         EvtRtxWaitNo);
+#endif
+#if ((OS_EVR_THFLAGS_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_THFLAGS_LEVEL & 0x0FU,   EvtRtxThreadFlagsNo,  EvtRtxThreadFlagsNo);
+  (void)EventRecorderDisable(~OS_EVR_THFLAGS_LEVEL & 0x0FU,   EvtRtxThreadFlagsNo,  EvtRtxThreadFlagsNo);
+#endif
+#if ((OS_EVR_EVFLAGS_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_EVFLAGS_LEVEL & 0x0FU,   EvtRtxEventFlagsNo,   EvtRtxEventFlagsNo);
+  (void)EventRecorderDisable(~OS_EVR_EVFLAGS_LEVEL & 0x0FU,   EvtRtxEventFlagsNo,   EvtRtxEventFlagsNo);
+#endif
+#if ((OS_EVR_TIMER_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_TIMER_LEVEL & 0x0FU,     EvtRtxTimerNo,        EvtRtxTimerNo);
+  (void)EventRecorderDisable(~OS_EVR_TIMER_LEVEL & 0x0FU,     EvtRtxTimerNo,        EvtRtxTimerNo);
+#endif
+#if ((OS_EVR_MUTEX_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_MUTEX_LEVEL & 0x0FU,     EvtRtxMutexNo,        EvtRtxMutexNo);
+  (void)EventRecorderDisable(~OS_EVR_MUTEX_LEVEL & 0x0FU,     EvtRtxMutexNo,        EvtRtxMutexNo);
+#endif
+#if ((OS_EVR_SEMAPHORE_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_SEMAPHORE_LEVEL & 0x0FU, EvtRtxSemaphoreNo,    EvtRtxSemaphoreNo);
+  (void)EventRecorderDisable(~OS_EVR_SEMAPHORE_LEVEL & 0x0FU, EvtRtxSemaphoreNo,    EvtRtxSemaphoreNo);
+#endif
+#if ((OS_EVR_MEMPOOL_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_MEMPOOL_LEVEL & 0x0FU,   EvtRtxMemoryPoolNo,   EvtRtxMemoryPoolNo);
+  (void)EventRecorderDisable(~OS_EVR_MEMPOOL_LEVEL & 0x0FU,   EvtRtxMemoryPoolNo,   EvtRtxMemoryPoolNo);
+#endif
+#if ((OS_EVR_MSGQUEUE_LEVEL & 0x80U) != 0U)
+  (void)EventRecorderEnable(  OS_EVR_MSGQUEUE_LEVEL & 0x0FU,  EvtRtxMessageQueueNo, EvtRtxMessageQueueNo);
+  (void)EventRecorderDisable(~OS_EVR_MSGQUEUE_LEVEL & 0x0FU,  EvtRtxMessageQueueNo, EvtRtxMessageQueueNo);
+#endif
+}
+
+#else
+#warning "Event Recorder cannot be initialized (Event Recorder component is not selected)!"
+#define evr_initialize()
+#endif
+
+#endif  // (OS_EVR_INIT != 0)
+
+
+// OS Configuration
+// ================
+
+
+const osRtxConfig_t osRtxConfig \
+__USED \
+__attribute__((section(".rodata"))) =
+{
+  //lint -e{835} "Zero argument to operator"
+  0U   // Flags
+#if (OS_PRIVILEGE_MODE != 0)
+  | osRtxConfigPrivilegedMode
+#endif
+#if (OS_STACK_CHECK != 0)
+  | osRtxConfigStackCheck
+#endif
+#if (OS_STACK_WATERMARK != 0)
+  | osRtxConfigStackWatermark
+#endif
+  ,
+  (uint32_t)OS_TICK_FREQ,
+#if (OS_ROBIN_ENABLE != 0)
+  (uint32_t)OS_ROBIN_TIMEOUT,
+#else
+  0U,
+#endif
+  { &os_isr_queue[0], (uint16_t)(sizeof(os_isr_queue)/sizeof(void *)), 0U },
+  { 
+    // Memory Pools (Variable Block Size)
+#if ((OS_THREAD_OBJ_MEM != 0) && (OS_THREAD_USER_STACK_SIZE != 0))
+    &os_thread_stack[0], sizeof(os_thread_stack),
+#else
+    NULL, 0U,
+#endif
+#if ((OS_MEMPOOL_OBJ_MEM != 0) && (OS_MEMPOOL_DATA_SIZE != 0))
+    &os_mp_data[0], sizeof(os_mp_data),
+#else
+    NULL, 0U,
+#endif
+#if ((OS_MSGQUEUE_OBJ_MEM != 0) && (OS_MSGQUEUE_DATA_SIZE != 0))
+    &os_mq_data[0], sizeof(os_mq_data),
+#else
+    NULL, 0U,
+#endif
+#if (OS_DYNAMIC_MEM_SIZE != 0)
+    &os_mem[0], (uint32_t)OS_DYNAMIC_MEM_SIZE,
+#else
+    NULL, 0U
+#endif
+  },
+  {
+    // Memory Pools (Fixed Block Size)
+#if (OS_THREAD_OBJ_MEM != 0)
+#if (OS_THREAD_DEF_STACK_NUM != 0)
+    &os_mpi_def_stack,
+#else
+    NULL,
+#endif
+    &os_mpi_thread,
+#else
+    NULL, 
+    NULL,
+#endif
+#if (OS_TIMER_OBJ_MEM != 0)
+    &os_mpi_timer,
+#else
+    NULL,
+#endif
+#if (OS_EVFLAGS_OBJ_MEM != 0)
+    &os_mpi_ef,
+#else
+    NULL,
+#endif
+#if (OS_MUTEX_OBJ_MEM != 0)
+    &os_mpi_mutex,
+#else
+    NULL,
+#endif
+#if (OS_SEMAPHORE_OBJ_MEM != 0)
+    &os_mpi_semaphore,
+#else
+    NULL,
+#endif
+#if (OS_MEMPOOL_OBJ_MEM != 0)
+    &os_mpi_mp,
+#else
+    NULL,
+#endif
+#if (OS_MSGQUEUE_OBJ_MEM != 0)
+    &os_mpi_mq,
+#else
+    NULL,
+#endif
+  },
+  (uint32_t)OS_STACK_SIZE,
+  &os_idle_thread_attr,
+#if ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))
+  &os_timer_thread_attr,
+  osRtxTimerThread,
+  osRtxTimerSetup,
+  &os_timer_mq_attr,
+  (uint32_t)OS_TIMER_CB_QUEUE
+#else
+  NULL,
+  NULL,
+  NULL,
+  NULL,
+  0U
+#endif
+};
+
+
+// Non weak reference to library irq module
+//lint -esym(526,irqRtxLib)    "Defined by Exception handlers"
+//lint -esym(714,irqRtxLibRef) "Non weak reference"
+//lint -esym(765,irqRtxLibRef) "Global scope"
+extern const uint8_t         irqRtxLib;
+extern const uint8_t * const irqRtxLibRef;
+       const uint8_t * const irqRtxLibRef = &irqRtxLib;
+
+// Default User SVC Table
+//lint -esym(714,osRtxUserSVC) "Referenced by Exception handlers"
+//lint -esym(765,osRtxUserSVC) "Global scope"
+//lint -e{9067} "extern array declared without size"
+extern void * const osRtxUserSVC[];
+__WEAK void * const osRtxUserSVC[1] = { (void *)0 };
+
+
+// OS Sections
+// ===========
+
+#if  defined(__CC_ARM) || \
+    (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+// Initialized through linker
+//lint -esym(728,  __os_thread_cb_start__,    __os_thread_cb_end__)
+//lint -esym(728,  __os_timer_cb_start__,     __os_timer_cb_end__)
+//lint -esym(728,  __os_evflags_cb_start__,   __os_evflags_cb_end__)
+//lint -esym(728,  __os_mutex_cb_start__,     __os_mutex_cb_end__)
+//lint -esym(728,  __os_semaphore_cb_start__, __os_semaphore_cb_end__)
+//lint -esym(728,  __os_mempool_cb_start__,   __os_mempool_cb_end__)
+//lint -esym(728,  __os_msgqueue_cb_start__,  __os_msgqueue_cb_end__)
+static const uint32_t __os_thread_cb_start__    __attribute__((weakref(".bss.os.thread.cb$$Base")));
+static const uint32_t __os_thread_cb_end__      __attribute__((weakref(".bss.os.thread.cb$$Limit")));
+static const uint32_t __os_timer_cb_start__     __attribute__((weakref(".bss.os.timer.cb$$Base")));
+static const uint32_t __os_timer_cb_end__       __attribute__((weakref(".bss.os.timer.cb$$Limit")));
+static const uint32_t __os_evflags_cb_start__   __attribute__((weakref(".bss.os.evflags.cb$$Base")));
+static const uint32_t __os_evflags_cb_end__     __attribute__((weakref(".bss.os.evflags.cb$$Limit")));
+static const uint32_t __os_mutex_cb_start__     __attribute__((weakref(".bss.os.mutex.cb$$Base")));
+static const uint32_t __os_mutex_cb_end__       __attribute__((weakref(".bss.os.mutex.cb$$Limit")));
+static const uint32_t __os_semaphore_cb_start__ __attribute__((weakref(".bss.os.semaphore.cb$$Base")));
+static const uint32_t __os_semaphore_cb_end__   __attribute__((weakref(".bss.os.semaphore.cb$$Limit")));
+static const uint32_t __os_mempool_cb_start__   __attribute__((weakref(".bss.os.mempool.cb$$Base")));
+static const uint32_t __os_mempool_cb_end__     __attribute__((weakref(".bss.os.mempool.cb$$Limit")));
+static const uint32_t __os_msgqueue_cb_start__  __attribute__((weakref(".bss.os.msgqueue.cb$$Base")));
+static const uint32_t __os_msgqueue_cb_end__    __attribute__((weakref(".bss.os.msgqueue.cb$$Limit")));
+#else
+extern const uint32_t __os_thread_cb_start__    __attribute__((weak));
+extern const uint32_t __os_thread_cb_end__      __attribute__((weak));
+extern const uint32_t __os_timer_cb_start__     __attribute__((weak));
+extern const uint32_t __os_timer_cb_end__       __attribute__((weak));
+extern const uint32_t __os_evflags_cb_start__   __attribute__((weak));
+extern const uint32_t __os_evflags_cb_end__     __attribute__((weak));
+extern const uint32_t __os_mutex_cb_start__     __attribute__((weak));
+extern const uint32_t __os_mutex_cb_end__       __attribute__((weak));
+extern const uint32_t __os_semaphore_cb_start__ __attribute__((weak));
+extern const uint32_t __os_semaphore_cb_end__   __attribute__((weak));
+extern const uint32_t __os_mempool_cb_start__   __attribute__((weak));
+extern const uint32_t __os_mempool_cb_end__     __attribute__((weak));
+extern const uint32_t __os_msgqueue_cb_start__  __attribute__((weak));
+extern const uint32_t __os_msgqueue_cb_end__    __attribute__((weak));
+#endif
+
+//lint -e{9067} "extern array declared without size"
+extern const uint32_t * const os_cb_sections[];
+
+//lint -esym(714,os_cb_sections) "Referenced by debugger"
+//lint -esym(765,os_cb_sections) "Global scope"
+const uint32_t * const os_cb_sections[] \
+__USED \
+__attribute__((section(".rodata"))) =
+{
+  &__os_thread_cb_start__,
+  &__os_thread_cb_end__,
+  &__os_timer_cb_start__,
+  &__os_timer_cb_end__,
+  &__os_evflags_cb_start__,
+  &__os_evflags_cb_end__,
+  &__os_mutex_cb_start__,
+  &__os_mutex_cb_end__,
+  &__os_semaphore_cb_start__,
+  &__os_semaphore_cb_end__,
+  &__os_mempool_cb_start__,
+  &__os_mempool_cb_end__,
+  &__os_msgqueue_cb_start__,
+  &__os_msgqueue_cb_end__
+};
+
+
+// OS Initialization
+// =================
+
+#if  defined(__CC_ARM) || \
+    (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+
+#ifndef __MICROLIB
+//lint -esym(714,_platform_post_stackheap_init) "Referenced by C library"
+//lint -esym(765,_platform_post_stackheap_init) "Global scope"
+extern void _platform_post_stackheap_init (void);
+__WEAK void _platform_post_stackheap_init (void) {
+  (void)osKernelInitialize();
+}
+#endif
+
+#elif defined(__GNUC__)
+
+extern void software_init_hook (void);
+__WEAK void software_init_hook (void) {
+  (void)osKernelInitialize();
+}
+
+#elif defined(__ICCARM__)
+
+extern void $Super$$__iar_data_init3 (void);
+void $Sub$$__iar_data_init3 (void) {
+  $Super$$__iar_data_init3();
+  (void)osKernelInitialize();
+}
+
+#endif
+
+
+// OS Hooks
+// ========
+
+// RTOS Kernel Pre-Initialization Hook
+#if (defined(OS_EVR_INIT) && (OS_EVR_INIT != 0))
+void osRtxKernelPreInit (void);
+void osRtxKernelPreInit (void) {
+  if (osKernelGetState() == osKernelInactive) {
+    evr_initialize();
+  }
+}
+#endif
+
+
+// C/C++ Standard Library Multithreading Interface
+// ===============================================
+
+#if ( !defined(RTX_NO_MULTITHREAD_CLIB) && \
+     ( defined(__CC_ARM) || \
+      (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))) && \
+      !defined(__MICROLIB))
+
+#define LIBSPACE_SIZE 96
+
+//lint -esym(714,__user_perthread_libspace,_mutex_*) "Referenced by C library"
+//lint -esym(765,__user_perthread_libspace,_mutex_*) "Global scope"
+//lint -esym(9003, os_libspace*) "variables 'os_libspace*' defined at module scope"
+
+// Memory for libspace
+static uint32_t os_libspace[OS_THREAD_LIBSPACE_NUM+1][LIBSPACE_SIZE/4] \
+__attribute__((section(".bss.os.libspace")));
+
+// Thread IDs for libspace
+static osThreadId_t os_libspace_id[OS_THREAD_LIBSPACE_NUM] \
+__attribute__((section(".bss.os.libspace")));
+
+// Check if Kernel has been started
+static uint32_t os_kernel_is_active (void) {
+  static uint8_t os_kernel_active = 0U;
+
+  if (os_kernel_active == 0U) {
+    if (osKernelGetState() > osKernelReady) {
+      os_kernel_active = 1U;
+    }
+  }
+  return (uint32_t)os_kernel_active;
+}
+
+// Provide libspace for current thread
+void *__user_perthread_libspace (void);
+void *__user_perthread_libspace (void) {
+  osThreadId_t id;
+  uint32_t     n;
+
+  if (os_kernel_is_active() != 0U) {
+    id = osThreadGetId();
+    for (n = 0U; n < (uint32_t)OS_THREAD_LIBSPACE_NUM; n++) {
+      if (os_libspace_id[n] == NULL) {
+        os_libspace_id[n] = id;
+      }
+      if (os_libspace_id[n] == id) {
+        break;
+      }
+    }
+    if (n == (uint32_t)OS_THREAD_LIBSPACE_NUM) {
+      (void)osRtxKernelErrorNotify(osRtxErrorClibSpace, id);
+    }
+  } else {
+    n = OS_THREAD_LIBSPACE_NUM;
+  }
+
+  //lint -e{9087} "cast between pointers to different object types"
+  return (void *)&os_libspace[n][0];
+}
+
+// Mutex identifier
+typedef void *mutex;
+
+//lint -save "Function prototypes defined in C library"
+//lint -e970 "Use of 'int' outside of a typedef"
+//lint -e818 "Pointer 'm' could be declared as pointing to const"
+
+// Initialize mutex
+__USED
+int _mutex_initialize(mutex *m);
+int _mutex_initialize(mutex *m) {
+  int result;
+
+  *m = osMutexNew(NULL);
+  if (*m != NULL) {
+    result = 1;
+  } else {
+    result = 0;
+    (void)osRtxKernelErrorNotify(osRtxErrorClibMutex, m);
+  }
+  return result;
+}
+
+// Acquire mutex
+__USED
+void _mutex_acquire(mutex *m);
+void _mutex_acquire(mutex *m) {
+  if (os_kernel_is_active() != 0U) {
+    (void)osMutexAcquire(*m, osWaitForever);
+  }
+}
+
+// Release mutex
+__USED
+void _mutex_release(mutex *m);
+void _mutex_release(mutex *m) {
+  if (os_kernel_is_active() != 0U) {
+    (void)osMutexRelease(*m);
+  }
+}
+
+// Free mutex
+__USED
+void _mutex_free(mutex *m);
+void _mutex_free(mutex *m) {
+  (void)osMutexDelete(*m);
+}
+
+//lint -restore
+
+#endif

CMSIS/RTOS2/RTX/Source/rtx_lib.h

@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * -----------------------------------------------------------------------------
+ *
+ * Project:     CMSIS-RTOS RTX
+ * Title:       RTX Library definitions
+ *
+ * -----------------------------------------------------------------------------
+ */
+
+#ifndef RTX_LIB_H_
+#define RTX_LIB_H_
+
+#include <string.h>
+#include "rtx_def.h"                    // RTX Configuration definitions
+#include "rtx_core_c.h"                 // Cortex core definitions
+#if ((defined(__ARM_ARCH_8M_BASE__)   && (__ARM_ARCH_8M_BASE__   != 0)) || \
+     (defined(__ARM_ARCH_8M_MAIN__)   && (__ARM_ARCH_8M_MAIN__   != 0)) || \
+     (defined(__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ != 0)))
+#include "tz_context.h"                 // TrustZone Context API
+#endif
+#include "os_tick.h"                    // CMSIS OS Tick API
+#include "cmsis_os2.h"                  // CMSIS RTOS API
+#include "rtx_os.h"                     // RTX OS definitions
+#include "rtx_evr.h"                    // RTX Event Recorder definitions
+
+
+//  ==== Library defines ====
+
+#define os_thread_t         osRtxThread_t
+#define os_timer_t          osRtxTimer_t
+#define os_timer_finfo_t    osRtxTimerFinfo_t
+#define os_event_flags_t    osRtxEventFlags_t
+#define os_mutex_t          osRtxMutex_t
+#define os_semaphore_t      osRtxSemaphore_t
+#define os_mp_info_t        osRtxMpInfo_t
+#define os_memory_pool_t    osRtxMemoryPool_t
+#define os_message_t        osRtxMessage_t
+#define os_message_queue_t  osRtxMessageQueue_t
+#define os_object_t         osRtxObject_t
+
+//  ==== Inline functions ====
+
+// Thread ID
+__STATIC_INLINE os_thread_t *osRtxThreadId (osThreadId_t thread_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_thread_t *)thread_id);
+}
+// Timer ID
+__STATIC_INLINE os_timer_t *osRtxTimerId (osTimerId_t timer_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_timer_t *)timer_id);
+}
+// Event Flags ID
+__STATIC_INLINE os_event_flags_t *osRtxEventFlagsId (osEventFlagsId_t ef_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_event_flags_t *)ef_id);
+}
+// Mutex ID
+__STATIC_INLINE os_mutex_t *osRtxMutexId (osMutexId_t mutex_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_mutex_t *)mutex_id);
+}
+// Semaphore ID
+__STATIC_INLINE os_semaphore_t *osRtxSemaphoreId (osSemaphoreId_t semaphore_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_semaphore_t *)semaphore_id);
+}
+// Memory Pool ID
+__STATIC_INLINE os_memory_pool_t *osRtxMemoryPoolId (osMemoryPoolId_t mp_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_memory_pool_t *)mp_id);
+}
+// Message Queue ID
+__STATIC_INLINE os_message_queue_t *osRtxMessageQueueId (osMessageQueueId_t mq_id) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 2]
+  return ((os_message_queue_t *)mq_id);
+}
+
+// Generic Object
+__STATIC_INLINE os_object_t *osRtxObject (void *object) {
+  //lint -e{9079} -e{9087} "cast from pointer to void to pointer to object type" [MISRA Note 3]
+  return ((os_object_t *)object);
+}
+
+// Thread Object
+__STATIC_INLINE os_thread_t *osRtxThreadObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_thread_t *)object);
+}
+// Timer Object
+__STATIC_INLINE os_timer_t *osRtxTimerObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_timer_t *)object);
+}
+// Event Flags Object
+__STATIC_INLINE os_event_flags_t *osRtxEventFlagsObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_event_flags_t *)object);
+}
+// Mutex Object
+__STATIC_INLINE os_mutex_t *osRtxMutexObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_mutex_t *)object);
+}
+// Semaphore Object
+__STATIC_INLINE os_semaphore_t *osRtxSemaphoreObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_semaphore_t *)object);
+}
+// Memory Pool Object
+__STATIC_INLINE os_memory_pool_t *osRtxMemoryPoolObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_memory_pool_t *)object);
+}
+// Message Queue Object
+__STATIC_INLINE os_message_queue_t *osRtxMessageQueueObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_message_queue_t *)object);
+}
+// Message Object
+__STATIC_INLINE os_message_t *osRtxMessageObject (os_object_t *object) {
+  //lint -e{740} -e{826} -e{9087} "cast from pointer to generic object to specific object" [MISRA Note 4]
+  return ((os_message_t *)object);
+}
+
+// Kernel State
+__STATIC_INLINE osKernelState_t osRtxKernelState (void) {
+  //lint -e{9030} -e{9034} "cast to enum"
+  return ((osKernelState_t)(osRtxInfo.kernel.state));
+}
+
+// Thread State
+__STATIC_INLINE osThreadState_t osRtxThreadState (const os_thread_t *thread) {
+  uint8_t state = thread->state & osRtxThreadStateMask;
+  //lint -e{9030} -e{9034} "cast to enum"
+  return ((osThreadState_t)state);
+}
+
+// Thread Priority
+__STATIC_INLINE osPriority_t osRtxThreadPriority (const os_thread_t *thread) {
+  //lint -e{9030} -e{9034} "cast to enum"
+  return ((osPriority_t)thread->priority);
+}
+
+// Kernel Get State
+__STATIC_INLINE uint8_t osRtxKernelGetState (void) {
+  return osRtxInfo.kernel.state;
+}
+
+// Thread Get/Set Running
+__STATIC_INLINE os_thread_t *osRtxThreadGetRunning (void) {
+  return osRtxInfo.thread.run.curr;
+}
+__STATIC_INLINE void osRtxThreadSetRunning (os_thread_t *thread) {
+  osRtxInfo.thread.run.curr = thread;
+}
+
+
+//  ==== Library functions ====
+
+// Kernel Library functions
+extern void         osRtxKernelPreInit (void);
+
+// Thread Library functions
+extern void         osRtxThreadListPut    (os_object_t *object, os_thread_t *thread);
+extern os_thread_t *osRtxThreadListGet    (os_object_t *object);
+extern void         osRtxThreadListSort   (os_thread_t *thread);
+extern void         osRtxThreadListRemove (os_thread_t *thread);
+extern void         osRtxThreadReadyPut   (os_thread_t *thread);
+extern void         osRtxThreadDelayTick  (void);
+extern uint32_t    *osRtxThreadRegPtr     (const os_thread_t *thread);
+extern void         osRtxThreadSwitch     (os_thread_t *thread);
+extern void         osRtxThreadDispatch   (os_thread_t *thread);
+extern void         osRtxThreadWaitExit   (os_thread_t *thread, uint32_t ret_val, bool_t dispatch);
+extern bool_t       osRtxThreadWaitEnter  (uint8_t state, uint32_t timeout);
+#ifdef RTX_STACK_CHECK
+extern bool_t       osRtxThreadStackCheck (const os_thread_t *thread);
+#endif
+extern bool_t       osRtxThreadStartup    (void);
+
+// Timer Library functions
+extern int32_t osRtxTimerSetup  (void);
+extern void    osRtxTimerThread (void *argument);
+
+// Mutex Library functions
+extern void osRtxMutexOwnerRelease (os_mutex_t *mutex_list);
+extern void osRtxMutexOwnerRestore (const os_mutex_t *mutex, const os_thread_t *thread_wakeup);
+
+// Memory Heap Library functions
+extern uint32_t osRtxMemoryInit (void *mem, uint32_t size);
+extern void    *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type);
+extern uint32_t osRtxMemoryFree (void *mem, void *block);
+
+// Memory Pool Library functions
+extern uint32_t   osRtxMemoryPoolInit  (os_mp_info_t *mp_info, uint32_t block_count, uint32_t block_size, void *block_mem);
+extern void      *osRtxMemoryPoolAlloc (os_mp_info_t *mp_info);
+extern osStatus_t osRtxMemoryPoolFree  (os_mp_info_t *mp_info, void *block);
+
+// Message Queue Library functions
+extern int32_t osRtxMessageQueueTimerSetup (void);
+
+// System Library functions
+extern void osRtxTick_Handler   (void);
+extern void osRtxPendSV_Handler (void);
+extern void osRtxPostProcess    (os_object_t *object);
+
+
+#endif  // RTX_LIB_H_

COPYING-BSD-3

@@ -24,10 +24,3 @@ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.

SW-Content-Register.txt

@@ -1,6 +1,6 @@
 Release Name: MCUXpresso Software Development Kit (SDK)
-Release Version: 2.13.0
-Package License: LA_OPT_NXP_Software_License.txt v39 August 2022- Additional Distribution License granted, license in Section 2.3 applies
+Release Version: 2.15.000
+Package License: LA_OPT_NXP_Software_License.txt v49 September 2023- Additional Distribution License granted, license in Section 2.3 applies
 
 SDK_Peripheral_Driver      Name: SDK Peripheral Driver                       
                            Version: 2.x.x                                    
@@ -13,18 +13,6 @@ SDK_Peripheral_Driver      Name: SDK Peripheral Driver
                            Location: devices/<device>/drivers                
                            Origin: NXP (BSD-3-Clause)                        
 
-SDK_Examples               Name: SDK examples                                
-                           Version: NA                                       
-                           Outgoing License: BSD-3-Clause                    
-                           License File: COPYING-BSD-3                       
-                           Format: source code, binary, project files, linker
-                           files                                             
-                           Description: SDK out of box examples to show how  
-                           to use peripheral drivers and integrate           
-                           middleware.                                       
-                           Location: boards/<board>/                         
-                           Origin: NXP (BSD-3-Clause)                        
-
 SDK_Device                 Name: SDK SoC files                               
                            Version: NA                                       
                            Outgoing License: BSD-3-Clause                    
@@ -35,7 +23,17 @@ SDK_Device                 Name: SDK SoC files
                            Location: devices/<device>/                       
                            Origin: NXP (BSD-3-Clause)                        
 
-cmsis                      Name: CMSIS                                       
+SDK_Components             Name: SDK components and board peripheral drivers 
+                           Version: NA                                       
+                           Outgoing License: BSD-3-Clause                    
+                           License File: COPYING-BSD-3                       
+                           Format: source code                               
+                           Description: SDK components and board peripheral  
+                           drivers, for example, flash and codec drivers.    
+                           Location: components/                             
+                           Origin: NXP (BSD-3-Clause), ITE (BSD-3-Clause)    
+
+CMSIS                      Name: CMSIS                                       
                            Version: 5.8.0                                    
                            Outgoing License: Apache License 2.0              
                            License File: CMSIS/LICENSE.txt                   
@@ -49,45 +47,25 @@ cmsis                      Name: CMSIS
                            https://github.com/ARM-software/CMSIS_5/releases/t
                            ag/5.8.0                                          
 
-SDK_Components             Name: SDK components and board peripheral drivers 
-                           Version: NA                                       
+osa                        Name: OSA                                         
+                           Version: 1.0.0                                    
                            Outgoing License: BSD-3-Clause                    
                            License File: COPYING-BSD-3                       
                            Format: source code                               
-                           Description: SDK components and board peripheral  
-                           drivers, for example, flash and codec drivers.    
-                           Location: components/                             
-                           Origin: NXP (BSD-3-Clause), ITE (BSD-3-Clause)    
+                           Description: NXP USB stack. This is a version of  
+                           the USB stack that has been integrated with the   
+                           MCUXpresso SDK.                                   
+                           Origin: NXP (BSD-3-Clause)                        
+                           Location: components/osa                          
 
-rtcesl                     Name: rtcesl                                      
-                           Version: 4.7 (CM0,CM4,CM7,CM33) + 4.5 (DSC)       
+SDK_Examples               Name: SDK examples                                
+                           Version: NA                                       
                            Outgoing License: BSD-3-Clause                    
                            License File: COPYING-BSD-3                       
-                           Format: object code & header files                
-                           Description: NXP Real Time Control Embedded       
-                           Software Library.                                 
-                           Location: middleware/rtcesl                       
+                           Format: source code, binary, project files, linker
+                           files                                             
+                           Description: SDK out of box examples to show how  
+                           to use peripheral drivers and integrate           
+                           middleware.                                       
+                           Location: boards/<board>/                         
                            Origin: NXP (BSD-3-Clause)                        
-
-safety_iec60730b           Name: safety iec60730b                            
-                           Version: 4.2                                      
-                           Outgoing License: LA_OPT_NXP_Software_License.txt 
-                           v39 August 2022 - Additional distribution license 
-                           granted - License in Section 2.3 applies          
-                           License File: LA_OPT_NXP_Software_License.txt     
-                           Format: source code & object code & header files  
-                           Description: Safety IEC60730b Example             
-                           Location: middleware/safety_iec60730b             
-                           Origin: NXP                                       
-
-srecord                    Name: SRecord 1.64 For Windows                    
-                           Version: 1.64                                     
-                           Outgoing License: GPL-3.0                         
-                           License File:                                     
-                           tool/srecord/srecord-1.64.zip/srecord-1.64/LICENSE
-                           Format: source code & binary                      
-                           Description: Utility for manipulating EPROM load  
-                           files, is used for postbuild CRC calculation.     
-                           Location: tools/srecord                           
-                           Origin: Peter Miller                              
-                           Url: http://srecord.sourceforge.net/index.html    

boards/lpcxpresso804/demo_apps/hello_world/armgcc/CMakeLists.txt

@@ -3,8 +3,16 @@ SET(CMAKE_SYSTEM_NAME Generic)
 CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
 
 # THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
+SET (MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
+SET (MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
+
+include(ide_overrides.cmake OPTIONAL)
+
+if(CMAKE_SCRIPT_MODE_FILE)
+  message("${MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION}")
+  return()
+endif()
+
 
 # ENABLE ASM
 ENABLE_LANGUAGE(ASM)
@@ -34,6 +42,8 @@ endif()
 
 include(${ProjDirPath}/flags.cmake)
 
+include(${ProjDirPath}/config.cmake)
+
 add_executable(${MCUX_SDK_PROJECT_NAME} 
 "${ProjDirPath}/../hello_world.c"
 "${ProjDirPath}/../pin_mux.c"
@@ -44,60 +54,12 @@ add_executable(${MCUX_SDK_PROJECT_NAME}
 "${ProjDirPath}/../clock_config.h"
 )
 
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
     ${ProjDirPath}/..
 )
 
-set(CMAKE_MODULE_PATH
-    ${SdkRootDirPath}/devices/LPC804/drivers
-    ${SdkRootDirPath}/devices/LPC804
-    ${SdkRootDirPath}/components/uart
-    ${SdkRootDirPath}/devices/LPC804/utilities/debug_console_lite
-    ${SdkRootDirPath}/devices/LPC804/utilities
-    ${SdkRootDirPath}/CMSIS/Core/Include
-)
-
-# include modules
-include(driver_common_LPC804)
-
-include(driver_clock_LPC804)
-
-include(driver_power_no_lib_LPC804)
-
-include(driver_reset_LPC804)
-
-include(device_LPC804_CMSIS_LPC804)
-
-include(component_miniusart_adapter_LPC804)
-
-include(device_LPC804_startup_LPC804)
-
-include(driver_lpc_miniusart_LPC804)
-
-include(utility_assert_lite_LPC804)
-
-include(utility_debug_console_lite_LPC804)
-
-include(driver_lpc_iocon_lite_LPC804)
-
-include(driver_swm_LPC804)
-
-include(driver_lpc_gpio_LPC804)
-
-include(driver_syscon_LPC804)
-
-include(driver_rom_api_LPC804)
-
-include(CMSIS_Include_core_cm_LPC804)
-
-include(utilities_misc_utilities_LPC804)
-
-include(device_LPC804_system_LPC804)
-
-include(driver_swm_connections_LPC804)
-
-include(driver_syscon_connections_LPC804)
 
+include(${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake)
 
 IF(NOT DEFINED TARGET_LINK_SYSTEM_LIBRARIES)  
     SET(TARGET_LINK_SYSTEM_LIBRARIES "-lm -lc -lgcc -lnosys")  
@@ -109,4 +71,5 @@ target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${TARGET_LINK_SYSTEM_LIBR
 
 TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
 
+set_target_properties(${MCUX_SDK_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES "output.map")
 

boards/lpcxpresso804/demo_apps/hello_world/armgcc/config.cmake

@@ -0,0 +1,34 @@
+# config to select component, the format is CONFIG_USE_${component}
+# Please refer to cmake files below to get available components:
+#  ${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake
+
+set(CONFIG_COMPILER gcc)
+set(CONFIG_TOOLCHAIN armgcc)
+set(CONFIG_USE_COMPONENT_CONFIGURATION false)
+set(CONFIG_USE_driver_common true)
+set(CONFIG_USE_driver_clock true)
+set(CONFIG_USE_driver_power_no_lib true)
+set(CONFIG_USE_driver_reset true)
+set(CONFIG_USE_device_LPC804_CMSIS true)
+set(CONFIG_USE_component_miniusart_adapter true)
+set(CONFIG_USE_device_LPC804_startup true)
+set(CONFIG_USE_driver_lpc_miniusart true)
+set(CONFIG_USE_utility_assert_lite true)
+set(CONFIG_USE_utility_debug_console_lite true)
+set(CONFIG_USE_driver_lpc_iocon_lite true)
+set(CONFIG_USE_driver_swm true)
+set(CONFIG_USE_driver_lpc_gpio true)
+set(CONFIG_USE_driver_syscon true)
+set(CONFIG_USE_driver_rom_api true)
+set(CONFIG_USE_utilities_misc_utilities true)
+set(CONFIG_USE_CMSIS_Include_core_cm true)
+set(CONFIG_USE_device_LPC804_system true)
+set(CONFIG_USE_driver_swm_connections true)
+set(CONFIG_USE_driver_syscon_connections true)
+set(CONFIG_CORE cm0p)
+set(CONFIG_DEVICE LPC804)
+set(CONFIG_BOARD lpcxpresso804)
+set(CONFIG_KIT lpcxpresso804)
+set(CONFIG_DEVICE_ID LPC804)
+set(CONFIG_FPU NO_FPU)
+set(CONFIG_DSP NO_DSP)

boards/lpcxpresso804/demo_apps/hello_world/armgcc/flags.cmake

@@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")
 SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")

boards/lpcxpresso804/demo_apps/hello_world/hello_world_v3_14.xml

@@ -16,8 +16,8 @@
     <definition extID="platform.drivers.lpc_gpio.LPC804"/>
     <definition extID="platform.drivers.syscon.LPC804"/>
     <definition extID="platform.drivers.rom_api.LPC804"/>
-    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="platform.utilities.misc_utilities.LPC804"/>
+    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="device.LPC804_system.LPC804"/>
     <definition extID="platform.drivers.swm_connections.LPC804"/>
     <definition extID="platform.drivers.syscon_connections.LPC804"/>
@@ -27,7 +27,7 @@
     <definition extID="mcuxpresso"/>
     <definition extID="com.nxp.mcuxpresso"/>
   </externalDefinitions>
-  <example id="lpcxpresso804_hello_world" name="hello_world" dependency="platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.utilities.assert_lite.LPC804 utility.debug_console_lite.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 CMSIS_Include_core_cm.LPC804 platform.utilities.misc_utilities.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
+  <example id="lpcxpresso804_hello_world" name="hello_world" dependency="platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.utilities.assert_lite.LPC804 utility.debug_console_lite.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 platform.utilities.misc_utilities.LPC804 CMSIS_Include_core_cm.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
     <projects>
       <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
     </projects>
@@ -62,6 +62,9 @@
         <option id="gnu.c.link.option.nostdlibs" type="boolean">
           <value>true</value>
         </option>
+        <option id="gnu.c.link.option.other" type="stringList">
+          <value>-no-warn-rwx-segments</value>
+        </option>
         <option id="com.crt.advproject.link.fpu" type="enum">
           <value>com.crt.advproject.link.fpu.none</value>
         </option>
@@ -89,11 +92,15 @@
       <files mask="clean.sh"/>
       <files mask="CMakeLists.txt"/>
       <files mask="flags.cmake"/>
+      <files mask="config.cmake"/>
       <files mask="build_debug.bat"/>
       <files mask="build_debug.sh"/>
       <files mask="build_release.bat"/>
       <files mask="build_release.sh"/>
     </source>
+    <source path="../../../../devices/LPC804" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="all_lib_device.cmake"/>
+    </source>
     <source path="." project_relative_path="source" type="src">
       <files mask="hello_world.c"/>
     </source>
@@ -104,7 +111,7 @@
       <files mask="pin_mux.h"/>
     </source>
     <source path="." project_relative_path="." type="other">
-      <files mask="hello_world.mex" hidden="true"/>
+      <files mask="hello_world.mex"/>
     </source>
     <source path="." project_relative_path="lpcxpresso804/demo_apps/hello_world" type="binary">
       <files mask="hello_world.bin" hidden="true"/>

boards/lpcxpresso804/demo_apps/led_blinky/armgcc/CMakeLists.txt

@@ -3,8 +3,16 @@ SET(CMAKE_SYSTEM_NAME Generic)
 CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
 
 # THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
+SET (MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
+SET (MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
+
+include(ide_overrides.cmake OPTIONAL)
+
+if(CMAKE_SCRIPT_MODE_FILE)
+  message("${MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION}")
+  return()
+endif()
+
 
 # ENABLE ASM
 ENABLE_LANGUAGE(ASM)
@@ -34,6 +42,8 @@ endif()
 
 include(${ProjDirPath}/flags.cmake)
 
+include(${ProjDirPath}/config.cmake)
+
 add_executable(${MCUX_SDK_PROJECT_NAME} 
 "${ProjDirPath}/../led_blinky.c"
 "${ProjDirPath}/../pin_mux.c"
@@ -44,60 +54,12 @@ add_executable(${MCUX_SDK_PROJECT_NAME}
 "${ProjDirPath}/../clock_config.h"
 )
 
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
     ${ProjDirPath}/..
 )
 
-set(CMAKE_MODULE_PATH
-    ${SdkRootDirPath}/devices/LPC804/utilities
-    ${SdkRootDirPath}/devices/LPC804/utilities/debug_console_lite
-    ${SdkRootDirPath}/devices/LPC804/drivers
-    ${SdkRootDirPath}/devices/LPC804
-    ${SdkRootDirPath}/components/uart
-    ${SdkRootDirPath}/CMSIS/Core/Include
-)
-
-# include modules
-include(utility_debug_console_lite_LPC804)
-
-include(utility_assert_lite_LPC804)
-
-include(driver_lpc_gpio_LPC804)
-
-include(driver_common_LPC804)
-
-include(driver_clock_LPC804)
-
-include(driver_power_no_lib_LPC804)
-
-include(driver_reset_LPC804)
-
-include(device_LPC804_CMSIS_LPC804)
-
-include(component_miniusart_adapter_LPC804)
-
-include(device_LPC804_startup_LPC804)
-
-include(driver_lpc_miniusart_LPC804)
-
-include(driver_lpc_iocon_lite_LPC804)
-
-include(driver_swm_LPC804)
-
-include(driver_syscon_LPC804)
-
-include(driver_rom_api_LPC804)
-
-include(CMSIS_Include_core_cm_LPC804)
-
-include(utilities_misc_utilities_LPC804)
-
-include(device_LPC804_system_LPC804)
-
-include(driver_swm_connections_LPC804)
-
-include(driver_syscon_connections_LPC804)
 
+include(${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake)
 
 IF(NOT DEFINED TARGET_LINK_SYSTEM_LIBRARIES)  
     SET(TARGET_LINK_SYSTEM_LIBRARIES "-lm -lc -lgcc -lnosys")  
@@ -109,4 +71,5 @@ target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${TARGET_LINK_SYSTEM_LIBR
 
 TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
 
+set_target_properties(${MCUX_SDK_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES "output.map")
 

boards/lpcxpresso804/demo_apps/led_blinky/armgcc/config.cmake

@@ -0,0 +1,34 @@
+# config to select component, the format is CONFIG_USE_${component}
+# Please refer to cmake files below to get available components:
+#  ${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake
+
+set(CONFIG_COMPILER gcc)
+set(CONFIG_TOOLCHAIN armgcc)
+set(CONFIG_USE_COMPONENT_CONFIGURATION false)
+set(CONFIG_USE_utility_debug_console_lite true)
+set(CONFIG_USE_utility_assert_lite true)
+set(CONFIG_USE_driver_lpc_gpio true)
+set(CONFIG_USE_driver_common true)
+set(CONFIG_USE_driver_clock true)
+set(CONFIG_USE_driver_power_no_lib true)
+set(CONFIG_USE_driver_reset true)
+set(CONFIG_USE_device_LPC804_CMSIS true)
+set(CONFIG_USE_component_miniusart_adapter true)
+set(CONFIG_USE_device_LPC804_startup true)
+set(CONFIG_USE_driver_lpc_miniusart true)
+set(CONFIG_USE_driver_lpc_iocon_lite true)
+set(CONFIG_USE_driver_swm true)
+set(CONFIG_USE_driver_syscon true)
+set(CONFIG_USE_driver_rom_api true)
+set(CONFIG_USE_utilities_misc_utilities true)
+set(CONFIG_USE_CMSIS_Include_core_cm true)
+set(CONFIG_USE_device_LPC804_system true)
+set(CONFIG_USE_driver_swm_connections true)
+set(CONFIG_USE_driver_syscon_connections true)
+set(CONFIG_CORE cm0p)
+set(CONFIG_DEVICE LPC804)
+set(CONFIG_BOARD lpcxpresso804)
+set(CONFIG_KIT lpcxpresso804)
+set(CONFIG_DEVICE_ID LPC804)
+set(CONFIG_FPU NO_FPU)
+set(CONFIG_DSP NO_DSP)

boards/lpcxpresso804/demo_apps/led_blinky/armgcc/flags.cmake

@@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")
 SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")

boards/lpcxpresso804/demo_apps/led_blinky/led_blinky_v3_14.xml

@@ -16,8 +16,8 @@
     <definition extID="platform.drivers.swm.LPC804"/>
     <definition extID="platform.drivers.syscon.LPC804"/>
     <definition extID="platform.drivers.rom_api.LPC804"/>
-    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="platform.utilities.misc_utilities.LPC804"/>
+    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="device.LPC804_system.LPC804"/>
     <definition extID="platform.drivers.swm_connections.LPC804"/>
     <definition extID="platform.drivers.syscon_connections.LPC804"/>
@@ -27,7 +27,7 @@
     <definition extID="mcuxpresso"/>
     <definition extID="com.nxp.mcuxpresso"/>
   </externalDefinitions>
-  <example id="lpcxpresso804_led_blinky" name="led_blinky" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 CMSIS_Include_core_cm.LPC804 platform.utilities.misc_utilities.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
+  <example id="lpcxpresso804_led_blinky" name="led_blinky" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 platform.utilities.misc_utilities.LPC804 CMSIS_Include_core_cm.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
     <projects>
       <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
     </projects>
@@ -62,6 +62,9 @@
         <option id="gnu.c.link.option.nostdlibs" type="boolean">
           <value>true</value>
         </option>
+        <option id="gnu.c.link.option.other" type="stringList">
+          <value>-no-warn-rwx-segments</value>
+        </option>
         <option id="com.crt.advproject.link.fpu" type="enum">
           <value>com.crt.advproject.link.fpu.none</value>
         </option>
@@ -89,11 +92,15 @@
       <files mask="clean.sh"/>
       <files mask="CMakeLists.txt"/>
       <files mask="flags.cmake"/>
+      <files mask="config.cmake"/>
       <files mask="build_debug.bat"/>
       <files mask="build_debug.sh"/>
       <files mask="build_release.bat"/>
       <files mask="build_release.sh"/>
     </source>
+    <source path="../../../../devices/LPC804" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="all_lib_device.cmake"/>
+    </source>
     <source path="." project_relative_path="source" type="src">
       <files mask="led_blinky.c"/>
     </source>
@@ -104,7 +111,7 @@
       <files mask="pin_mux.h"/>
     </source>
     <source path="." project_relative_path="." type="other">
-      <files mask="led_blinky.mex" hidden="true"/>
+      <files mask="led_blinky.mex"/>
     </source>
     <source path="." project_relative_path="lpcxpresso804/demo_apps/led_blinky" type="binary">
       <files mask="led_blinky.bin" hidden="true"/>

boards/lpcxpresso804/demo_apps/new_project/armgcc/CMakeLists.txt

@@ -0,0 +1,78 @@
+# CROSS COMPILER SETTING
+SET(CMAKE_SYSTEM_NAME Generic)
+CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
+
+# THE VERSION NUMBER
+SET (MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
+SET (MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
+
+include(ide_overrides.cmake OPTIONAL)
+
+if(CMAKE_SCRIPT_MODE_FILE)
+  message("${MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION}")
+  return()
+endif()
+
+
+# ENABLE ASM
+ENABLE_LANGUAGE(ASM)
+
+SET(CMAKE_STATIC_LIBRARY_PREFIX)
+SET(CMAKE_STATIC_LIBRARY_SUFFIX)
+
+SET(CMAKE_EXECUTABLE_LIBRARY_PREFIX)
+SET(CMAKE_EXECUTABLE_LIBRARY_SUFFIX)
+
+# CURRENT DIRECTORY
+SET(ProjDirPath ${CMAKE_CURRENT_SOURCE_DIR})
+
+SET(EXECUTABLE_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+SET(LIBRARY_OUTPUT_PATH ${ProjDirPath}/${CMAKE_BUILD_TYPE})
+
+
+project(new_project)
+
+set(MCUX_BUILD_TYPES debug release)
+
+set(MCUX_SDK_PROJECT_NAME new_project.elf)
+
+if (NOT DEFINED SdkRootDirPath)
+    SET(SdkRootDirPath ${ProjDirPath}/../../../../..)
+endif()
+
+include(${ProjDirPath}/flags.cmake)
+
+include(${ProjDirPath}/config.cmake)
+
+add_executable(${MCUX_SDK_PROJECT_NAME} 
+"${ProjDirPath}/../main.c"
+"${ProjDirPath}/../peripherals.c"
+"${ProjDirPath}/../peripherals.h"
+"${ProjDirPath}/../pin_mux.c"
+"${ProjDirPath}/../pin_mux.h"
+"${ProjDirPath}/../board.c"
+"${ProjDirPath}/../board.h"
+"${ProjDirPath}/../clock_config.c"
+"${ProjDirPath}/../clock_config.h"
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
+    ${ProjDirPath}/..
+    ${SdkRootDirPath}/boards/lpcxpresso804/project_template
+)
+
+
+include(${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake)
+
+IF(NOT DEFINED TARGET_LINK_SYSTEM_LIBRARIES)  
+    SET(TARGET_LINK_SYSTEM_LIBRARIES "-lm -lc -lgcc -lnosys")  
+ENDIF()  
+
+TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--start-group)
+
+target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${TARGET_LINK_SYSTEM_LIBRARIES})
+
+TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
+
+set_target_properties(${MCUX_SDK_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES "output.map")
+

boards/lpcxpresso804/demo_apps/new_project/armgcc/LPC804_flash.ld

@@ -0,0 +1,211 @@
+/*
+** ###################################################################
+**     Processors:          LPC804M101JDH20
+**                          LPC804M101JDH24
+**                          LPC804M101JHI33
+**                          LPC804M111JDH24
+**                          LPC804UK
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    LPC804 User manual Rev.1.0  24 Jan 2018
+**     Version:             rev. 1.0, 2018-01-09
+**     Build:               b200408
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2020 NXP
+**     All rights reserved.
+**
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x040;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x040;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
+  m_crp                 (RX)  : ORIGIN = 0x000002FC, LENGTH = 0x00000004
+  m_text                (RX)  : ORIGIN = 0x00000300, LENGTH = 0x00007C00
+  m_data                (RW)  : ORIGIN = 0x10000000, LENGTH = 0x00000FE0
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into internal flash */
+  .interrupts :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  .crp :
+  {
+    . = ALIGN(4);
+    KEEP(*(.crp))    /* Code Read Protection level (CRP) */
+    . = ALIGN(4);
+  } > m_crp
+
+  /* The program code and other data goes into internal flash */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    __CTOR_LIST__ = .;
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __CTOR_END__ = .;
+  } > m_text
+
+  .dtors :
+  {
+    __DTOR_LIST__ = .;
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    __DTOR_END__ = .;
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(.ramfunc*)             /* for functions in ram */
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_data
+
+  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_data
+
+  .heap :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    __HeapBase = .;
+    . += HEAP_SIZE;
+    __HeapLimit = .;
+    __heap_limit = .; /* Add for _sbrk */
+  } > m_data
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += STACK_SIZE;
+  } > m_data
+
+  /* Initializes stack on the end of block */
+  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
+  __StackLimit = __StackTop - STACK_SIZE;
+  PROVIDE(__stack = __StackTop);
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
+}
+

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_all.bat

@@ -0,0 +1,15 @@
+if exist CMakeFiles (RD /s /Q CMakeFiles)
+if exist Makefile (DEL /s /Q /F Makefile)
+if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
+if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+mingw32-make -j
+
+if exist CMakeFiles (RD /s /Q CMakeFiles)
+if exist Makefile (DEL /s /Q /F Makefile)
+if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
+if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
+mingw32-make -j
+
+IF "%1" == "" ( pause )

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_all.sh

@@ -0,0 +1,15 @@
+#!/bin/sh
+if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
+if [ -f "Makefile" ];then rm -f Makefile; fi
+if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
+if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+make -j
+
+if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
+if [ -f "Makefile" ];then rm -f Makefile; fi
+if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
+if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
+make -j
+

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_debug.bat

@@ -0,0 +1,6 @@
+if exist CMakeFiles (RD /s /Q CMakeFiles)
+if exist Makefile (DEL /s /Q /F Makefile)
+if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
+if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+mingw32-make -j 2> build_log.txt 

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_debug.sh

@@ -0,0 +1,7 @@
+#!/bin/sh
+if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
+if [ -f "Makefile" ];then rm -f Makefile; fi
+if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
+if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=debug  .
+make -j 2>&1 | tee build_log.txt

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_release.bat

@@ -0,0 +1,6 @@
+if exist CMakeFiles (RD /s /Q CMakeFiles)
+if exist Makefile (DEL /s /Q /F Makefile)
+if exist cmake_install.cmake (DEL /s /Q /F cmake_install.cmake)
+if exist CMakeCache.txt (DEL /s /Q /F CMakeCache.txt)
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "MinGW Makefiles" -DCMAKE_BUILD_TYPE=release  .
+mingw32-make -j 2> build_log.txt 

boards/lpcxpresso804/demo_apps/new_project/armgcc/build_release.sh

@@ -0,0 +1,7 @@
+#!/bin/sh
+if [ -d "CMakeFiles" ];then rm -rf CMakeFiles; fi
+if [ -f "Makefile" ];then rm -f Makefile; fi
+if [ -f "cmake_install.cmake" ];then rm -f cmake_install.cmake; fi
+if [ -f "CMakeCache.txt" ];then rm -f CMakeCache.txt; fi
+cmake -DCMAKE_TOOLCHAIN_FILE="../../../../../tools/cmake_toolchain_files/armgcc.cmake" -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=release  .
+make -j 2>&1 | tee build_log.txt

boards/lpcxpresso804/demo_apps/new_project/armgcc/clean.bat

@@ -0,0 +1,3 @@
+RD /s /Q debug release CMakeFiles
+DEL /s /Q /F Makefile cmake_install.cmake CMakeCache.txt
+pause

boards/lpcxpresso804/demo_apps/new_project/armgcc/clean.sh

@@ -0,0 +1,3 @@
+#!/bin/sh
+rm -rf debug release CMakeFiles
+rm -rf Makefile cmake_install.cmake CMakeCache.txt

boards/lpcxpresso804/demo_apps/new_project/armgcc/config.cmake

@@ -0,0 +1,34 @@
+# config to select component, the format is CONFIG_USE_${component}
+# Please refer to cmake files below to get available components:
+#  ${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake
+
+set(CONFIG_COMPILER gcc)
+set(CONFIG_TOOLCHAIN armgcc)
+set(CONFIG_USE_COMPONENT_CONFIGURATION false)
+set(CONFIG_USE_utility_debug_console_lite true)
+set(CONFIG_USE_utility_assert_lite true)
+set(CONFIG_USE_driver_common true)
+set(CONFIG_USE_driver_clock true)
+set(CONFIG_USE_driver_power_no_lib true)
+set(CONFIG_USE_driver_reset true)
+set(CONFIG_USE_device_LPC804_CMSIS true)
+set(CONFIG_USE_component_miniusart_adapter true)
+set(CONFIG_USE_device_LPC804_startup true)
+set(CONFIG_USE_driver_lpc_miniusart true)
+set(CONFIG_USE_driver_lpc_iocon_lite true)
+set(CONFIG_USE_driver_swm true)
+set(CONFIG_USE_driver_lpc_gpio true)
+set(CONFIG_USE_driver_syscon true)
+set(CONFIG_USE_driver_rom_api true)
+set(CONFIG_USE_utilities_misc_utilities true)
+set(CONFIG_USE_CMSIS_Include_core_cm true)
+set(CONFIG_USE_device_LPC804_system true)
+set(CONFIG_USE_driver_swm_connections true)
+set(CONFIG_USE_driver_syscon_connections true)
+set(CONFIG_CORE cm0p)
+set(CONFIG_DEVICE LPC804)
+set(CONFIG_BOARD lpcxpresso804)
+set(CONFIG_KIT lpcxpresso804)
+set(CONFIG_DEVICE_ID LPC804)
+set(CONFIG_FPU NO_FPU)
+set(CONFIG_DSP NO_DSP)

boards/lpcxpresso804/demo_apps/new_project/armgcc/flags.cmake

@@ -0,0 +1,169 @@
+IF(NOT DEFINED FPU)  
+    SET(FPU "-mfloat-abi=soft")  
+ENDIF()  
+
+IF(NOT DEFINED SPECS)  
+    SET(SPECS "--specs=nano.specs --specs=nosys.specs")  
+ENDIF()  
+
+IF(NOT DEFINED DEBUG_CONSOLE_CONFIG)  
+    SET(DEBUG_CONSOLE_CONFIG "-DSDK_DEBUGCONSOLE=1")  
+ENDIF()  
+
+SET(CMAKE_ASM_FLAGS_DEBUG " \
+    ${CMAKE_ASM_FLAGS_DEBUG} \
+    -DDEBUG \
+    -D__STARTUP_CLEAR_BSS \
+    -mcpu=cortex-m0plus \
+    -mthumb \
+    ${FPU} \
+")
+SET(CMAKE_ASM_FLAGS_RELEASE " \
+    ${CMAKE_ASM_FLAGS_RELEASE} \
+    -DNDEBUG \
+    -D__STARTUP_CLEAR_BSS \
+    -mcpu=cortex-m0plus \
+    -mthumb \
+    ${FPU} \
+")
+SET(CMAKE_C_FLAGS_DEBUG " \
+    ${CMAKE_C_FLAGS_DEBUG} \
+    -DDEBUG \
+    -DCPU_LPC804 \
+    -DCPU_LPC804M101JDH24 \
+    -DMCUXPRESSO_SDK \
+    -g \
+    -O0 \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -mthumb \
+    -MMD \
+    -MP \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mapcs \
+    -std=gnu99 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+")
+SET(CMAKE_C_FLAGS_RELEASE " \
+    ${CMAKE_C_FLAGS_RELEASE} \
+    -DNDEBUG \
+    -DCPU_LPC804 \
+    -DCPU_LPC804M101JDH24 \
+    -DMCUXPRESSO_SDK \
+    -Os \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -mthumb \
+    -MMD \
+    -MP \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mapcs \
+    -std=gnu99 \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+")
+SET(CMAKE_CXX_FLAGS_DEBUG " \
+    ${CMAKE_CXX_FLAGS_DEBUG} \
+    -DDEBUG \
+    -DMCUXPRESSO_SDK \
+    -g \
+    -O0 \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -mthumb \
+    -MMD \
+    -MP \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mapcs \
+    -fno-rtti \
+    -fno-exceptions \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+")
+SET(CMAKE_CXX_FLAGS_RELEASE " \
+    ${CMAKE_CXX_FLAGS_RELEASE} \
+    -DNDEBUG \
+    -DMCUXPRESSO_SDK \
+    -Os \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -mthumb \
+    -MMD \
+    -MP \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mapcs \
+    -fno-rtti \
+    -fno-exceptions \
+    ${FPU} \
+    ${DEBUG_CONSOLE_CONFIG} \
+")
+SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
+    ${CMAKE_EXE_LINKER_FLAGS_DEBUG} \
+    -g \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -Xlinker \
+    --gc-sections \
+    -Xlinker \
+    -static \
+    -Xlinker \
+    -z \
+    -Xlinker \
+    muldefs \
+    -Xlinker \
+    -Map=output.map \
+    -Wl,--print-memory-usage \
+    ${FPU} \
+    ${SPECS} \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
+")
+SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
+    ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
+    -mcpu=cortex-m0plus \
+    -Wall \
+    -fno-common \
+    -ffunction-sections \
+    -fdata-sections \
+    -ffreestanding \
+    -fno-builtin \
+    -mthumb \
+    -mapcs \
+    -Xlinker \
+    --gc-sections \
+    -Xlinker \
+    -static \
+    -Xlinker \
+    -z \
+    -Xlinker \
+    muldefs \
+    -Xlinker \
+    -Map=output.map \
+    -Wl,--print-memory-usage \
+    ${FPU} \
+    ${SPECS} \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
+")

boards/lpcxpresso804/demo_apps/new_project/main.c

@@ -0,0 +1,46 @@
+
+/*
+ * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_device_registers.h"
+
+
+#include "pin_mux.h"
+#include "clock_config.h"
+#include "peripherals.h"
+#include "board.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_LED_PORT BOARD_LED_RED_PORT
+#define BOARD_LED_PIN  BOARD_LED_RED_PIN
+
+/*******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+/*!
+ * @brief Main function
+ */
+
+int main(void)
+{
+
+    /* Init board hardware. */
+    BOARD_InitBootPins();
+    BOARD_InitBootClocks();
+
+    /* Add user custom codes below */
+    while (1)
+    {
+    }
+}

boards/lpcxpresso804/demo_apps/new_project/new_project.mex

@@ -0,0 +1,166 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="LPC804" version="1.6" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6.xsd" uuid="9741d2bf-9ef6-4387-b582-0a61861b5bb4" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.6" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>LPC804</processor>
+      <package>LPC804M101JDH24</package>
+      <board>LPCXpresso804</board>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M0P" id="core0" description="M0P core"/>
+      </cores>
+      <description>Configuration imported from C:\Users\mcu-sdk-2.0\boards\lpcxpresso804\demo_apps\led_blinky\iar</description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="6.0" enabled="true" update_project_code="true">
+         <pins_profile>
+            <processor_version>6.0.1</processor_version>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <prefix>BOARD_</prefix>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins.BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 13" pin_num="4" pin_signal="PIO0_13/ADC_10">
+                     <pin_features>
+                        <pin_feature name="identifier" value="LED_RED"/>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="6.0" enabled="true" update_project_code="true">
+         <clocks_profile>
+            <processor_version>6.0.1</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO18M">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO18M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.fro_osc.outFreq" value="18 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FROHF_clock.outFreq" value="18 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="9 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO24M">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.fro_osc.outFreq" value="24 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FROHF_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO30M">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power_no_lib" description="Clocks initialization requires the POWER_NO_LIB Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO30M">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="FROHF_clock.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="15 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <dcdx_profile>
+            <processor_version>N/A</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="6.0" enabled="false" update_project_code="true">
+         <peripherals_profile>
+            <processor_version>N/A</processor_version>
+         </peripherals_profile>
+         <functional_groups/>
+         <components/>
+      </periphs>
+      <tee name="TEE" version="1.0" enabled="false" update_project_code="true">
+         <tee_profile>
+            <processor_version>N/A</processor_version>
+         </tee_profile>
+         <global_options/>
+         <user_memory_regions/>
+      </tee>
+   </tools>
+</configuration>

boards/lpcxpresso804/demo_apps/new_project/new_project_v3_14.xml

@@ -0,0 +1,139 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ksdk:examples xmlns:ksdk="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://nxp.com/ksdk/2.0/ksdk_manifest_v3.0.xsd manifest.xsd">
+  <externalDefinitions>
+    <definition extID="utility.debug_console_lite.LPC804"/>
+    <definition extID="platform.utilities.assert_lite.LPC804"/>
+    <definition extID="platform.drivers.common.LPC804"/>
+    <definition extID="platform.drivers.clock.LPC804"/>
+    <definition extID="platform.drivers.power_no_lib.LPC804"/>
+    <definition extID="platform.drivers.reset.LPC804"/>
+    <definition extID="device.LPC804_CMSIS.LPC804"/>
+    <definition extID="component.miniusart_adapter.LPC804"/>
+    <definition extID="device.LPC804_startup.LPC804"/>
+    <definition extID="platform.drivers.lpc_miniusart.LPC804"/>
+    <definition extID="platform.drivers.lpc_iocon_lite.LPC804"/>
+    <definition extID="platform.drivers.swm.LPC804"/>
+    <definition extID="platform.drivers.lpc_gpio.LPC804"/>
+    <definition extID="platform.drivers.syscon.LPC804"/>
+    <definition extID="platform.drivers.rom_api.LPC804"/>
+    <definition extID="platform.utilities.misc_utilities.LPC804"/>
+    <definition extID="CMSIS_Include_core_cm.LPC804"/>
+    <definition extID="device.LPC804_system.LPC804"/>
+    <definition extID="platform.drivers.swm_connections.LPC804"/>
+    <definition extID="platform.drivers.syscon_connections.LPC804"/>
+    <definition extID="iar"/>
+    <definition extID="mdk"/>
+    <definition extID="armgcc"/>
+    <definition extID="mcuxpresso"/>
+    <definition extID="com.nxp.mcuxpresso"/>
+  </externalDefinitions>
+  <example id="lpcxpresso804_new_project" name="new_project" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 platform.utilities.misc_utilities.LPC804 CMSIS_Include_core_cm.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
+    <projects>
+      <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
+    </projects>
+    <toolchainSettings>
+      <toolchainSetting id_refs="com.nxp.mcuxpresso">
+        <option id="gnu.c.compiler.option.preprocessor.def.symbols" type="stringList">
+          <value>CPU_LPC804</value>
+          <value>CPU_LPC804M101JDH24</value>
+          <value>MCUXPRESSO_SDK</value>
+        </option>
+        <option id="com.crt.advproject.gas.fpu" type="enum">
+          <value>com.crt.advproject.gas.fpu.none</value>
+        </option>
+        <option id="gnu.c.compiler.option.optimization.flags" type="string">
+          <value>-fno-common</value>
+        </option>
+        <option id="com.crt.advproject.c.misc.dialect" type="enum">
+          <value>com.crt.advproject.misc.dialect.gnu99</value>
+        </option>
+        <option id="com.crt.advproject.gcc.fpu" type="enum">
+          <value>com.crt.advproject.gcc.fpu.none</value>
+        </option>
+        <option id="gnu.c.compiler.option.misc.other" type="string">
+          <value>-c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin</value>
+        </option>
+        <option id="gnu.c.compiler.option.warnings.allwarn" type="boolean">
+          <value>false</value>
+        </option>
+        <option id="gnu.c.compiler.option.warnings.toerrors" type="boolean">
+          <value>false</value>
+        </option>
+        <option id="gnu.c.link.option.nostdlibs" type="boolean">
+          <value>true</value>
+        </option>
+        <option id="gnu.c.link.option.other" type="stringList">
+          <value>-no-warn-rwx-segments</value>
+        </option>
+        <option id="com.crt.advproject.link.fpu" type="enum">
+          <value>com.crt.advproject.link.fpu.none</value>
+        </option>
+      </toolchainSetting>
+    </toolchainSettings>
+    <include_paths>
+      <include_path path="." project_relative_path="board" type="c_include"/>
+      <include_path path="../../project_template" project_relative_path="board" type="c_include"/>
+    </include_paths>
+    <source path="iar" project_relative_path="./" type="workspace" toolchain="iar">
+      <files mask="new_project.ewd"/>
+      <files mask="new_project.ewp"/>
+      <files mask="new_project.eww"/>
+    </source>
+    <source path="mdk" project_relative_path="./" type="workspace" toolchain="mdk">
+      <files mask="new_project.uvprojx"/>
+      <files mask="new_project.uvoptx"/>
+      <files mask="JLinkSettings.ini"/>
+      <files mask="new_project.uvmpw"/>
+    </source>
+    <source path="armgcc" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="build_all.bat"/>
+      <files mask="build_all.sh"/>
+      <files mask="clean.bat"/>
+      <files mask="clean.sh"/>
+      <files mask="CMakeLists.txt"/>
+      <files mask="flags.cmake"/>
+      <files mask="config.cmake"/>
+      <files mask="build_debug.bat"/>
+      <files mask="build_debug.sh"/>
+      <files mask="build_release.bat"/>
+      <files mask="build_release.sh"/>
+    </source>
+    <source path="../../../../devices/LPC804" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="all_lib_device.cmake"/>
+    </source>
+    <source path="." project_relative_path="source" type="src">
+      <files mask="main.c"/>
+    </source>
+    <source path="." project_relative_path="board" type="src">
+      <files mask="peripherals.c"/>
+      <files mask="pin_mux.c"/>
+    </source>
+    <source path="." project_relative_path="board" type="c_include">
+      <files mask="peripherals.h"/>
+      <files mask="pin_mux.h"/>
+    </source>
+    <source path="." project_relative_path="." type="other">
+      <files mask="new_project.mex"/>
+    </source>
+    <source path="." project_relative_path="board" type="src">
+      <files mask="board.c"/>
+      <files mask="clock_config.c"/>
+    </source>
+    <source path="." project_relative_path="board" type="c_include">
+      <files mask="board.h"/>
+      <files mask="clock_config.h"/>
+    </source>
+    <source path="." project_relative_path="doc" type="doc" toolchain="iar mdk mcuxpresso armgcc">
+      <files mask="readme.md"/>
+    </source>
+    <source path="iar" project_relative_path="LPC804/iar" type="linker" toolchain="iar">
+      <files mask="LPC804_flash.icf"/>
+    </source>
+    <source path="mdk" project_relative_path="LPC804/arm" type="linker" toolchain="mdk">
+      <files mask="LPC804_flash.scf"/>
+    </source>
+    <source path="armgcc" project_relative_path="LPC804/gcc" type="linker" toolchain="armgcc">
+      <files mask="LPC804_flash.ld"/>
+    </source>
+  </example>
+</ksdk:examples>

boards/lpcxpresso804/demo_apps/new_project/peripherals.c

@@ -0,0 +1,57 @@
+/*
+ * Copyright 2017-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v8.0
+processor: LPC804
+package_id: LPC804M101JDH24
+mcu_data: ksdk2_0
+processor_version: 0.9.4
+board: LPCXpresso804
+functionalGroups:
+- name: BOARD_InitPeripherals
+  UUID: 4d2f4a99-7981-4376-859d-05028596f45c
+  called_from_default_init: true
+  selectedCore: core0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals(void)
+{
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+  BOARD_InitPeripherals();
+}

boards/lpcxpresso804/demo_apps/new_project/peripherals.h

@@ -1,5 +1,5 @@
 /*
- * Copyright 2021 NXP.
+ * Copyright 2017-2021 NXP
  * All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
@@ -10,43 +10,26 @@
  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
  **********************************************************************************************************************/
 
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
 
 #if defined(__cplusplus)
 extern "C" {
-#endif
+#endif /* __cplusplus */
 
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
 
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
+void BOARD_InitPeripherals(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
 
 #if defined(__cplusplus)
 }
 #endif
 
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
+#endif /* _PERIPHERALS_H_ */

boards/lpcxpresso804/demo_apps/new_project/pin_mux.c

@@ -0,0 +1,409 @@
+/*
+ * Copyright 2017-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v8.0
+processor: LPC804
+package_id: LPC804M101JDH24
+mcu_data: ksdk2_0
+processor_version: 0.9.4
+board: LPCXpresso804
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_iocon.h"
+#include "fsl_swm.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitPins();
+    BOARD_InitDEBUG_UARTPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitPins(void)
+{
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '10', peripheral: GPIO, signal: 'PIO0, 11', pin_signal: PIO0_11/ADC_6/WKTCLKIN, direction: OUTPUT, gpio_init_state: 'true', mode: inactive, invert: disabled,
+    hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '5', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: LED_GREEN, direction: OUTPUT, gpio_init_state: 'true', mode: inactive, invert: disabled,
+    hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/ADC_10, identifier: LED_RED, direction: OUTPUT, gpio_init_state: 'true', mode: inactive,
+    invert: disabled, hysteresis: enabled, opendrain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitLEDsPins(void)
+{
+    /* Enables clock for IOCON.: enable */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U,
+    };
+    /* Initialize GPIO functionality on pin PIO0_11 (pin 10)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U,
+    };
+    /* Initialize GPIO functionality on pin PIO0_12 (pin 5)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U,
+    };
+    /* Initialize GPIO functionality on pin PIO0_13 (pin 4)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
+
+    const uint32_t LED_BLUE = (/* No addition pin function */
+                               IOCON_PIO_MODE_INACT |
+                               /* Enable hysteresis */
+                               IOCON_PIO_HYS_EN |
+                               /* Input not invert */
+                               IOCON_PIO_INV_DI |
+                               /* Disables Open-drain function */
+                               IOCON_PIO_OD_DI);
+    /* PIO0 PIN11 (coords: 10) is configured as GPIO, PIO0, 11. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_11, LED_BLUE);
+
+    const uint32_t LED_GREEN = (/* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Enable hysteresis */
+                                IOCON_PIO_HYS_EN |
+                                /* Input not invert */
+                                IOCON_PIO_INV_DI |
+                                /* Disables Open-drain function */
+                                IOCON_PIO_OD_DI);
+    /* PIO0 PIN12 (coords: 5) is configured as GPIO, PIO0, 12. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_12, LED_GREEN);
+
+    const uint32_t LED_RED = (/* No addition pin function */
+                              IOCON_PIO_MODE_INACT |
+                              /* Enable hysteresis */
+                              IOCON_PIO_HYS_EN |
+                              /* Input not invert */
+                              IOCON_PIO_INV_DI |
+                              /* Disables Open-drain function */
+                              IOCON_PIO_OD_DI);
+    /* PIO0 PIN13 (coords: 4) is configured as GPIO, PIO0, 13. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_13, LED_RED);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '22', peripheral: USART0, signal: RXD, pin_signal: PIO0_0/ACMP_I1, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '7', peripheral: USART0, signal: TXD, pin_signal: PIO0_4/ADC_11, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Enables clock for IOCON.: enable */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    /* Enables clock for switch matrix.: enable */
+    CLOCK_EnableClock(kCLOCK_Swm);
+
+    const uint32_t DEBUG_UART_RX = (/* Selects pull-up function */
+                                    IOCON_PIO_MODE_PULLUP |
+                                    /* Enable hysteresis */
+                                    IOCON_PIO_HYS_EN |
+                                    /* Input not invert */
+                                    IOCON_PIO_INV_DI |
+                                    /* Disables Open-drain function */
+                                    IOCON_PIO_OD_DI);
+    /* PIO0 PIN0 (coords: 22) is configured as USART0, RXD. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_0, DEBUG_UART_RX);
+
+    const uint32_t DEBUG_UART_TX = (/* Selects pull-up function */
+                                    IOCON_PIO_MODE_PULLUP |
+                                    /* Enable hysteresis */
+                                    IOCON_PIO_HYS_EN |
+                                    /* Input not invert */
+                                    IOCON_PIO_INV_DI |
+                                    /* Disables Open-drain function */
+                                    IOCON_PIO_OD_DI);
+    /* PIO0 PIN4 (coords: 7) is configured as USART0, TXD. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_4, DEBUG_UART_TX);
+
+    /* USART0_TXD connect to P0_4 */
+    SWM_SetMovablePinSelect(SWM0, kSWM_USART0_TXD, kSWM_PortPin_P0_4);
+
+    /* USART0_RXD connect to P0_0 */
+    SWM_SetMovablePinSelect(SWM0, kSWM_USART0_RXD, kSWM_PortPin_P0_0);
+
+    /* Disable clock for switch matrix. */
+    CLOCK_DisableClock(kCLOCK_Swm);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '8', peripheral: SWD, signal: SWCLK, pin_signal: SWCLK/PIO0_3, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '9', peripheral: SWD, signal: SWDIO, pin_signal: SWDIO/PIO0_2, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '6', peripheral: SYSCON, signal: RESETN, pin_signal: RESETN/PIO0_5, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Enables clock for IOCON.: enable */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    /* Enables clock for switch matrix.: enable */
+    CLOCK_EnableClock(kCLOCK_Swm);
+
+    const uint32_t DEBUG_SWD_SWDIO = (/* Selects pull-up function */
+                                      IOCON_PIO_MODE_PULLUP |
+                                      /* Enable hysteresis */
+                                      IOCON_PIO_HYS_EN |
+                                      /* Input not invert */
+                                      IOCON_PIO_INV_DI |
+                                      /* Disables Open-drain function */
+                                      IOCON_PIO_OD_DI);
+    /* PIO0 PIN2 (coords: 9) is configured as SWD, SWDIO. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_2, DEBUG_SWD_SWDIO);
+
+    const uint32_t DEBUG_SWD_SWDCLK = (/* Selects pull-up function */
+                                       IOCON_PIO_MODE_PULLUP |
+                                       /* Enable hysteresis */
+                                       IOCON_PIO_HYS_EN |
+                                       /* Input not invert */
+                                       IOCON_PIO_INV_DI |
+                                       /* Disables Open-drain function */
+                                       IOCON_PIO_OD_DI);
+    /* PIO0 PIN3 (coords: 8) is configured as SWD, SWCLK. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_3, DEBUG_SWD_SWDCLK);
+
+    const uint32_t DEBUG_SWD_RESETN = (/* Selects pull-up function */
+                                       IOCON_PIO_MODE_PULLUP |
+                                       /* Enable hysteresis */
+                                       IOCON_PIO_HYS_EN |
+                                       /* Input not invert */
+                                       IOCON_PIO_INV_DI |
+                                       /* Disables Open-drain function */
+                                       IOCON_PIO_OD_DI);
+    /* PIO0 PIN5 (coords: 6) is configured as SYSCON, RESETN. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_5, DEBUG_SWD_RESETN);
+
+    /* SWCLK connect to P0_3 */
+    SWM_SetFixedPinSelect(SWM0, kSWM_SWCLK, true);
+
+    /* SWDIO connect to P0_2 */
+    SWM_SetFixedPinSelect(SWM0, kSWM_SWDIO, true);
+
+    /* RESETN connect to P0_5 */
+    SWM_SetFixedPinSelect(SWM0, kSWM_RESETN, true);
+
+    /* Disable clock for switch matrix. */
+    CLOCK_DisableClock(kCLOCK_Swm);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitI2CPins:
+- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '23', peripheral: I2C0, signal: SCL, pin_signal: PIO0_14/ACMP_I3/ADC_2, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+  - {pin_num: '20', peripheral: I2C0, signal: SDA, pin_signal: PIO0_7/ADC_1/ACMPVREF, mode: pullUp, invert: disabled, hysteresis: enabled, opendrain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitI2CPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitI2CPins(void)
+{
+    /* Enables clock for IOCON.: enable */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    /* Enables clock for switch matrix.: enable */
+    CLOCK_EnableClock(kCLOCK_Swm);
+
+    const uint32_t I2C_SCL = (/* Selects pull-up function */
+                              IOCON_PIO_MODE_PULLUP |
+                              /* Enable hysteresis */
+                              IOCON_PIO_HYS_EN |
+                              /* Input not invert */
+                              IOCON_PIO_INV_DI |
+                              /* Disables Open-drain function */
+                              IOCON_PIO_OD_DI);
+    /* PIO0 PIN14 (coords: 23) is configured as I2C0, SCL. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_14, I2C_SCL);
+
+    const uint32_t I2C_SDA = (/* Selects pull-up function */
+                              IOCON_PIO_MODE_PULLUP |
+                              /* Enable hysteresis */
+                              IOCON_PIO_HYS_EN |
+                              /* Input not invert */
+                              IOCON_PIO_INV_DI |
+                              /* Disables Open-drain function */
+                              IOCON_PIO_OD_DI);
+    /* PIO0 PIN7 (coords: 20) is configured as I2C0, SDA. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_7, I2C_SDA);
+
+    /* I2C0_SDA connect to P0_7 */
+    SWM_SetMovablePinSelect(SWM0, kSWM_I2C0_SDA, kSWM_PortPin_P0_7);
+
+    /* I2C0_SCL connect to P0_14 */
+    SWM_SetMovablePinSelect(SWM0, kSWM_I2C0_SCL, kSWM_PortPin_P0_14);
+
+    /* Disable clock for switch matrix. */
+    CLOCK_DisableClock(kCLOCK_Swm);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/ADC_10, identifier: S1, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: enabled,
+    opendrain: disabled}
+  - {pin_num: '5', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: S2, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: enabled,
+    opendrain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M0P */
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Enables clock for IOCON.: enable */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    gpio_pin_config_t S2_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U,
+    };
+    /* Initialize GPIO functionality on pin PIO0_12 (pin 5)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
+
+    gpio_pin_config_t S1_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U,
+    };
+    /* Initialize GPIO functionality on pin PIO0_13 (pin 4)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
+
+    const uint32_t S2 = (/* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Enable hysteresis */
+                         IOCON_PIO_HYS_EN |
+                         /* Input not invert */
+                         IOCON_PIO_INV_DI |
+                         /* Disables Open-drain function */
+                         IOCON_PIO_OD_DI);
+    /* PIO0 PIN12 (coords: 5) is configured as GPIO, PIO0, 12. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_12, S2);
+
+    const uint32_t S1 = (/* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Enable hysteresis */
+                         IOCON_PIO_HYS_EN |
+                         /* Input not invert */
+                         IOCON_PIO_INV_DI |
+                         /* Disables Open-drain function */
+                         IOCON_PIO_OD_DI);
+    /* PIO0 PIN13 (coords: 4) is configured as GPIO, PIO0, 13. */
+    IOCON_PinMuxSet(IOCON, IOCON_INDEX_PIO0_13, S1);
+
+    /* Disable clock for switch matrix. */
+    CLOCK_DisableClock(kCLOCK_Swm);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/

boards/lpcxpresso804/demo_apps/new_project/pin_mux.h

@@ -0,0 +1,536 @@
+/*
+ * Copyright 2017-2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+
+/*! @brief Direction type  */
+typedef enum _pin_mux_direction
+{
+    kPIN_MUX_DirectionInput = 0U,        /* Input direction */
+    kPIN_MUX_DirectionOutput = 1U,       /* Output direction */
+    kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
+} pin_mux_direction_t;
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
+
+#define IOCON_PIO_HYS_EN 0x20u     /*!<@brief Enable hysteresis */
+#define IOCON_PIO_INV_DI 0x00u     /*!<@brief Input not invert */
+#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
+#define IOCON_PIO_OD_DI 0x00u      /*!<@brief Disables Open-drain function */
+
+/*! @name PIO0_11 (number 10), CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
+/*!
+ * @brief Signal name */
+#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
+/*!
+ * @brief Signal channel */
+#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 11
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_11
+/*!
+ * @brief Label */
+#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "CN6[10]/CN8[3]/D4/PIO0_11/M_PIO0_11"
+/*!
+ * @brief Identifier */
+#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
+/*!
+ * @brief Direction */
+#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
+
+/* Symbols to be used with GPIO driver */
+/*!
+ * @brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
+/*!
+ * @brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 11U
+/*!
+ * @brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 11U)
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 11U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 11U)
+/* @} */
+
+/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
+/*!
+ * @brief Signal name */
+#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
+/*!
+ * @brief Signal channel */
+#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 12
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_12
+/*!
+ * @brief Label */
+#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
+/*!
+ * @brief Identifier */
+#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
+/*!
+ * @brief Direction */
+#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
+
+/* Symbols to be used with GPIO driver */
+/*!
+ * @brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
+/*!
+ * @brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 12U
+/*!
+ * @brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 12U)
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 12U)
+/* @} */
+
+/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
+/*!
+ * @brief Signal name */
+#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
+/*!
+ * @brief Signal channel */
+#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 13
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_13
+/*!
+ * @brief Label */
+#define BOARD_INITLEDSPINS_LED_RED_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
+/*!
+ * @brief Identifier */
+#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
+/*!
+ * @brief Direction */
+#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
+
+/* Symbols to be used with GPIO driver */
+/*!
+ * @brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
+/*!
+ * @brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 13U
+/*!
+ * @brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 13U)
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 13U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 13U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
+
+#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
+#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
+#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */
+
+/*! @name PIO0_0 (number 22), CN7[3]/CN8[8]/JP2/PIO0_0
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
+/*!
+ * @brief Signal name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_0
+/*!
+ * @brief Label */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "CN7[3]/CN8[8]/JP2/PIO0_0"
+/*!
+ * @brief Identifier */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 0U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 0U)
+/* @} */
+
+/*! @name PIO0_4 (number 7), CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
+/*!
+ * @brief Signal name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_4
+/*!
+ * @brief Label */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "CN6[7]/CN8[7]/CN5[5]/JP24/PIO0_4"
+/*!
+ * @brief Identifier */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 4U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 4U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
+
+#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
+#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
+#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */
+
+/*! @name SWCLK (number 8), CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD
+/*!
+ * @brief Signal name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK
+/*!
+ * @brief Label */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "CN6[8]/CN1[4]/U1[16]/SWCLK_PIO0_3"
+/*!
+ * @brief Identifier */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 3U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 3U)
+/* @} */
+
+/*! @name SWDIO (number 9), CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
+/*!
+ * @brief Signal name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
+/*!
+ * @brief Label */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "CN6[9]/CN1[2]/U1[17]/SWDIO_PIO0_2"
+/*!
+ * @brief Identifier */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 2U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 2U)
+/* @} */
+
+/*! @name RESETN (number 6), CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
+/*!
+ * @brief Signal name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
+/*!
+ * @brief Label */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "CN6[6]/CN1[10]/S3/CN4[3]/U1[3]/U1[8]/TRST_P0_5"
+/*!
+ * @brief Identifier */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN 5U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_MASK (1U << 5U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
+
+#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
+#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
+#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */
+
+/*! @name PIO0_14 (number 23), CN7[2]/CN3[1]/JP4/PIO0_14
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITI2CPINS_I2C_SCL_PERIPHERAL I2C0                   /*!<@brief Peripheral name */
+#define BOARD_INITI2CPINS_I2C_SCL_SIGNAL SCL                        /*!<@brief Signal name */
+#define BOARD_INITI2CPINS_I2C_SCL_PIN_NAME PIO0_14                  /*!<@brief Routed pin name */
+#define BOARD_INITI2CPINS_I2C_SCL_LABEL "CN7[2]/CN3[1]/JP4/PIO0_14" /*!<@brief Label */
+#define BOARD_INITI2CPINS_I2C_SCL_NAME "I2C_SCL"                    /*!<@brief Identifier */
+#define BOARD_INITI2CPINS_I2C_SCL_PORT 0U                           /*!<@brief PORT device index: 0 */
+#define BOARD_INITI2CPINS_I2C_SCL_PIN 14U                           /*!<@brief PORT pin number */
+#define BOARD_INITI2CPINS_I2C_SCL_PIN_MASK (1U << 14U)              /*!<@brief PORT pin mask */
+                                                                    /* @} */
+
+/*! @name PIO0_7 (number 20), CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITI2CPINS_I2C_SDA_PERIPHERAL I2C0
+/*!
+ * @brief Signal name */
+#define BOARD_INITI2CPINS_I2C_SDA_SIGNAL SDA
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITI2CPINS_I2C_SDA_PIN_NAME PIO0_7
+/*!
+ * @brief Label */
+#define BOARD_INITI2CPINS_I2C_SDA_LABEL "CN7[5]/CN3[2]/JP23/CN5[4]/PIO0_7"
+/*!
+ * @brief Identifier */
+#define BOARD_INITI2CPINS_I2C_SDA_NAME "I2C_SDA"
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITI2CPINS_I2C_SDA_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITI2CPINS_I2C_SDA_PIN 7U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITI2CPINS_I2C_SDA_PIN_MASK (1U << 7U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */
+
+#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
+#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
+#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */
+
+/*! @name PIO0_13 (number 4), S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITBUTTONSPINS_S1_PERIPHERAL GPIO
+/*!
+ * @brief Signal name */
+#define BOARD_INITBUTTONSPINS_S1_SIGNAL PIO0
+/*!
+ * @brief Signal channel */
+#define BOARD_INITBUTTONSPINS_S1_CHANNEL 13
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITBUTTONSPINS_S1_PIN_NAME PIO0_13
+/*!
+ * @brief Label */
+#define BOARD_INITBUTTONSPINS_S1_LABEL "S1/CN8[4]/CN6[4]/D2/M_PIO0_13/PIO0_13"
+/*!
+ * @brief Identifier */
+#define BOARD_INITBUTTONSPINS_S1_NAME "S1"
+/*!
+ * @brief Direction */
+#define BOARD_INITBUTTONSPINS_S1_DIRECTION kPIN_MUX_DirectionInput
+
+/* Symbols to be used with GPIO driver */
+/*!
+ * @brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO
+/*!
+ * @brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN 13U
+/*!
+ * @brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 13U)
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITBUTTONSPINS_S1_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S1_PIN 13U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 13U)
+/* @} */
+
+/*! @name PIO0_12 (number 5), S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12
+  @{ */
+/* Routed pin properties */
+/*!
+ * @brief Peripheral name */
+#define BOARD_INITBUTTONSPINS_S2_PERIPHERAL GPIO
+/*!
+ * @brief Signal name */
+#define BOARD_INITBUTTONSPINS_S2_SIGNAL PIO0
+/*!
+ * @brief Signal channel */
+#define BOARD_INITBUTTONSPINS_S2_CHANNEL 12
+/*!
+ * @brief Routed pin name */
+#define BOARD_INITBUTTONSPINS_S2_PIN_NAME PIO0_12
+/*!
+ * @brief Label */
+#define BOARD_INITBUTTONSPINS_S2_LABEL "S2/CN8[6]/CN6[5]/D3/M_PIO0_12/PIO0_12"
+/*!
+ * @brief Identifier */
+#define BOARD_INITBUTTONSPINS_S2_NAME "S2"
+/*!
+ * @brief Direction */
+#define BOARD_INITBUTTONSPINS_S2_DIRECTION kPIN_MUX_DirectionInput
+
+/* Symbols to be used with GPIO driver */
+/*!
+ * @brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO
+/*!
+ * @brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN 12U
+/*!
+ * @brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 12U)
+/*!
+ * @brief PORT device index: 0 */
+#define BOARD_INITBUTTONSPINS_S2_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S2_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 12U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/

boards/lpcxpresso804/demo_apps/new_project/readme.md

@@ -0,0 +1,24 @@
+Overview
+========
+The new project is provided as empty project with device/board setup prepared. User can add additional customization take this project as starting point.
+
+
+SDK version
+===========
+- Version: 2.15.000
+
+Toolchain supported
+===================
+- IAR embedded Workbench  9.40.1
+- Keil MDK  5.38.1
+- GCC ARM Embedded  12.2
+- MCUXpresso  11.8.0
+
+Prepare the Demo
+================
+NA
+
+Running the demo
+================
+NA
+

boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/CMakeLists.txt

@@ -3,8 +3,16 @@ SET(CMAKE_SYSTEM_NAME Generic)
 CMAKE_MINIMUM_REQUIRED (VERSION 3.10.0)
 
 # THE VERSION NUMBER
-SET (Tutorial_VERSION_MAJOR 1)
-SET (Tutorial_VERSION_MINOR 0)
+SET (MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION 2)
+SET (MCUXPRESSO_CMAKE_FORMAT_MINOR_VERSION 0)
+
+include(ide_overrides.cmake OPTIONAL)
+
+if(CMAKE_SCRIPT_MODE_FILE)
+  message("${MCUXPRESSO_CMAKE_FORMAT_MAJOR_VERSION}")
+  return()
+endif()
+
 
 # ENABLE ASM
 ENABLE_LANGUAGE(ASM)
@@ -34,6 +42,8 @@ endif()
 
 include(${ProjDirPath}/flags.cmake)
 
+include(${ProjDirPath}/config.cmake)
+
 add_executable(${MCUX_SDK_PROJECT_NAME} 
 "${ProjDirPath}/../power_mode_switch_lpc.c"
 "${ProjDirPath}/../pin_mux.c"
@@ -44,64 +54,12 @@ add_executable(${MCUX_SDK_PROJECT_NAME}
 "${ProjDirPath}/../clock_config.h"
 )
 
-target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PRIVATE
     ${ProjDirPath}/..
 )
 
-set(CMAKE_MODULE_PATH
-    ${SdkRootDirPath}/devices/LPC804/utilities
-    ${SdkRootDirPath}/devices/LPC804/utilities/debug_console_lite
-    ${SdkRootDirPath}/devices/LPC804/drivers
-    ${SdkRootDirPath}/devices/LPC804
-    ${SdkRootDirPath}/components/uart
-    ${SdkRootDirPath}/CMSIS/Core/Include
-)
-
-# include modules
-include(utility_debug_console_lite_LPC804)
-
-include(utility_assert_lite_LPC804)
-
-include(driver_power_no_lib_LPC804)
-
-include(driver_pint_LPC804)
-
-include(driver_wkt_LPC804)
-
-include(driver_common_LPC804)
-
-include(driver_clock_LPC804)
-
-include(driver_reset_LPC804)
-
-include(device_LPC804_CMSIS_LPC804)
-
-include(component_miniusart_adapter_LPC804)
-
-include(device_LPC804_startup_LPC804)
-
-include(driver_lpc_miniusart_LPC804)
-
-include(driver_lpc_iocon_lite_LPC804)
-
-include(driver_swm_LPC804)
-
-include(driver_lpc_gpio_LPC804)
-
-include(driver_syscon_LPC804)
-
-include(driver_rom_api_LPC804)
-
-include(CMSIS_Include_core_cm_LPC804)
-
-include(utilities_misc_utilities_LPC804)
-
-include(device_LPC804_system_LPC804)
-
-include(driver_swm_connections_LPC804)
-
-include(driver_syscon_connections_LPC804)
 
+include(${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake)
 
 IF(NOT DEFINED TARGET_LINK_SYSTEM_LIBRARIES)  
     SET(TARGET_LINK_SYSTEM_LIBRARIES "-lm -lc -lgcc -lnosys")  
@@ -113,4 +71,5 @@ target_link_libraries(${MCUX_SDK_PROJECT_NAME} PRIVATE ${TARGET_LINK_SYSTEM_LIBR
 
 TARGET_LINK_LIBRARIES(${MCUX_SDK_PROJECT_NAME} PRIVATE -Wl,--end-group)
 
+set_target_properties(${MCUX_SDK_PROJECT_NAME} PROPERTIES ADDITIONAL_CLEAN_FILES "output.map")
 

boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/config.cmake

@@ -0,0 +1,36 @@
+# config to select component, the format is CONFIG_USE_${component}
+# Please refer to cmake files below to get available components:
+#  ${SdkRootDirPath}/devices/LPC804/all_lib_device.cmake
+
+set(CONFIG_COMPILER gcc)
+set(CONFIG_TOOLCHAIN armgcc)
+set(CONFIG_USE_COMPONENT_CONFIGURATION false)
+set(CONFIG_USE_utility_debug_console_lite true)
+set(CONFIG_USE_utility_assert_lite true)
+set(CONFIG_USE_driver_power_no_lib true)
+set(CONFIG_USE_driver_pint true)
+set(CONFIG_USE_driver_wkt true)
+set(CONFIG_USE_driver_common true)
+set(CONFIG_USE_driver_clock true)
+set(CONFIG_USE_driver_reset true)
+set(CONFIG_USE_device_LPC804_CMSIS true)
+set(CONFIG_USE_component_miniusart_adapter true)
+set(CONFIG_USE_device_LPC804_startup true)
+set(CONFIG_USE_driver_lpc_miniusart true)
+set(CONFIG_USE_driver_lpc_iocon_lite true)
+set(CONFIG_USE_driver_swm true)
+set(CONFIG_USE_driver_lpc_gpio true)
+set(CONFIG_USE_driver_syscon true)
+set(CONFIG_USE_driver_rom_api true)
+set(CONFIG_USE_utilities_misc_utilities true)
+set(CONFIG_USE_CMSIS_Include_core_cm true)
+set(CONFIG_USE_device_LPC804_system true)
+set(CONFIG_USE_driver_swm_connections true)
+set(CONFIG_USE_driver_syscon_connections true)
+set(CONFIG_CORE cm0p)
+set(CONFIG_DEVICE LPC804)
+set(CONFIG_BOARD lpcxpresso804)
+set(CONFIG_KIT lpcxpresso804)
+set(CONFIG_DEVICE_ID LPC804)
+set(CONFIG_FPU NO_FPU)
+set(CONFIG_DSP NO_DSP)

boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/armgcc/flags.cmake

@@ -139,7 +139,7 @@ SET(CMAKE_EXE_LINKER_FLAGS_DEBUG " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")
 SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     ${CMAKE_EXE_LINKER_FLAGS_RELEASE} \
@@ -165,5 +165,5 @@ SET(CMAKE_EXE_LINKER_FLAGS_RELEASE " \
     -Wl,--print-memory-usage \
     ${FPU} \
     ${SPECS} \
-    -T${ProjDirPath}/LPC804_flash.ld -static \
+    -T\"${ProjDirPath}/LPC804_flash.ld\" -static \
 ")

boards/lpcxpresso804/demo_apps/power_mode_switch_lpc/power_mode_switch_lpc_v3_14.xml

@@ -18,8 +18,8 @@
     <definition extID="platform.drivers.lpc_gpio.LPC804"/>
     <definition extID="platform.drivers.syscon.LPC804"/>
     <definition extID="platform.drivers.rom_api.LPC804"/>
-    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="platform.utilities.misc_utilities.LPC804"/>
+    <definition extID="CMSIS_Include_core_cm.LPC804"/>
     <definition extID="device.LPC804_system.LPC804"/>
     <definition extID="platform.drivers.swm_connections.LPC804"/>
     <definition extID="platform.drivers.syscon_connections.LPC804"/>
@@ -29,7 +29,7 @@
     <definition extID="mcuxpresso"/>
     <definition extID="com.nxp.mcuxpresso"/>
   </externalDefinitions>
-  <example id="lpcxpresso804_power_mode_switch_lpc" name="power_mode_switch_lpc" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.pint.LPC804 platform.drivers.wkt.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 CMSIS_Include_core_cm.LPC804 platform.utilities.misc_utilities.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
+  <example id="lpcxpresso804_power_mode_switch_lpc" name="power_mode_switch_lpc" dependency="utility.debug_console_lite.LPC804 platform.utilities.assert_lite.LPC804 platform.drivers.power_no_lib.LPC804 platform.drivers.pint.LPC804 platform.drivers.wkt.LPC804 platform.drivers.common.LPC804 platform.drivers.clock.LPC804 platform.drivers.reset.LPC804 device.LPC804_CMSIS.LPC804 component.miniusart_adapter.LPC804 device.LPC804_startup.LPC804 platform.drivers.lpc_miniusart.LPC804 platform.drivers.lpc_iocon_lite.LPC804 platform.drivers.swm.LPC804 platform.drivers.lpc_gpio.LPC804 platform.drivers.syscon.LPC804 platform.drivers.rom_api.LPC804 platform.utilities.misc_utilities.LPC804 CMSIS_Include_core_cm.LPC804 device.LPC804_system.LPC804 platform.drivers.swm_connections.LPC804 platform.drivers.syscon_connections.LPC804" category="demo_apps">
     <projects>
       <project type="com.crt.advproject.projecttype.exe" nature="org.eclipse.cdt.core.cnature"/>
     </projects>
@@ -64,6 +64,9 @@
         <option id="gnu.c.link.option.nostdlibs" type="boolean">
           <value>true</value>
         </option>
+        <option id="gnu.c.link.option.other" type="stringList">
+          <value>-no-warn-rwx-segments</value>
+        </option>
         <option id="com.crt.advproject.link.fpu" type="enum">
           <value>com.crt.advproject.link.fpu.none</value>
         </option>
@@ -91,11 +94,15 @@
       <files mask="clean.sh"/>
       <files mask="CMakeLists.txt"/>
       <files mask="flags.cmake"/>
+      <files mask="config.cmake"/>
       <files mask="build_debug.bat"/>
       <files mask="build_debug.sh"/>
       <files mask="build_release.bat"/>
       <files mask="build_release.sh"/>
     </source>
+    <source path="../../../../devices/LPC804" project_relative_path="./" type="workspace" toolchain="armgcc">
+      <files mask="all_lib_device.cmake"/>
+    </source>
     <source path="." project_relative_path="source" type="src">
       <files mask="power_mode_switch_lpc.c"/>
     </source>
@@ -106,7 +113,7 @@
       <files mask="pin_mux.h"/>
     </source>
     <source path="." project_relative_path="." type="other">
-      <files mask="power_mode_switch_lpc.mex" hidden="true"/>
+      <files mask="power_mode_switch_lpc.mex"/>
     </source>
     <source path="." project_relative_path="lpcxpresso804/demo_apps/power_mode_switch_lpc" type="binary">
       <files mask="power_mode_switch_lpc.bin" hidden="true"/>

boards/lpcxpresso804/demo_apps/safety_iec60730b/freemaster/freemaster_cfg.h

@@ -1,118 +0,0 @@
-/*
- * Copyright (c) 2007-2015 Freescale Semiconductor, Inc.
- * Copyright 2018-2019 NXP
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * FreeMASTER Communication Driver - User Configuration File
- */
-
-#ifndef FREEMASTER_CFG_H
-#define FREEMASTER_CFG_H
-
-////////////////////////////////////////////////////////////////////////////////
-// Definitions
-////////////////////////////////////////////////////////////////////////////////
-#define FMSTR_DEBUG_TX 0
-
-#define FMSTR_PLATFORM_CORTEX_M 1 /* Cortex-M platform (see freemaster.h for list of all supported platforms) */
-
-//! Set the demo application configuration
-#define FMSTR_DEMO_ENOUGH_ROM 1 /* Platform has enough ROM to show most of the FreeMASTER features */
-#define FMSTR_DEMO_LARGE_ROM \
-    0 /* Platform has large ROM enough to store the extended data structures used in FreeMASTER demo */
-#define FMSTR_DEMO_SUPPORT_I64 1 /* support for long long type */
-#define FMSTR_DEMO_SUPPORT_FLT 1 /* support for float type */
-#define FMSTR_DEMO_SUPPORT_DBL 1 /* support for double type */
-
-//! Enable/Disable FreeMASTER support as a whole
-#define FMSTR_DISABLE 0 // To disable all FreeMASTER functionalities
-
-//! Select interrupt or poll-driven serial communication
-#define FMSTR_LONG_INTR   0 // Complete message processing in interrupt
-#define FMSTR_SHORT_INTR  0 // Queuing done in interrupt
-#define FMSTR_POLL_DRIVEN 1 // No interrupt needed, polling only
-
-// List of standard FreeMASTER transports and their low-level drivers. See more options in src/drivers.
-// FMSTR_SERIAL   -   Standard serial transport protocol (Used by various types of UART peripherals as USB CDC
-// implementation)
-//    FMSTR_SERIAL_MCUX_UART   -   MCUXSDK driver for UART peripheral
-//    FMSTR_SERIAL_MCUX_LPUART -   MCUXSDK driver for LPUART peripheral
-//    FMSTR_SERIAL_MCUX_USART  -   MCUXSDK driver for USART peripheral
-//    FMSTR_SERIAL_MCUX_MINIUSART -MCUXSDK driver for MINIUSART peripheral
-//    FMSTR_SERIAL_MCUX_USB    -   MCUXSDK driver for USB peripheral with CDC class
-// FMSTR_CAN      -   Standard CAN transport protocol (Used by various types of CAN peripherals)
-//    FMSTR_CAN_MCUX_FLEXCAN   -   MCUXSDK driver for FlexCAN peripheral
-//    FMSTR_CAN_MCUX_MCAN      -   MCUXSDK driver for MCAN peripheral
-//    FMSTR_CAN_MCUX_MSCAN     -   MCUXSDK driver for msCAN peripheral
-// FMSTR_PDBDM    -   Packet Driven BDM (direct memory access via JTAG, SWD or BDM debug probes). No low-level driver
-// used.
-
-//! Select communication interface
-#define FMSTR_TRANSPORT  FMSTR_SERIAL                // Use serial transport layer */
-#define FMSTR_SERIAL_DRV FMSTR_SERIAL_MCUX_MINIUSART // Use serial driver for miniUSART */
-
-//! Define communication interface base address or leave undefined for runtime setting
-// #undef FMSTR_SERIAL_BASE   // Serial base will be assigned in runtime (when FMSTR_USE_UART)
-// #undef FMSTR_CAN_BASE   // CAN base will be assigned in runtime (when FMSTR_USE_FLEXCAN)
-
-//! FlexCAN-specific, communication message buffers
-#define FMSTR_FLEXCAN_TXMB 0
-#define FMSTR_FLEXCAN_RXMB 1
-
-//! Input/output communication buffer size
-#define FMSTR_COMM_BUFFER_SIZE 0 // Set to 0 for "automatic"
-
-//! Receive FIFO queue size (use with FMSTR_SHORT_INTR only)
-#define FMSTR_COMM_RQUEUE_SIZE 32 // Set to 0 for "default"
-
-//! Support for Application Commands
-#define FMSTR_USE_APPCMD       1  // Enable/disable App.Commands support
-#define FMSTR_APPCMD_BUFF_SIZE 32 // App.Command data buffer size
-#define FMSTR_MAX_APPCMD_CALLS 4  // How many app.cmd callbacks? (0=disable)
-
-//! Oscilloscope support
-#define FMSTR_USE_SCOPE      2 // Specify number of supported oscilloscopes
-#define FMSTR_MAX_SCOPE_VARS 8 // Specify maximum number of scope variables per one oscilloscope
-
-//! Recorder support
-#define FMSTR_USE_RECORDER 2 // Specify number of supported recorders
-
-//! Built-in recorder buffer
-#define FMSTR_REC_BUFF_SIZE 1024 // Built-in buffer size of recorder #0. Set to 0 to use runtime settings.
-
-//! Recorder time base, specifies how often the recorder is called in the user app.
-#define FMSTR_REC_TIMEBASE   FMSTR_REC_BASE_MILLISEC(0) // 0 = "unknown"
-#define FMSTR_REC_FLOAT_TRIG 1                          // Enable/disable floating point triggering
-
-// Target-side address translation (TSA)
-#define FMSTR_USE_TSA         0 // Enable TSA functionality
-#define FMSTR_USE_TSA_INROM   1 // TSA tables declared as const (put to ROM)
-#define FMSTR_USE_TSA_SAFETY  1 // Enable/Disable TSA memory protection
-#define FMSTR_USE_TSA_DYNAMIC 1 // Enable/Disable TSA entries to be added also in runtime
-
-// Pipes as data streaming over FreeMASTER protocol
-#define FMSTR_USE_PIPES 3 // Specify number of supported pipe objects
-
-// Enable/Disable read/write memory commands
-#define FMSTR_USE_READMEM      1 // Enable read memory commands
-#define FMSTR_USE_WRITEMEM     1 // Enable write memory commands
-#define FMSTR_USE_WRITEMEMMASK 1 // Enable write memory bits commands
-
-// Define password for access levels to protect them. AVOID SHORT PASSWORDS in production version.
-// Passwords should be at least 20 characters long to prevent dictionary attacks.
-// #define FMSTR_RESTRICTED_ACCESS_R_PASSWORD    "r"   // Read-only access level password. Let undefined when no
-// password is required. #define FMSTR_RESTRICTED_ACCESS_RW_PASSWORD   "rw"  // Write access level password. Let
-// undefined to set the same as for read-only access level. #define FMSTR_RESTRICTED_ACCESS_RWF_PASSWORD  "rwf" // Flash
-// access level password. Let undefined to set the same as for write access level.
-
-// Storing cleartext passwords in Flash memory is not safe, consider storing their SHA1 hash instead
-// Even with this option, the hash must be generated from reasonably complex password to prevent dictionary attack.
-#define FMSTR_USE_HASHED_PASSWORDS \
-    0 // When non-zero, the passwords above are specified as a pointer to 20-byte SHA1 hash of password text
-
-#endif /* FREEMASTER_CFG_H */
-
-////////////////////////////////////////////////////////////////////////////////
-// EOF
-////////////////////////////////////////////////////////////////////////////////

boards/lpcxpresso804/demo_apps/safety_iec60730b/isr.h

@@ -1,24 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _ISR_H_
-#define _ISR_H_
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-#undef VECTOR_015
-#define VECTOR_015 SYSTICK_Isr
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-extern void SYSTICK_Isr(void);
-
-#endif /* _ISR_H_ */

boards/lpcxpresso804/demo_apps/safety_iec60730b/main.c

@@ -1,438 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include "safety_config.h"
-#if FMSTR_SERIAL_ENABLE
-    #include "freemaster.h"
-#endif
-#include "safety_test_items.h"
-#include "board.h"
-
-
-/*******************************************************************************
- * Prototypes
- ******************************************************************************/
-void SYSTICK_Isr(void);
-void safety_dio_runtime(void);
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* Start and end addresses for March test applied to Stack area */
-extern const uint32_t c_stackTestFirstAddress;  /* defined in safety_*.c */
-extern const uint32_t c_stackTestSecondAddress; /* defined in safety_*.c */
-
-/* Test variable */
-volatile uint32_t counter = 0;
-
-#if defined(__IAR_SYSTEMS_ICC__) /* IAR */
-    #pragma section =  ".safety_ram"
-    #pragma section = ".pctest"
-
-    wd_test_t g_sSafetyWdTest @ ".safety_ram";
-    safety_common_t g_sSafetyCommon @ ".safety_ram";
-    fs_flash_runtime_test_parameters_t g_sFlashCrc @ ".safety_ram";
-    fs_flash_configuration_parameters_t g_sFlashConfig @ ".safety_ram";
-    fs_ram_test_t g_sSafetyRamTest @ ".safety_ram";
-    fs_ram_test_t g_sSafetyRamStackTest @ ".safety_ram";
-    fs_clock_test_t g_sSafetyClockTest @ ".safety_ram";
-
-#elif (defined(__GNUC__) && ( __ARMCC_VERSION >= 6010050)) /* KEIL */
-    #include "linker_config.h"
-		
-    /* The safety-related RAM border marker. */
-    extern uint32_t Image$$SafetyRam_region$$Limit;
-    
-    uint32_t stack_pointer_addr = (uint32_t)__BOOT_STACK_ADDRESS;
-
-    uint16_t crcPostbuild; /* Checksum result calculated by srec_cat.exe in post-build phase */
-
-    wd_test_t g_sSafetyWdTest __attribute__((section(".safety_ram")));
-    safety_common_t g_sSafetyCommon __attribute__((section(".safety_ram")));
-    fs_clock_test_t g_sSafetyClockTest __attribute__((section(".safety_ram")));
-    fs_ram_test_t g_sSafetyRamTest __attribute__((section(".safety_ram")));
-    fs_ram_test_t g_sSafetyRamStackTest __attribute__((section(".safety_ram")));
-    fs_flash_runtime_test_parameters_t g_sFlashCrc __attribute__((section(".safety_ram")));
-    fs_flash_configuration_parameters_t g_sFlashConfig __attribute__((section(".safety_ram")));
-
-#else /* MCUXpresso */
-    uint16_t crcPostbuild; /* Checksum result calculated by srec_cat.exe in post-build phase */
-
-    extern uint32_t __BOOT_STACK_ADDRESS; /* from Linker command file */
-    uint32_t stack_pointer_addr = (uint32_t)&__BOOT_STACK_ADDRESS;
-
-    extern uint32_t m_sec_fs_ram_start; /* from Linker command file */
-    uint32_t pui32SafetyRamSectionStart = (uint32_t)&m_sec_fs_ram_start;
-
-    extern uint32_t m_sec_fs_ram_end; /* from Linker command file */
-    uint32_t pui32SafetyRamSectionEnd = (uint32_t)&m_sec_fs_ram_end;
-
-    wd_test_t g_sSafetyWdTest __attribute__((section(".safety_ram")));
-    safety_common_t g_sSafetyCommon __attribute__((section(".safety_ram")));
-    fs_clock_test_t g_sSafetyClockTest __attribute__((section(".safety_ram")));
-    fs_ram_test_t g_sSafetyRamTest __attribute__((section(".safety_ram")));
-    fs_ram_test_t g_sSafetyRamStackTest __attribute__((section(".safety_ram")));
-    fs_flash_runtime_test_parameters_t g_sFlashCrc __attribute__((section(".safety_ram")));
-    fs_flash_configuration_parameters_t g_sFlashConfig __attribute__((section(".safety_ram")));
-#endif
-    
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief main function
- *
- * @param void
- *
- * @return None
- */
-int32_t main(void)
-{
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-      /* Clock initialization */
-    ClockInit();
-    
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif    
-    
-    /* Watchdog test */
-    SafetyWatchdogTest(&g_sSafetyCommon, &g_sSafetyWdTest);
-    
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-        
-#if defined(__IAR_SYSTEMS_ICC__) /* IAR */
-    uint32_t *safetyRamStart = __section_begin(".safety_ram");
-    uint32_t *safetyRamEnd   = __section_end(".safety_ram");
-
-#elif (defined(__GNUC__) && (__ARMCC_VERSION >= 6010050)) /* KEIL */
-    uint32_t *safetyRamStart = (uint32_t *)m_safety_ram_start;
-    uint32_t *safetyRamEnd   = (uint32_t *)&Image$$SafetyRam_region$$Limit;
-
-#else /* MCUXpresso */
-    uint32_t *safetyRamStart = (uint32_t *)pui32SafetyRamSectionStart;
-    uint32_t *safetyRamEnd   = (uint32_t *)pui32SafetyRamSectionEnd;
-#endif
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-#if FMSTR_SERIAL_ENABLE    
-    SerialInit();
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-    FMSTR_Init(); /* initialize freemaster */
-#endif /* FMSTR_SERIAL_ENABLE */
-    g_sSafetyCommon.safetyErrors        = 0; /* clear the variable that records safety error codes */
-    g_sSafetyCommon.fastIsrSafetySwitch = 0;
-
-    /* Flash test init */
-    SafetyFlashTestInit(&g_sFlashCrc, &g_sFlashConfig);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-#if FLASH_TEST_ENABLED
-    /* After-reset flash test */
-    SafetyFlashAfterResetTest(&g_sSafetyCommon, &g_sFlashConfig);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-#endif /* FLASH_TEST_ENABLED */
-
-    /* Ram test init for Safety related RAM space */
-    SafetyRamTestInit(&g_sSafetyRamTest, safetyRamStart, safetyRamEnd);
-
-    /* Ram test init for Stack memory */
-    SafetyRamTestInit(&g_sSafetyRamStackTest, (uint32_t *)c_stackTestFirstAddress,
-                      (uint32_t *)c_stackTestSecondAddress);
-
-    /* Ram after-reset test for safety related memory*/
-    SafetyRamAfterResetTest(&g_sSafetyCommon, &g_sSafetyRamTest);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-    /* Ram after-reset test for Stack area */
-    SafetyRamAfterResetTest(&g_sSafetyCommon, &g_sSafetyRamStackTest);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-#if PC_TEST_ENABLED
-    /* Program Counter test */
-    SafetyPcTest(&g_sSafetyCommon, PC_TEST_PATTERN);
-#endif
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-    /* CPU test after */
-    SafetyCpuAfterResetTest(&g_sSafetyCommon);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-    /* initialize Stack test */
-    SafetyStackTestInit();
-
-    /* Stack overflow and underflow test */
-    SafetyStackTest(&g_sSafetyCommon);
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-#if ADC_TEST_ENABLED
-    AdcInit();
-    
-    #if WATCHDOG_ENABLED
-      Watchdog_refresh; /* refreshing the watchdog */
-    #endif
-
-    /* After-reset ADC test */
-    for (uint8_t i = 0; i < 9; i++) /* first iteration is init phase */
-    {
-        for (uint8_t y = 0; y < 40; y++)
-            __asm("nop"); /* delay because of conversion time */
-        SafetyAnalogTest(&g_sSafetyCommon);
-        
-        #if WATCHDOG_ENABLED
-          Watchdog_refresh; /* refreshing the watchdog */
-        #endif
-    }
-#endif /* ADC_TEST_ENABLED */
-
-#if defined(_MKE15Z7_H_) | defined(_MKE17Z7_H_) 
-#if TSI_TEST_ENABLED
-    volatile uint32_t tsi_cnt_number = 0; /* Variables for runtime TSI test */
-
-    /* Enable TSI peripheral clock */
-    PCC->CLKCFG[PCC_TSI0_INDEX] = (PCC_CLKCFG_CGC(0));
-    PCC->CLKCFG[PCC_TSI0_INDEX] = (PCC_CLKCFG_CGC(TRUE) | PCC_CLKCFG_PCS(1)); /* System Oscillator Bus Clock */
-
-    tsi_port_clock_enable(); /* This function enable clock to correspond  PORT */
-
-    /* Put ALL items to INIT state */
-    for (tsi_cnt_number = 0; tsi_safety_test_items[tsi_cnt_number] != NULL; tsi_cnt_number++)
-    {
-        FS_TSI_InputInit(tsi_safety_test_items[tsi_cnt_number]);
-    }
-
-    /* After-reset TSI test */
-    for (tsi_cnt_number = 0; tsi_safety_test_items[tsi_cnt_number] != NULL; tsi_cnt_number++)
-    {
-        while (FS_TSI_PASS_STIM != tsi_safety_test_items[tsi_cnt_number]->state)
-        {
-            SafetyTsiChanelTest(&g_sSafetyCommon, tsi_safety_test_items[tsi_cnt_number]);
-        }
-
-        FS_TSI_InputInit(tsi_safety_test_items[tsi_cnt_number]); /* SET back to INIT state for next runtime check */
-
-#if WATCHDOG_ENABLED
-        Watchdog_refresh; /* refreshing the watchdog */
-#endif
-    }
-    tsi_cnt_number = 0; /* Reset to 0 for RUNTIME test cnt */
-#endif                  /* TSI_TEST_ENABLED */
-#endif                  /* _MKE15Z7_H_ _MKE17Z7_H_ */
-
-#if DIO_TEST_ENABLED
-    /* Digital I/O test */
-    SafetyDIOTestInit(&g_sSafetyCommon, g_dio_safety_test_items);
-   
-  #ifdef _MKE02Z4_H_
-    SafetyDigitalOutputTest(&g_sSafetyCommon,g_dio_safety_test_items[0]);
-    SafetyDigitalInputTest(&g_sSafetyCommon,g_dio_safety_test_items[1]);
-  #else
-  
-    for (int i = 0; g_dio_safety_test_items[i] != 0; i++)
-    {
-        SafetyDigitalOutputTest(&g_sSafetyCommon, g_dio_safety_test_items[i]);
-        SafetyDigitalInputOutput_ShortSupplyTest(&g_sSafetyCommon, g_dio_safety_test_items[i], DIO_SHORT_TO_GND_TEST);
-        SafetyDigitalInputOutput_ShortSupplyTest(&g_sSafetyCommon, g_dio_safety_test_items[i], DIO_SHORT_TO_VDD_TEST);
-    }
-
-    SafetyDigitalInputOutput_ShortAdjTest(&g_sSafetyCommon, g_dio_safety_test_items[0], g_dio_safety_test_items[1],
-                                          LOGICAL_ONE);
-    SafetyDigitalInputOutput_ShortAdjTest(&g_sSafetyCommon, g_dio_safety_test_items[0], g_dio_safety_test_items[1],
-                                          LOGICAL_ZERO);
-
-#if defined(_MKE15Z7_H_) | defined(_MKE17Z7_H_) 
-    SafetyDigitalInputOutput_ShortAdjTest(&g_sSafetyCommon, g_dio_safety_test_items[2], g_dio_safety_test_items[3],
-                                          LOGICAL_ZERO);
-    SafetyDigitalInputOutput_ShortAdjTest(&g_sSafetyCommon, g_dio_safety_test_items[6], g_dio_safety_test_items[7],
-                                          LOGICAL_ONE);
-#endif
-
-#endif /* _MKE02Z4_H_ */
-#endif /* DIO_TEST_ENABLED */
-
-#if WATCHDOG_ENABLED
-    Watchdog_refresh; /* refreshing the watchdog */
-#endif
-
-#if CLOCK_TEST_ENABLED
-    /* Initialize Clock test */
-    SafetyClockTestInit(&g_sSafetyCommon, &g_sSafetyClockTest);
-#endif
-
-    /* Initialize SysTick */
-    SystickInit(SYSTICK_RELOAD_VALUE);
-
-    /* Enable interrupts */
-    __asm("CPSIE i");
-    
-    while (TRUE)
-    {       
-        /* Interruptable CPU registers test */
-        SafetyCpuBackgroundTest(&g_sSafetyCommon);
-
-        /* safety test of CPU CONTROL register, it cannot be placed in interrupt, thus interrupts must be disabled for a
-         * while */
-        /* - see IEC60730 library documentation for CPU errors handling ! */
-        __asm("CPSID i");
-        g_sSafetyCommon.CPU_control_test_result = FS_CM0_CPU_Control();
-        __asm("CPSIE i");
-        if (g_sSafetyCommon.CPU_control_test_result == FS_FAIL_CPU_CONTROL)
-        {
-            g_sSafetyCommon.safetyErrors |= CPU_CONTROL_ERROR;
-            SafetyErrorHandling(&g_sSafetyCommon);
-        }
-
-        /* safety test of CPU SP_PROCESS register, it cannot be placed in interrupt, thus interrupts must be disabled
-         * for a while */
-        /* - see IEC60730 library documentation for CPU errors handling ! */
-        __asm("CPSID i");
-        FS_CM0_CPU_SPprocess();
-        __asm("CPSIE i");
-
-#if FLASH_TEST_ENABLED
-        /* Runtime Flash test */
-        SafetyFlashRuntimeTest(&g_sSafetyCommon, &g_sFlashCrc, &g_sFlashConfig);
-#endif
-
-#if CLOCK_TEST_ENABLED
-        /* Runtime Clock test */
-        SafetyClockTestCheck(&g_sSafetyCommon, &g_sSafetyClockTest);
-#endif
-
-        /* Stack overflow and underflow test */
-        SafetyStackTest(&g_sSafetyCommon);
-
-#if ADC_TEST_ENABLED
-        /* Runtime ADC test */
-        SafetyAnalogTest(&g_sSafetyCommon);
-#endif
-
-#if TSI_TEST_ENABLED
-  #if defined(_MKE15Z7_H_) | defined(_MKE17Z7_H_)  
-        
-
-        /* Runtime TSI test */
-        if (FS_TSI_PASS_STIM != tsi_safety_test_items[tsi_cnt_number]->state)
-        {
-            SafetyTsiChanelTest(&g_sSafetyCommon, tsi_safety_test_items[tsi_cnt_number]);
-        }
-        else if (tsi_safety_test_items[tsi_cnt_number + 1] != NULL)
-        {
-            FS_TSI_InputInit(tsi_safety_test_items[tsi_cnt_number]);
-            tsi_cnt_number++;
-
-            /* DIO TEST */
-            /* Because DIO can Use the SAME port as TSI, we must call this test only when TSI not RUN! */
-            safety_dio_runtime();
-        }
-        else
-        {
-            tsi_cnt_number = 0;
-        }
-  #endif /* _MKE15Z7_H_ _MKE17Z7_H_ */  
-#else /* TSI_TEST_ENABLED */
-
-#if DIO_TEST_ENABLED
-
-        /* Digital I/O test */
-        safety_dio_runtime();
-        
-#endif /* DIO_TEST_ENABLED */
-#endif /* TSI_TEST_ENABLED */
-
-#if FMSTR_SERIAL_ENABLE        
-        FMSTR_Poll(); /* Freemaster cummunication */
-#endif /* FMSTR_SERIAL_ENABLE */
-        
-        development_test_terminate(); /* For example validation during development */
-    }
-}
-
-void safety_dio_runtime(void)
-{
-#ifdef _MKE02Z4_H_
-    SafetyDigitalOutputTest(&g_sSafetyCommon, g_dio_safety_test_items[0]);
-    SafetyDigitalInputTest(&g_sSafetyCommon, g_dio_safety_test_items[1]);
-#else
-
-    /* Static variable for indexing in items array */
-    static uint8_t dio_cnt_number = 0;
-
-    if (g_dio_safety_test_items[dio_cnt_number] != NULL)
-    {
-        SafetyDigitalOutputTest(&g_sSafetyCommon, g_dio_safety_test_items[dio_cnt_number]);
-        SafetyDigitalInputOutput_ShortSupplyTest(&g_sSafetyCommon, g_dio_safety_test_items[dio_cnt_number],
-                                                 DIO_SHORT_TO_GND_TEST);
-        SafetyDigitalInputOutput_ShortSupplyTest(&g_sSafetyCommon, g_dio_safety_test_items[dio_cnt_number],
-                                                 DIO_SHORT_TO_VDD_TEST);
-
-        /* In next call, test next DIO channel */
-        dio_cnt_number++;
-    }
-    else
-    {
-        dio_cnt_number = 0;
-    }
-#endif
-}
-
-
-/*!
- * @brief Systick interrupt function
- *
- * @param void
- *
- * @return None
- */
-void SYSTICK_Isr(void)
-{
-    counter++;
-
-#if CLOCK_TEST_ENABLED
-    /* Clock test function */
-    SafetyClockTestIsr(&g_sSafetyClockTest);
-#endif
-
-    /* Safety tests which cannot be interrupted */
-    SafetyIsrFunction(&g_sSafetyCommon, &g_sSafetyRamTest, &g_sSafetyRamStackTest);
-
-    /* Refreshing the watchdog. For short period of interrupts, choose higher refresh ratio parameter */
-    SafetyWatchdogRuntimeRefresh(&g_sSafetyWdTest);
-}

boards/lpcxpresso804/demo_apps/safety_iec60730b/mcux/linker/lpcxpresso804_safety.ld

@@ -1,207 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-GROUP (
-  "libcr_semihost_nf.a"
-  "libcr_c.a"
-  "libcr_eabihelpers.a"
-  "libgcc.a"
-)
-
-/**************************************************************/
-/*    |            | --> data region                          */
-/*    |            |                                          */
-/*    |____________|                                          */
-/*    |____________| --> STACK_TEST_P_1     ....ADR           */
-/*    |____________|                        ....ADR + 0x4     */
-/*    |____________|                        ....ADR + 0x8     */
-/*    |____________| --> STACK_TEST_P_2     ....ADR + 0xC     */
-/*    |            |                                          */
-/*    |            |                                          */
-/*    |            |                                          */
-/*    |   STACK    |                                          */
-/*    |            |                                          */
-/*    |            |                                          */
-/*    |            |                                          */
-/*    |            |                                          */
-/*    |____________| --> __BOOT_STACK_ADDRESS                 */
-/*    |____________| --> STACK_TEST_P_3                       */
-/*    |____________|                                          */
-/*    |____________|                                          */
-/*    |____________| --> STACK_TEST_P_4                       */
-/*    |____________| --> SAFETY_ERROR_CODE                    */
-/*    |____________| --> PC_test_flag                         */
-/*    |            | --> WD_TEST_BACKUP                       */
-/*    |____________|                                          */
-/*    |            |                                          */
-/*    |            | --> RAM_TEST_BACKUP                      */
-/*    |____________|                                          */
-/**************************************************************/
-
-/* FLASH memory boundaries. */
-__ROM_start__     = 0x00000000;
-__ROM_end__       = 0x00007BFF; 
-
-/* RAM memory boundaries. */
-__RAM_start__     = 0x10000000;
-__RAM_end__       = 0x10000EFF;
-
-/* Sizes of objects in RAM. */
-__size_cstack__       = 0x300;  /* Stack size. */
-stack_test_block_size = 0x10;   /* Safety stack test pattern. */
-ram_test_backup_size  = 0x20;   /* Safety RAM test backup size. */
-wd_test_backup_size   = 0x20;   /* Safety WDOG test data size. */
-
-
-/* Sizes of objects in FLASH. */
-__vector_table_size__ = 0x2FC;
-__PC_test_size        = 0x20;
-__size_flash_crc__    = 0x10;
-__flash_cfg_size      = 0x10;
-
-__VECTOR_TABLE  = __ROM_start__;
-__size_heap__    = 0x40;     /* 2x  heap and heap2stackfill */
-
-/******************************************************************************/
-/******************     SYMBOLS     *******************************************/
-/******************************************************************************/
-/* Assemble RAM addresses. */
-m_ram_test_backup     = (__RAM_end__ - ram_test_backup_size + 0x1);
-m_wd_test_backup      = (m_ram_test_backup - wd_test_backup_size);
-m_pc_test_flag        = (m_wd_test_backup - 0x4);
-m_safety_error_code   = (m_pc_test_flag - 0x4);
-m_stack_test_p_4      = (m_safety_error_code - 0x4);
-m_stack_test_p_3      = (m_stack_test_p_4 - stack_test_block_size +0x4);
-__BOOT_STACK_ADDRESS  = (m_stack_test_p_3 - 0x4);
-m_stack_test_p_2      = (__BOOT_STACK_ADDRESS - __size_cstack__);
-m_stack_test_p_1      = (m_stack_test_p_2 - stack_test_block_size + 0x4);
-
-m_safety_ram_start   =  __RAM_start__;
-
-/* Assemble FLASH addresses. */
-m_intvec_table_start = (__ROM_start__);
-m_intvec_table_end   = (m_intvec_table_start  + __vector_table_size__ - 0x1);
-m_flash_config_start = (m_intvec_table_end    + 0x1);
-m_flash_config_end   = (m_flash_config_start  + __flash_cfg_size - 0x1);
-__PC_test_start__    = (m_flash_config_end    + 0x1); 
-__PC_test_end__ 	 = (__PC_test_start__ + __PC_test_size - 0x1);
-m_flash_start        = (__PC_test_end__   + 0x1);
-
-m_fs_flash_crc_end   = (__ROM_end__);
-m_fs_flash_crc_start = (m_fs_flash_crc_end - __size_flash_crc__ + 0x1);
-m_flash_end          = (m_fs_flash_crc_start - 0x1);
-
-MEMORY
-{
-  /* Define each memory region */
-  MEM_FLASH (rx) : ORIGIN = __ROM_start__, LENGTH = (__ROM_end__ - __ROM_start__ + 1)
-  MEM_RAM  (rwx) : ORIGIN = __RAM_start__, LENGTH = (__RAM_end__ - __RAM_start__ + 1)
-}
-
-ENTRY(ResetISR)
-
-SECTIONS
-{
-    /* Safety-related code and read-only data section. */
-    .SEC_FS_ROM : ALIGN(4)
-    {
-        FILL(0xff)
-
-        /* The interrupt vector table. */
-        . = m_intvec_table_start;
-        KEEP(*(.intvec*))
-
-        /* Flash configuration table. */
-        . = m_flash_config_start;
-        KEEP(*(.flshcfg*))
-
-        /* PC test object. */
-        . = __PC_test_start__;
-        KEEP(*iec60730b_cm0_pc_object.o(.text*))
-
-        /* Safety-related FLASH code and RO data. */
-        . = m_flash_start;
-        *(.rodata*)
-        . = . + 1;
-        . = ALIGN(4);
-    } >MEM_FLASH
-
-    /* The safety-related RAM. */
-    .SEC_FS_RAM m_safety_ram_start : AT (ADDR(.SEC_FS_ROM) + SIZEOF(.SEC_FS_ROM))
-    {
-    	m_sec_fs_ram_load_start = LOADADDR(.SEC_FS_RAM);
-    	m_sec_fs_ram_start = .;
-    	*(.safety_ram*)
-        *main.o(.data*)
-        *safety_test_items.o(.data*)
-        . = . + 1;
-        . = ALIGN(4);
-        m_sec_fs_ram_load_end = LOADADDR (.SEC_FS_RAM) + SIZEOF(.SEC_FS_RAM);
-        m_sec_fs_ram_end = .;
-
-        /* The end of safety-related FLASH memory. */
-        m_safety_flash_end = LOADADDR (.SEC_FS_RAM) + SIZEOF(.SEC_FS_RAM);
-    } >MEM_RAM
-
-    /* The non-safety RW data. */
-    .SEC_RWRAM m_sec_fs_ram_end : AT (m_safety_flash_end)
-    {
-       m_sec_rwram_load_start = LOADADDR(.SEC_RWRAM);
-       m_sec_rwram_start = .;
-       *(.data*)
-       . = . + 1;
-       . = ALIGN(4);
-       m_sec_rwram_load_end = LOADADDR(.SEC_RWRAM) + SIZEOF(.SEC_RWRAM);
-       m_sec_rwram_end = .;
-    } >MEM_RAM
-
-    /* The non-safety code and RO data. */
-    .SEC_ROM m_sec_rwram_load_end : ALIGN(4)
-    {
-        FILL(0xff)
-        *(.text*)
-        KEEP(*(.rodata .rodata.* .constdata .constdata.*))
-        . = . + 1;
-        . = ALIGN(4);
-    } >MEM_FLASH
-
-    /* The safety FLASH CRC. */
-    .SEC_CRC m_fs_flash_crc_start : ALIGN(4)
-    {
-        FILL(0xff)
-        KEEP(*(.flshcrc*))
-    } >MEM_FLASH
-
-    /* Stack memory. */
-    stack (__BOOT_STACK_ADDRESS - __size_cstack__) : ALIGN(4)
-    {
-        . = ALIGN(4);
-    } > MEM_RAM
-
-    /* The zero-initialized RW data. */
-    .SEC_BSS m_sec_rwram_end : ALIGN(4)
-    {
-       m_sec_bss_start = .;
-       *(.bss*)
-       *(COMMON)
-       . = . + 1;
-       . = ALIGN(4);
-       m_sec_bss_end = .;
-    } >MEM_RAM
-    
-    /* Reserve and place Heap within memory map */
-    _HeapSize = __size_heap__;
-    .heap :  ALIGN(4)
-    {
-        _pvHeapStart = .;
-        . += _HeapSize;
-        . = ALIGN(4);
-        _pvHeapLimit = .;
-    } > MEM_RAM
-    
-	
-}

boards/lpcxpresso804/demo_apps/safety_iec60730b/pin_mux.c

@@ -1,76 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v8.0
-processor: LPC804
-package_id: LPC804M101JDH24
-mcu_data: ksdk2_0
-processor_version: 8.0.2
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_swm.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '22', peripheral: USART0, signal: RXD, pin_signal: PIO0_0/ACMP_I1}
-  - {pin_num: '7', peripheral: USART0, signal: TXD, pin_signal: PIO0_4/ADC_11}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-/* Function assigned for the Cortex-M0P */
-void BOARD_InitPins(void)
-{
-    /* Enables clock for switch matrix.: enable */
-    CLOCK_EnableClock(kCLOCK_Swm);
-
-    /* USART0_TXD connect to P0_4 */
-    SWM_SetMovablePinSelect(SWM0, kSWM_USART0_TXD, kSWM_PortPin_P0_4);
-
-    /* USART0_RXD connect to P0_0 */
-    SWM_SetMovablePinSelect(SWM0, kSWM_USART0_RXD, kSWM_PortPin_P0_0);
-
-    /* Disable clock for switch matrix. */
-    CLOCK_DisableClock(kCLOCK_Swm);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/

boards/lpcxpresso804/demo_apps/safety_iec60730b/project_setup_lpcxpresso804.c

@@ -1,234 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include "project_setup_lpcxpresso804.h"
-#include "clock_config.h"
-#include "pin_mux.h"
-
-#include "fsl_usart.h"
-#if FMSTR_SERIAL_ENABLE
-#include "freemaster.h"
-#include "freemaster_serial_usart.h"
-#endif
-#include "board.h"
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*!
- * @brief   Watchdog configuration function
- *
- *          Enables the watchdog. Also in Wait and Stop mode. Updates are allowed
- *
- * @param   wd_setup_value      //watchdog setup value for timeout
- *
- * @return  None
- */
-void WatchdogEnable(uint32_t wd_setup_value)
-{
-    SYSCON->SYSAHBCLKCTRL0 |= SYSCON_SYSAHBCLKCTRL0_WWDT_MASK; /*Enable clock to WWDT*/
-    SYSCON->PDRUNCFG &= ~(SYSCON_PDRUNCFG_LPOSC_PD_MASK);
-
-    WWDT->TC      = WWDT_TC_COUNT(wd_setup_value); /*500mS refresh value */
-    WWDT->MOD     = (WWDT_MOD_LOCK(0)) | WWDT_MOD_WDEN(1) | (WWDT_MOD_WDRESET(1));
-    WWDT->WINDOW  = 0xFFFFFF; /* Disable Window mode */
-    WWDT->WARNINT = 0;
-
-    WWDT->FEED = 0xAA; /*Start WDOG */
-    WWDT->FEED = 0x55;
-}
-
-/*!
- * @brief   Watchdog disabling function
- *
- * @param   None
- *
- * @return  None
- */
-void WatchdogDisable(void)
-{
-    /* WDOG is disabled on LPC after reset by default */
-}
-
-/*!
- * @brief   Initialization of Systick timer
- *
- *          This function configures the Systick as a source of interrupt
- *
- * @param   reloadValue - defines the period of counter refresh
- *
- * @return  None
- */
-void SystickInit(uint32_t reloadValue)
-{
-    SysTick->VAL  = 0;
-    SysTick->LOAD = reloadValue;
-    SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk;
-}
-
-/* Second timer for CLOCK test */
-void ReferenceTimerInit(void)
-{
-    SYSCON->SYSAHBCLKCTRL0 |= SYSCON_SYSAHBCLKCTRL0_WKT_MASK; /* Enable Clock to WKT regiter */
-
-    SYSCON->PRESETCTRL0 &= ~(SYSCON_PRESETCTRL0_WKT_RST_N_MASK); // Reset the WKT
-    SYSCON->PRESETCTRL0 |= (SYSCON_PRESETCTRL0_WKT_RST_N_MASK);
-
-    SYSCON->PDRUNCFG &= ~(SYSCON_PDRUNCFG_LPOSC_PD_MASK);
-
-    SYSCON->LPOSCCLKEN |= 0x2; /*Enable clock for WKT */
-
-    WKT->CTRL  = 0x1;         /*Set LPO osc as clokc for WKT */
-    WKT->COUNT = START_VALUE; /* Set start value for Decreasin of Counter */
-}
-
-/*!
- * @brief   Setup of clock
- *
- * @param   void
- *
- * @return  None
- *
- *
- */
-void ClockInit(void)
-{
-    BOARD_BootClockFRO30M();
-
-    /*Enable clock to IOCONN  and SWM*/
-    SYSCON->SYSAHBCLKCTRL0 |= (SYSCON_SYSAHBCLKCTRL0_SWM(1) | SYSCON_SYSAHBCLKCTRL0_IOCON(1));
-}
-
-/*!
- * @brief   Initialization of CTIMER
- *
- *          This function initializes the CTIMER. CTIMER is used for After reset WDog test.
- *
- * @param   void
- *
- * @return  None
- */
-void CTIMERInit(void)
-{
-    SYSCON->SYSAHBCLKCTRL0 |= SYSCON_SYSAHBCLKCTRL0_CTIMER_MASK; // Enable clock
-    CTIMER0->CTCR = 0;                                           /* Give DEFAULT state, Timer mode selected */
-    CTIMER0->MCR  = 0;                                           /* Default state*/
-    CTIMER0->CCR  = 0;                                           /* Default state*/
-    CTIMER0->EMR  = 0;                                           /* Default state*/
-    CTIMER0->PWMC = 0;                                           /* Default state*/
-
-    CTIMER0->PR = 0; /* Every APB bus clock */
-}
-
-/*!
- * @brief  Sets port direction and mux
- *
- * @param
- *
- * @return  None
- */
-void PortInit(uint8_t *pByte,
-              uint32_t *pDir,
-              uint32_t *pIocon,
-              uint32_t pinDir,
-              uint32_t pinNum,
-              uint32_t pull,
-              uint32_t clock_enable_shift)
-{
-    /* Enable clock to GPIO module */
-    SYSCON->SYSAHBCLKCTRL0 |= (1 << clock_enable_shift);
-
-    *pIocon &= ~(IOCON_PIO_MODE_MASK); /*Clear PULL setting*/
-    *pIocon |= IOCON_PIO_MODE(pull);   /*Set pullup*/
-
-    if (pinDir == PIN_DIRECTION_OUT)
-    {
-        *pDir |= (1 << pinNum); /* PINx = 1 = output */
-    }
-    else if (pinDir == PIN_DIRECTION_IN)
-    {
-        *pDir &= ~(1 << pinNum); /* PINx = 0 = input */
-    }
-}
-
-/*!
- * @brief   Initialization of ADC0
- *
- *          8 MHz System Oscillator Bus Clock is the source clock.
- *          single-ended 12-bit conversion
- *
- * @param   void
- *
- * @return  None
- */
-#define FRO_CLK 30000000
-void AdcInit(void)
-{
-    // uint8_t clkdiv = 0;
-    uint32_t temp;
-    // Step 1. Power up and reset the ADC, and enable clocks to peripheral
-    SYSCON->PDRUNCFG &= ~(SYSCON_PDRUNCFG_ADC_PD_MASK);
-    SYSCON->PRESETCTRL0 &= ~(SYSCON_PRESETCTRL0_ADC_RST_N_MASK);
-    SYSCON->PRESETCTRL0 |= (SYSCON_PRESETCTRL0_ADC_RST_N_MASK);
-    SYSCON->SYSAHBCLKCTRL0 |= (SYSCON_SYSAHBCLKCTRL0_ADC_MASK); /* Enable Clock to ADC */
-    SYSCON->ADCCLKDIV = 1;                                      // Enable clock, and divide-by-1 at this clock divider
-    SYSCON->ADCCLKSEL = 0;                                      // Use fro_clk as source for ADC async clock
-
-    temp = ADC->CTRL;
-    // Step 2. Perform a self-calibration
-    // Choose a CLKDIV divider value that yields about 500 KHz.
-    // clkdiv = (FRO_CLK / 500000) - 1;
-
-    ADC->CTRL = temp;                              /*REstroe ADC setting*/
-    ADC->CTRL |= 0x1;                              /*Clock Divider 2*/
-    ADC->SEQ_CTRL[0] |= ADC_SEQ_CTRL_TRIGPOL_MASK; // polarity of triger
-
-    // TODO Some macro for easy edit?
-    SWM0->PINENABLE0 &= ~(SWM_PINENABLE0_ADC_0_MASK | SWM_PINENABLE0_ADC_3_MASK | SWM_PINENABLE0_ADC_7_MASK);
-}
-
-/* Configure UART0 for "brate" baud
- *
- **********************************************************/
-void SerialInit(void)
-{
-    usart_config_t config;
-
-    /* Select the main clock as source clock of USART0 (debug console) */
-    CLOCK_Select(BOARD_DEBUG_USART_CLK_ATTACH);
-
-    /* Board initialization */
-    BOARD_InitPins();
-    /*
-     *   usartConfig->baudRate_Bps = UART_BAUD_RATE;
-     *   usartConfig->parityMode = kUSART_ParityDisabled;
-     *   usartConfig->stopBitCount = kUSART_OneStopBit;
-     *   usartConfig->bitCountPerChar = kUSART_8BitsPerChar;
-     *   usartConfig->loopback = false;
-     *   usartConfig->enableTx = false;
-     *   usartConfig->enableRx = false;
-     */
-    USART_GetDefaultConfig(&config);
-    /* Override the Default configuration to satisfy FreeMASTER needs */
-    config.baudRate_Bps = UART_BAUD_RATE;
-    config.enableTx     = false;
-    config.enableRx     = false;
-
-    USART_Init((USART_Type *)BOARD_DEBUG_USART_BASEADDR, &config, BOARD_DEBUG_USART_CLK_FREQ);
-
-#if FMSTR_SERIAL_ENABLE
-    /* Register communication module used by FreeMASTER driver. */
-    FMSTR_SerialSetBaseAddress((USART_Type *)BOARD_DEBUG_USART_BASEADDR);
-
-#if FMSTR_SHORT_INTR || FMSTR_LONG_INTR
-    /* Enable UART interrupts. */
-    EnableIRQ(BOARD_UART_IRQ);
-    EnableGlobalIRQ(0);
-#endif
-
-#endif // FMSTR_SERIAL_ENABLE
-}

boards/lpcxpresso804/demo_apps/safety_iec60730b/project_setup_lpcxpresso804.h

@@ -1,48 +0,0 @@
-/*
- * Copyright 2021 NXP.
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef _PROJECT_SETUP_H_
-#define _PROJECT_SETUP_H_
-
-#include "safety_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*!
- * @name Project setup functions
- * @{
- */
-/*******************************************************************************
- * API
- ******************************************************************************/
-void WatchdogEnable(uint32_t wd_setup_value);
-void WatchdogDisable(void);
-void CTIMERInit(void);
-void ReferenceTimerInit(void); /* Second timer for CLOCK TEST */
-void SystickInit(uint32_t reloadValue);
-void ClockInit(void);
-void PortInit(uint8_t *pByte,
-              uint32_t *pDir,
-              uint32_t *pIocon,
-              uint32_t pinDir,
-              uint32_t pinNum,
-              uint32_t pull,
-              uint32_t clockEnableShift);
-void AdcInit(void);
-void SerialInit(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _PROJECT_SETUP_H_ */

boards/lpcxpresso804/demo_apps/safety_iec60730b/readme.txt

@@ -1,12 +0,0 @@
-Overview
-========
-This application demonstrates use of certified NXP Safety Library 4.0 which meets the IEC60730 class B standard.
-
-More information
-================
-- All important documents (library/application user's guide, release note and certificate) are in SDK install folder\docs\safety\.
-- For more information see webpage: www.nxp.com/iec60730.
-
-Running the demo
-================
-- Follow Safety example user's guide \docs\safety\IEC60730BLPC8XXSEUG.pdf.