2015-08-22 16:36:52 +00:00
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/***************************************************************************
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* Copyright (C) 2015 by Uwe Bonnes *
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* bon@elektron.ikp.physik.tu-darmstadt.de *
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2020-01-05 22:19:41 +00:00
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* *
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* Copyright (C) 2019 by Tarek Bochkati for STMicroelectronics *
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* tarek.bouchkati@gmail.com *
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* *
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2015-08-22 16:36:52 +00:00
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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2016-05-16 20:41:00 +00:00
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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2015-08-22 16:36:52 +00:00
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "imp.h"
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#include <helper/binarybuffer.h>
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#include <target/algorithm.h>
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#include <target/armv7m.h>
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2020-01-05 22:19:41 +00:00
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#include "bits.h"
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2015-08-22 16:36:52 +00:00
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/* STM32L4xxx series for reference.
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*
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2017-05-04 10:43:08 +00:00
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* RM0351 (STM32L4x5/STM32L4x6)
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* http://www.st.com/resource/en/reference_manual/dm00083560.pdf
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2015-08-22 16:36:52 +00:00
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*
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2017-05-04 10:43:08 +00:00
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* RM0394 (STM32L43x/44x/45x/46x)
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* http://www.st.com/resource/en/reference_manual/dm00151940.pdf
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2015-08-22 16:36:52 +00:00
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*
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2018-11-23 13:40:39 +00:00
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* RM0432 (STM32L4R/4Sxx)
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* http://www.st.com/resource/en/reference_manual/dm00310109.pdf
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*
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2017-05-04 10:43:08 +00:00
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* STM32L476RG Datasheet (for erase timing)
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* http://www.st.com/resource/en/datasheet/stm32l476rg.pdf
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2015-08-22 16:36:52 +00:00
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*
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2017-05-04 10:43:08 +00:00
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* The RM0351 devices have normally two banks, but on 512 and 256 kiB devices
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* an option byte is available to map all sectors to the first bank.
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2015-08-22 16:36:52 +00:00
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* Both STM32 banks are treated as one OpenOCD bank, as other STM32 devices
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* handlers do!
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*
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2017-05-04 10:43:08 +00:00
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* RM0394 devices have a single bank only.
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*
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2018-11-23 13:40:39 +00:00
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* RM0432 devices have single and dual bank operating modes.
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2020-01-06 17:33:42 +00:00
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* - for STM32L4R/Sxx the FLASH size is 2Mbyte or 1Mbyte.
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* - for STM32L4P/Q5x the FLASH size is 1Mbyte or 512Kbyte.
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2018-11-23 13:40:39 +00:00
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* Bank page (sector) size is 4Kbyte (dual mode) or 8Kbyte (single mode).
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*
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* Bank mode is controlled by two different bits in option bytes register.
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2020-01-06 17:33:42 +00:00
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* - for STM32L4R/Sxx
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* In 2M FLASH devices bit 22 (DBANK) controls Dual Bank mode.
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* In 1M FLASH devices bit 21 (DB1M) controls Dual Bank mode.
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* - for STM32L4P5/Q5x
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* In 1M FLASH devices bit 22 (DBANK) controls Dual Bank mode.
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* In 512K FLASH devices bit 21 (DB512K) controls Dual Bank mode.
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2018-11-23 13:40:39 +00:00
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*
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2015-08-22 16:36:52 +00:00
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*/
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/* Erase time can be as high as 25ms, 10x this and assume it's toast... */
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#define FLASH_ERASE_TIMEOUT 250
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2020-01-05 22:19:41 +00:00
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/* Flash registers offsets */
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#define STM32_FLASH_ACR 0x00
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#define STM32_FLASH_KEYR 0x08
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#define STM32_FLASH_OPTKEYR 0x0c
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#define STM32_FLASH_SR 0x10
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#define STM32_FLASH_CR 0x14
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#define STM32_FLASH_OPTR 0x20
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#define STM32_FLASH_WRP1AR 0x2c
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#define STM32_FLASH_WRP1BR 0x30
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#define STM32_FLASH_WRP2AR 0x4c
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#define STM32_FLASH_WRP2BR 0x50
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2015-08-22 16:36:52 +00:00
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/* FLASH_CR register bits */
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2020-01-05 22:19:41 +00:00
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#define FLASH_PG (1 << 0)
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#define FLASH_PER (1 << 1)
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#define FLASH_MER1 (1 << 2)
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#define FLASH_PAGE_SHIFT 3
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#define FLASH_CR_BKER (1 << 11)
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#define FLASH_MER2 (1 << 15)
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#define FLASH_STRT (1 << 16)
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#define FLASH_OPTSTRT (1 << 17)
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#define FLASH_EOPIE (1 << 24)
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#define FLASH_ERRIE (1 << 25)
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2018-08-16 12:04:45 +00:00
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#define FLASH_OBLLAUNCH (1 << 27)
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2020-01-05 22:19:41 +00:00
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#define FLASH_OPTLOCK (1 << 30)
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#define FLASH_LOCK (1 << 31)
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2015-08-22 16:36:52 +00:00
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/* FLASH_SR register bits */
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#define FLASH_BSY (1 << 16)
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/* Fast programming not used => related errors not used*/
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#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
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2018-11-23 13:40:39 +00:00
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#define FLASH_SIZERR (1 << 6) /* Size error */
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2015-08-22 16:36:52 +00:00
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#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
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#define FLASH_WRPERR (1 << 4) /* Write protection error */
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#define FLASH_PROGERR (1 << 3) /* Programming error */
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#define FLASH_OPERR (1 << 1) /* Operation error */
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#define FLASH_EOP (1 << 0) /* End of operation */
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2019-12-14 17:55:01 +00:00
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#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
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2015-08-22 16:36:52 +00:00
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/* register unlock keys */
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#define KEY1 0x45670123
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#define KEY2 0xCDEF89AB
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/* option register unlock key */
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#define OPTKEY1 0x08192A3B
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#define OPTKEY2 0x4C5D6E7F
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2018-08-16 12:04:45 +00:00
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#define RDP_LEVEL_0 0xAA
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#define RDP_LEVEL_1 0xBB
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#define RDP_LEVEL_2 0xCC
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2015-08-22 16:36:52 +00:00
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/* other registers */
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#define DBGMCU_IDCODE 0xE0042000
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2020-01-05 22:19:41 +00:00
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struct stm32l4_rev {
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const uint16_t rev;
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const char *str;
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};
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struct stm32l4_part_info {
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uint16_t id;
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const char *device_str;
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const struct stm32l4_rev *revs;
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const size_t num_revs;
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const uint16_t max_flash_size_kb;
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const bool has_dual_bank;
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const uint32_t flash_regs_base;
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const uint32_t fsize_addr;
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};
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2015-08-22 16:36:52 +00:00
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struct stm32l4_flash_bank {
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int probed;
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2020-01-05 22:19:41 +00:00
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uint32_t idcode;
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int bank1_sectors;
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bool dual_bank_mode;
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int hole_sectors;
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const struct stm32l4_part_info *part_info;
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2015-08-22 16:36:52 +00:00
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};
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2020-01-05 22:19:41 +00:00
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static const struct stm32l4_rev stm32_415_revs[] = {
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{ 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" }
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};
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static const struct stm32l4_rev stm32_435_revs[] = {
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{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" },
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};
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static const struct stm32l4_rev stm32_461_revs[] = {
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{ 0x1000, "A" }, { 0x2000, "B" },
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};
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static const struct stm32l4_rev stm32_462_revs[] = {
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{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" },
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};
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2020-01-06 14:47:09 +00:00
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static const struct stm32l4_rev stm32_464_revs[] = {
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{ 0x1000, "A" },
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};
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2020-01-05 22:19:41 +00:00
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static const struct stm32l4_rev stm32_470_revs[] = {
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{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x100F, "W" },
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};
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2020-01-06 17:33:42 +00:00
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static const struct stm32l4_rev stm32_471_revs[] = {
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{ 0x1000, "1" },
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};
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2020-01-06 16:19:31 +00:00
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static const struct stm32l4_rev stm32_495_revs[] = {
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{ 0x2001, "2.1" },
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};
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2020-01-05 22:19:41 +00:00
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static const struct stm32l4_part_info stm32l4_parts[] = {
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{
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.id = 0x415,
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.revs = stm32_415_revs,
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.num_revs = ARRAY_SIZE(stm32_415_revs),
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.device_str = "STM32L47/L48xx",
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.max_flash_size_kb = 1024,
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.has_dual_bank = true,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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{
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.id = 0x435,
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.revs = stm32_435_revs,
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.num_revs = ARRAY_SIZE(stm32_435_revs),
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.device_str = "STM32L43/L44xx",
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.max_flash_size_kb = 256,
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.has_dual_bank = false,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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{
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.id = 0x461,
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.revs = stm32_461_revs,
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.num_revs = ARRAY_SIZE(stm32_461_revs),
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.device_str = "STM32L49/L4Axx",
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.max_flash_size_kb = 1024,
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.has_dual_bank = true,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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{
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.id = 0x462,
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.revs = stm32_462_revs,
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.num_revs = ARRAY_SIZE(stm32_462_revs),
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.device_str = "STM32L45/L46xx",
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.max_flash_size_kb = 512,
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.has_dual_bank = false,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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2020-01-06 14:47:09 +00:00
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{
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.id = 0x464,
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.revs = stm32_464_revs,
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.num_revs = ARRAY_SIZE(stm32_464_revs),
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.device_str = "STM32L41/L42xx",
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.max_flash_size_kb = 128,
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.has_dual_bank = false,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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2020-01-05 22:19:41 +00:00
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{
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.id = 0x470,
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.revs = stm32_470_revs,
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.num_revs = ARRAY_SIZE(stm32_470_revs),
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.device_str = "STM32L4R/L4Sxx",
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.max_flash_size_kb = 2048,
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.has_dual_bank = true,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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2020-01-06 17:33:42 +00:00
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{
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.id = 0x471,
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.revs = stm32_471_revs,
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.num_revs = ARRAY_SIZE(stm32_471_revs),
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.device_str = "STM32L4P5/L4Q5x",
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.max_flash_size_kb = 1024,
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.has_dual_bank = true,
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.flash_regs_base = 0x40022000,
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.fsize_addr = 0x1FFF75E0,
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},
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2020-01-06 16:19:31 +00:00
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{
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.id = 0x495,
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.revs = stm32_495_revs,
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.num_revs = ARRAY_SIZE(stm32_495_revs),
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.device_str = "STM32WB5x",
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.max_flash_size_kb = 1024,
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.has_dual_bank = false,
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.flash_regs_base = 0x58004000,
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.fsize_addr = 0x1FFF75E0,
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},
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2020-01-05 22:19:41 +00:00
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};
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/* flash bank stm32l4x <base> <size> 0 0 <target#> */
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2015-08-22 16:36:52 +00:00
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FLASH_BANK_COMMAND_HANDLER(stm32l4_flash_bank_command)
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{
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struct stm32l4_flash_bank *stm32l4_info;
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if (CMD_ARGC < 6)
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return ERROR_COMMAND_SYNTAX_ERROR;
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stm32l4_info = malloc(sizeof(struct stm32l4_flash_bank));
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if (!stm32l4_info)
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return ERROR_FAIL; /* Checkme: What better error to use?*/
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bank->driver_priv = stm32l4_info;
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2019-12-14 15:08:32 +00:00
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/* The flash write must be aligned to a double word (8-bytes) boundary.
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* Ask the flash infrastructure to ensure required alignment */
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bank->write_start_alignment = bank->write_end_alignment = 8;
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2015-08-22 16:36:52 +00:00
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stm32l4_info->probed = 0;
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return ERROR_OK;
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}
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2020-01-05 22:19:41 +00:00
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static inline uint32_t stm32l4_get_flash_reg(struct flash_bank *bank, uint32_t reg_offset)
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2015-08-22 16:36:52 +00:00
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{
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2020-01-05 22:19:41 +00:00
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struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
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return stm32l4_info->part_info->flash_regs_base + reg_offset;
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2015-08-22 16:36:52 +00:00
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}
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2020-01-05 22:19:41 +00:00
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static inline int stm32l4_read_flash_reg(struct flash_bank *bank, uint32_t reg_offset, uint32_t *value)
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2015-08-22 16:36:52 +00:00
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{
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2020-01-05 22:19:41 +00:00
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|
|
return target_read_u32(bank->target, stm32l4_get_flash_reg(bank, reg_offset), value);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int stm32l4_write_flash_reg(struct flash_bank *bank, uint32_t reg_offset, uint32_t value)
|
|
|
|
{
|
|
|
|
return target_write_u32(bank->target, stm32l4_get_flash_reg(bank, reg_offset), value);
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_wait_status_busy(struct flash_bank *bank, int timeout)
|
|
|
|
{
|
|
|
|
uint32_t status;
|
|
|
|
int retval = ERROR_OK;
|
|
|
|
|
|
|
|
/* wait for busy to clear */
|
|
|
|
for (;;) {
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_SR, &status);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
LOG_DEBUG("status: 0x%" PRIx32 "", status);
|
|
|
|
if ((status & FLASH_BSY) == 0)
|
|
|
|
break;
|
|
|
|
if (timeout-- <= 0) {
|
|
|
|
LOG_ERROR("timed out waiting for flash");
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
alive_sleep(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
if (status & FLASH_WRPERR) {
|
|
|
|
LOG_ERROR("stm32x device protected");
|
|
|
|
retval = ERROR_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Clear but report errors */
|
|
|
|
if (status & FLASH_ERROR) {
|
2018-05-14 18:56:56 +00:00
|
|
|
if (retval == ERROR_OK)
|
|
|
|
retval = ERROR_FAIL;
|
2015-08-22 16:36:52 +00:00
|
|
|
/* If this operation fails, we ignore it and report the original
|
|
|
|
* retval
|
|
|
|
*/
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_write_flash_reg(bank, STM32_FLASH_SR, status & FLASH_ERROR);
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
2020-01-05 22:19:41 +00:00
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
static int stm32l4_unlock_reg(struct flash_bank *bank)
|
2015-08-22 16:36:52 +00:00
|
|
|
{
|
|
|
|
uint32_t ctrl;
|
|
|
|
|
|
|
|
/* first check if not already unlocked
|
|
|
|
* otherwise writing on STM32_FLASH_KEYR will fail
|
|
|
|
*/
|
2020-01-05 22:19:41 +00:00
|
|
|
int retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
if ((ctrl & FLASH_LOCK) == 0)
|
|
|
|
return ERROR_OK;
|
|
|
|
|
|
|
|
/* unlock flash registers */
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_KEYR, KEY1);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_KEYR, KEY2);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
if (ctrl & FLASH_LOCK) {
|
|
|
|
LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
|
|
|
|
return ERROR_TARGET_FAILURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
static int stm32l4_unlock_option_reg(struct flash_bank *bank)
|
2015-08-22 16:36:52 +00:00
|
|
|
{
|
|
|
|
uint32_t ctrl;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
int retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
if ((ctrl & FLASH_OPTLOCK) == 0)
|
|
|
|
return ERROR_OK;
|
|
|
|
|
|
|
|
/* unlock option registers */
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_OPTKEYR, OPTKEY1);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_OPTKEYR, OPTKEY2);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_CR, &ctrl);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
if (ctrl & FLASH_OPTLOCK) {
|
|
|
|
LOG_ERROR("options not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
|
|
|
|
return ERROR_TARGET_FAILURE;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
static int stm32l4_write_option(struct flash_bank *bank, uint32_t reg_offset, uint32_t value, uint32_t mask)
|
2018-08-16 12:04:45 +00:00
|
|
|
{
|
|
|
|
uint32_t optiondata;
|
2019-12-14 18:37:41 +00:00
|
|
|
int retval, retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
retval = stm32l4_read_flash_reg(bank, reg_offset, &optiondata);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_reg(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_option_reg(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
optiondata = (optiondata & ~mask) | (value & mask);
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, reg_offset, optiondata);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_OPTSTRT);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
|
2019-12-14 18:37:41 +00:00
|
|
|
|
|
|
|
err_lock:
|
|
|
|
retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK | FLASH_OPTLOCK);
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
2018-08-16 12:04:45 +00:00
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
return retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_protect_check(struct flash_bank *bank)
|
|
|
|
{
|
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
2020-01-05 22:19:41 +00:00
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
uint32_t wrp1ar, wrp1br, wrp2ar, wrp2br;
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_read_flash_reg(bank, STM32_FLASH_WRP1AR, &wrp1ar);
|
|
|
|
stm32l4_read_flash_reg(bank, STM32_FLASH_WRP1BR, &wrp1br);
|
|
|
|
stm32l4_read_flash_reg(bank, STM32_FLASH_WRP2AR, &wrp2ar);
|
|
|
|
stm32l4_read_flash_reg(bank, STM32_FLASH_WRP2BR, &wrp2br);
|
2018-08-16 12:04:45 +00:00
|
|
|
|
|
|
|
const uint8_t wrp1a_start = wrp1ar & 0xFF;
|
|
|
|
const uint8_t wrp1a_end = (wrp1ar >> 16) & 0xFF;
|
|
|
|
const uint8_t wrp1b_start = wrp1br & 0xFF;
|
|
|
|
const uint8_t wrp1b_end = (wrp1br >> 16) & 0xFF;
|
|
|
|
const uint8_t wrp2a_start = wrp2ar & 0xFF;
|
|
|
|
const uint8_t wrp2a_end = (wrp2ar >> 16) & 0xFF;
|
|
|
|
const uint8_t wrp2b_start = wrp2br & 0xFF;
|
|
|
|
const uint8_t wrp2b_end = (wrp2br >> 16) & 0xFF;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
for (int i = 0; i < bank->num_sectors; i++) {
|
2020-01-05 22:19:41 +00:00
|
|
|
if (i < stm32l4_info->bank1_sectors) {
|
2018-08-16 12:04:45 +00:00
|
|
|
if (((i >= wrp1a_start) &&
|
|
|
|
(i <= wrp1a_end)) ||
|
|
|
|
((i >= wrp1b_start) &&
|
|
|
|
(i <= wrp1b_end)))
|
2015-08-22 16:36:52 +00:00
|
|
|
bank->sectors[i].is_protected = 1;
|
|
|
|
else
|
|
|
|
bank->sectors[i].is_protected = 0;
|
|
|
|
} else {
|
|
|
|
uint8_t snb;
|
2020-01-05 22:19:41 +00:00
|
|
|
snb = i - stm32l4_info->bank1_sectors;
|
2018-08-16 12:04:45 +00:00
|
|
|
if (((snb >= wrp2a_start) &&
|
|
|
|
(snb <= wrp2a_end)) ||
|
|
|
|
((snb >= wrp2b_start) &&
|
|
|
|
(snb <= wrp2b_end)))
|
2015-08-22 16:36:52 +00:00
|
|
|
bank->sectors[i].is_protected = 1;
|
|
|
|
else
|
|
|
|
bank->sectors[i].is_protected = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_erase(struct flash_bank *bank, int first, int last)
|
|
|
|
{
|
2020-01-05 22:19:41 +00:00
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
2015-08-22 16:36:52 +00:00
|
|
|
int i;
|
2019-12-14 18:37:41 +00:00
|
|
|
int retval, retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
assert(first < bank->num_sectors);
|
|
|
|
assert(last < bank->num_sectors);
|
|
|
|
|
|
|
|
if (bank->target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_reg(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
Sector Erase
|
|
|
|
To erase a sector, follow the procedure below:
|
|
|
|
1. Check that no Flash memory operation is ongoing by
|
|
|
|
checking the BSY bit in the FLASH_SR register
|
|
|
|
2. Set the PER bit and select the page and bank
|
2018-11-23 13:40:39 +00:00
|
|
|
you wish to erase in the FLASH_CR register
|
2015-08-22 16:36:52 +00:00
|
|
|
3. Set the STRT bit in the FLASH_CR register
|
|
|
|
4. Wait for the BSY bit to be cleared
|
|
|
|
*/
|
|
|
|
|
|
|
|
for (i = first; i <= last; i++) {
|
|
|
|
uint32_t erase_flags;
|
|
|
|
erase_flags = FLASH_PER | FLASH_STRT;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
if (i >= stm32l4_info->bank1_sectors) {
|
2015-08-22 16:36:52 +00:00
|
|
|
uint8_t snb;
|
2020-01-05 22:19:41 +00:00
|
|
|
snb = i - stm32l4_info->bank1_sectors;
|
2015-08-22 16:36:52 +00:00
|
|
|
erase_flags |= snb << FLASH_PAGE_SHIFT | FLASH_CR_BKER;
|
|
|
|
} else
|
|
|
|
erase_flags |= i << FLASH_PAGE_SHIFT;
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, erase_flags);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
break;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
|
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
break;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
bank->sectors[i].is_erased = 1;
|
|
|
|
}
|
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
err_lock:
|
|
|
|
retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
return retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_protect(struct flash_bank *bank, int set, int first, int last)
|
|
|
|
{
|
|
|
|
struct target *target = bank->target;
|
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
|
|
|
|
|
|
|
if (target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
int ret = ERROR_OK;
|
|
|
|
/* Bank 2 */
|
|
|
|
uint32_t reg_value = 0xFF; /* Default to bank un-protected */
|
2020-01-05 22:19:41 +00:00
|
|
|
if (last >= stm32l4_info->bank1_sectors) {
|
2018-08-16 12:04:45 +00:00
|
|
|
if (set == 1) {
|
2020-01-05 22:19:41 +00:00
|
|
|
uint8_t begin = first > stm32l4_info->bank1_sectors ? first : 0x00;
|
2018-08-16 12:04:45 +00:00
|
|
|
reg_value = ((last & 0xFF) << 16) | begin;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = stm32l4_write_option(bank, STM32_FLASH_WRP2AR, reg_value, 0xffffffff);
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
2018-08-16 12:04:45 +00:00
|
|
|
/* Bank 1 */
|
|
|
|
reg_value = 0xFF; /* Default to bank un-protected */
|
2020-01-05 22:19:41 +00:00
|
|
|
if (first < stm32l4_info->bank1_sectors) {
|
2018-08-16 12:04:45 +00:00
|
|
|
if (set == 1) {
|
2020-01-05 22:19:41 +00:00
|
|
|
uint8_t end = last >= stm32l4_info->bank1_sectors ? 0xFF : last;
|
2018-08-16 12:04:45 +00:00
|
|
|
reg_value = (end << 16) | (first & 0xFF);
|
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
ret = stm32l4_write_option(bank, STM32_FLASH_WRP1AR, reg_value, 0xffffffff);
|
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
return ret;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
2019-12-14 17:55:01 +00:00
|
|
|
/* Count is in double-words */
|
2015-08-22 16:36:52 +00:00
|
|
|
static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
|
|
|
|
uint32_t offset, uint32_t count)
|
|
|
|
{
|
|
|
|
struct target *target = bank->target;
|
2020-01-05 22:19:41 +00:00
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
2015-08-22 16:36:52 +00:00
|
|
|
uint32_t buffer_size = 16384;
|
|
|
|
struct working_area *write_algorithm;
|
|
|
|
struct working_area *source;
|
|
|
|
uint32_t address = bank->base + offset;
|
|
|
|
struct reg_param reg_params[5];
|
|
|
|
struct armv7m_algorithm armv7m_info;
|
|
|
|
int retval = ERROR_OK;
|
|
|
|
|
|
|
|
static const uint8_t stm32l4_flash_write_code[] = {
|
2018-03-01 21:57:08 +00:00
|
|
|
#include "../../../contrib/loaders/flash/stm32/stm32l4x.inc"
|
2015-08-22 16:36:52 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
if (target_alloc_working_area(target, sizeof(stm32l4_flash_write_code),
|
|
|
|
&write_algorithm) != ERROR_OK) {
|
|
|
|
LOG_WARNING("no working area available, can't do block memory writes");
|
|
|
|
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
|
2016-02-28 20:21:40 +00:00
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
retval = target_write_buffer(target, write_algorithm->address,
|
|
|
|
sizeof(stm32l4_flash_write_code),
|
|
|
|
stm32l4_flash_write_code);
|
2018-05-14 20:06:39 +00:00
|
|
|
if (retval != ERROR_OK) {
|
|
|
|
target_free_working_area(target, write_algorithm);
|
2015-08-22 16:36:52 +00:00
|
|
|
return retval;
|
2018-05-14 20:06:39 +00:00
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
/* memory buffer */
|
|
|
|
while (target_alloc_working_area_try(target, buffer_size, &source) !=
|
|
|
|
ERROR_OK) {
|
|
|
|
buffer_size /= 2;
|
|
|
|
if (buffer_size <= 256) {
|
|
|
|
/* we already allocated the writing code, but failed to get a
|
|
|
|
* buffer, free the algorithm */
|
|
|
|
target_free_working_area(target, write_algorithm);
|
|
|
|
|
2018-11-23 13:40:39 +00:00
|
|
|
LOG_WARNING("large enough working area not available, can't do block memory writes");
|
2015-08-22 16:36:52 +00:00
|
|
|
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
|
|
|
|
}
|
2016-02-28 20:21:40 +00:00
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
|
|
|
|
armv7m_info.core_mode = ARM_MODE_THREAD;
|
|
|
|
|
|
|
|
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
|
|
|
|
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
|
|
|
|
init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
|
|
|
|
init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (double word-64bit) */
|
2019-12-14 17:55:01 +00:00
|
|
|
init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash regs base */
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
buf_set_u32(reg_params[0].value, 0, 32, source->address);
|
|
|
|
buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
|
|
|
|
buf_set_u32(reg_params[2].value, 0, 32, address);
|
2019-12-14 17:55:01 +00:00
|
|
|
buf_set_u32(reg_params[3].value, 0, 32, count);
|
2020-01-05 22:19:41 +00:00
|
|
|
buf_set_u32(reg_params[4].value, 0, 32, stm32l4_info->part_info->flash_regs_base);
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2019-12-14 17:55:01 +00:00
|
|
|
retval = target_run_flash_async_algorithm(target, buffer, count, 8,
|
2015-08-22 16:36:52 +00:00
|
|
|
0, NULL,
|
|
|
|
5, reg_params,
|
|
|
|
source->address, source->size,
|
|
|
|
write_algorithm->address, 0,
|
|
|
|
&armv7m_info);
|
|
|
|
|
|
|
|
if (retval == ERROR_FLASH_OPERATION_FAILED) {
|
|
|
|
LOG_ERROR("error executing stm32l4 flash write algorithm");
|
|
|
|
|
|
|
|
uint32_t error = buf_get_u32(reg_params[0].value, 0, 32) & FLASH_ERROR;
|
|
|
|
|
|
|
|
if (error & FLASH_WRPERR)
|
|
|
|
LOG_ERROR("flash memory write protected");
|
|
|
|
|
|
|
|
if (error != 0) {
|
|
|
|
LOG_ERROR("flash write failed = %08" PRIx32, error);
|
|
|
|
/* Clear but report errors */
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_write_flash_reg(bank, STM32_FLASH_SR, error);
|
2015-08-22 16:36:52 +00:00
|
|
|
retval = ERROR_FAIL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
target_free_working_area(target, source);
|
|
|
|
target_free_working_area(target, write_algorithm);
|
|
|
|
|
|
|
|
destroy_reg_param(®_params[0]);
|
|
|
|
destroy_reg_param(®_params[1]);
|
|
|
|
destroy_reg_param(®_params[2]);
|
|
|
|
destroy_reg_param(®_params[3]);
|
|
|
|
destroy_reg_param(®_params[4]);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer,
|
|
|
|
uint32_t offset, uint32_t count)
|
|
|
|
{
|
2019-12-14 17:55:01 +00:00
|
|
|
int retval, retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
if (bank->target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2019-12-14 15:08:32 +00:00
|
|
|
/* The flash write must be aligned to a double word (8-bytes) boundary.
|
|
|
|
* The flash infrastructure ensures it, do just a security check */
|
|
|
|
assert(offset % 8 == 0);
|
|
|
|
assert(count % 8 == 0);
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_reg(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2019-12-14 17:55:01 +00:00
|
|
|
retval = stm32l4_write_block(bank, buffer, offset, count / 8);
|
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
err_lock:
|
2019-12-14 17:55:01 +00:00
|
|
|
retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK) {
|
2019-12-14 17:55:01 +00:00
|
|
|
LOG_ERROR("block write failed");
|
2015-08-22 16:36:52 +00:00
|
|
|
return retval;
|
2020-01-05 22:19:41 +00:00
|
|
|
}
|
2019-12-14 17:55:01 +00:00
|
|
|
return retval2;
|
2020-01-05 22:19:41 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id)
|
|
|
|
{
|
|
|
|
int retval = target_read_u32(bank->target, DBGMCU_IDCODE, id);
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
return retval;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_probe(struct flash_bank *bank)
|
|
|
|
{
|
|
|
|
struct target *target = bank->target;
|
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
2020-01-05 22:19:41 +00:00
|
|
|
const struct stm32l4_part_info *part_info;
|
2015-08-22 16:36:52 +00:00
|
|
|
int i;
|
|
|
|
uint16_t flash_size_in_kb = 0xffff;
|
|
|
|
uint32_t device_id;
|
|
|
|
uint32_t options;
|
|
|
|
|
|
|
|
stm32l4_info->probed = 0;
|
|
|
|
|
|
|
|
/* read stm32 device id register */
|
2020-01-05 22:19:41 +00:00
|
|
|
int retval = stm32l4_read_idcode(bank, &stm32l4_info->idcode);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
device_id = stm32l4_info->idcode & 0xFFF;
|
|
|
|
|
|
|
|
for (unsigned int n = 0; n < ARRAY_SIZE(stm32l4_parts); n++) {
|
|
|
|
if (device_id == stm32l4_parts[n].id)
|
|
|
|
stm32l4_info->part_info = &stm32l4_parts[n];
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!stm32l4_info->part_info) {
|
2020-01-06 16:19:31 +00:00
|
|
|
LOG_WARNING("Cannot identify target as an STM32 L4 or WB family device.");
|
2015-08-22 16:36:52 +00:00
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
part_info = stm32l4_info->part_info;
|
|
|
|
|
|
|
|
char device_info[1024];
|
|
|
|
retval = bank->driver->info(bank, device_info, sizeof(device_info));
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
LOG_INFO("device idcode = 0x%08" PRIx32 " (%s)", stm32l4_info->idcode, device_info);
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
/* get flash size from target. */
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = target_read_u16(target, part_info->fsize_addr, &flash_size_in_kb);
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2016-05-22 14:51:34 +00:00
|
|
|
/* failed reading flash size or flash size invalid (early silicon),
|
|
|
|
* default to max target family */
|
2020-01-05 22:19:41 +00:00
|
|
|
if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0
|
|
|
|
|| flash_size_in_kb > part_info->max_flash_size_kb) {
|
2016-05-22 14:51:34 +00:00
|
|
|
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
|
2020-01-05 22:19:41 +00:00
|
|
|
part_info->max_flash_size_kb);
|
|
|
|
flash_size_in_kb = part_info->max_flash_size_kb;
|
2016-05-22 14:51:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
|
|
|
|
|
2018-11-23 13:40:39 +00:00
|
|
|
/* did we assign a flash size? */
|
|
|
|
assert((flash_size_in_kb != 0xffff) && flash_size_in_kb);
|
2016-05-22 14:51:34 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
/* read flash option register */
|
|
|
|
retval = stm32l4_read_flash_reg(bank, STM32_FLASH_OPTR, &options);
|
2018-01-17 21:07:29 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_info->bank1_sectors = 0;
|
|
|
|
stm32l4_info->hole_sectors = 0;
|
|
|
|
|
2018-11-23 13:40:39 +00:00
|
|
|
int num_pages = 0;
|
|
|
|
int page_size = 0;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_info->dual_bank_mode = false;
|
|
|
|
|
|
|
|
switch (device_id) {
|
|
|
|
case 0x415:
|
|
|
|
case 0x461:
|
|
|
|
/* if flash size is max (1M) the device is always dual bank
|
|
|
|
* 0x415: has variants with 512K
|
|
|
|
* 0x461: has variants with 512 and 256
|
|
|
|
* for these variants:
|
|
|
|
* if DUAL_BANK = 0 -> single bank
|
|
|
|
* else -> dual bank without gap
|
|
|
|
* note: the page size is invariant
|
|
|
|
*/
|
|
|
|
page_size = 2048;
|
|
|
|
num_pages = flash_size_in_kb / 2;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages;
|
|
|
|
|
|
|
|
/* check DUAL_BANK bit[21] if the flash is less than 1M */
|
|
|
|
if (flash_size_in_kb == 1024 || (options & BIT(21))) {
|
|
|
|
stm32l4_info->dual_bank_mode = true;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages / 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x435:
|
|
|
|
case 0x462:
|
2020-01-06 14:47:09 +00:00
|
|
|
case 0x464:
|
2020-01-05 22:19:41 +00:00
|
|
|
/* single bank flash */
|
|
|
|
page_size = 2048;
|
|
|
|
num_pages = flash_size_in_kb / 2;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages;
|
|
|
|
break;
|
|
|
|
case 0x470:
|
2020-01-06 17:33:42 +00:00
|
|
|
case 0x471:
|
2020-01-05 22:19:41 +00:00
|
|
|
/* STM32L4R/S can be single/dual bank:
|
|
|
|
* if size = 2M check DBANK bit(22)
|
|
|
|
* if size = 1M check DB1M bit(21)
|
2020-01-06 17:33:42 +00:00
|
|
|
* STM32L4P/Q can be single/dual bank
|
|
|
|
* if size = 1M check DBANK bit(22)
|
|
|
|
* if size = 512K check DB512K bit(21)
|
2020-01-05 22:19:41 +00:00
|
|
|
* in single bank configuration the page size is 8K
|
|
|
|
* else (dual bank) the page size is 4K without gap between banks
|
|
|
|
*/
|
|
|
|
page_size = 8192;
|
|
|
|
num_pages = flash_size_in_kb / 8;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages;
|
2020-01-06 17:33:42 +00:00
|
|
|
const bool use_dbank_bit = flash_size_in_kb == part_info->max_flash_size_kb;
|
|
|
|
if ((use_dbank_bit && (options & BIT(22))) ||
|
|
|
|
(!use_dbank_bit && (options & BIT(21)))) {
|
2020-01-05 22:19:41 +00:00
|
|
|
stm32l4_info->dual_bank_mode = true;
|
|
|
|
page_size = 4096;
|
|
|
|
num_pages = flash_size_in_kb / 4;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages / 2;
|
|
|
|
}
|
|
|
|
break;
|
2020-01-06 16:19:31 +00:00
|
|
|
case 0x495:
|
|
|
|
/* single bank flash */
|
|
|
|
page_size = 4096;
|
|
|
|
num_pages = flash_size_in_kb / 4;
|
|
|
|
stm32l4_info->bank1_sectors = num_pages;
|
|
|
|
break;
|
2020-01-05 22:19:41 +00:00
|
|
|
default:
|
|
|
|
LOG_ERROR("unsupported device");
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
LOG_INFO("flash mode : %s-bank", stm32l4_info->dual_bank_mode ? "dual" : "single");
|
|
|
|
|
|
|
|
const int gap_size = stm32l4_info->hole_sectors * page_size;
|
|
|
|
|
|
|
|
if (stm32l4_info->dual_bank_mode & gap_size) {
|
|
|
|
LOG_INFO("gap detected starting from %0x08" PRIx32 " to %0x08" PRIx32,
|
|
|
|
0x8000000 + stm32l4_info->bank1_sectors * page_size,
|
|
|
|
0x8000000 + stm32l4_info->bank1_sectors * page_size + gap_size);
|
2018-11-23 13:40:39 +00:00
|
|
|
}
|
2018-08-02 16:59:24 +00:00
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
if (bank->sectors) {
|
|
|
|
free(bank->sectors);
|
|
|
|
bank->sectors = NULL;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
bank->size = flash_size_in_kb * 1024 + gap_size;
|
|
|
|
bank->base = 0x08000000;
|
2015-08-22 16:36:52 +00:00
|
|
|
bank->num_sectors = num_pages;
|
2020-01-05 22:19:41 +00:00
|
|
|
bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
|
|
|
|
if (bank->sectors == NULL) {
|
|
|
|
LOG_ERROR("failed to allocate bank sectors");
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
2015-08-22 16:36:52 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
for (i = 0; i < bank->num_sectors; i++) {
|
2018-11-23 13:40:39 +00:00
|
|
|
bank->sectors[i].offset = i * page_size;
|
2020-01-05 22:19:41 +00:00
|
|
|
/* in dual bank configuration, if there is a gap between banks
|
|
|
|
* we fix up the sector offset to consider this gap */
|
|
|
|
if (i >= stm32l4_info->bank1_sectors && stm32l4_info->hole_sectors)
|
|
|
|
bank->sectors[i].offset += gap_size;
|
2018-11-23 13:40:39 +00:00
|
|
|
bank->sectors[i].size = page_size;
|
2015-08-22 16:36:52 +00:00
|
|
|
bank->sectors[i].is_erased = -1;
|
|
|
|
bank->sectors[i].is_protected = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
stm32l4_info->probed = 1;
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stm32l4_auto_probe(struct flash_bank *bank)
|
|
|
|
{
|
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
|
|
|
if (stm32l4_info->probed)
|
|
|
|
return ERROR_OK;
|
2020-01-05 22:19:41 +00:00
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
return stm32l4_probe(bank);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int get_stm32l4_info(struct flash_bank *bank, char *buf, int buf_size)
|
|
|
|
{
|
2020-01-05 22:19:41 +00:00
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
|
|
|
const struct stm32l4_part_info *part_info = stm32l4_info->part_info;
|
|
|
|
|
|
|
|
if (part_info) {
|
|
|
|
const char *rev_str = NULL;
|
|
|
|
uint16_t rev_id = stm32l4_info->idcode >> 16;
|
|
|
|
for (unsigned int i = 0; i < part_info->num_revs; i++) {
|
|
|
|
if (rev_id == part_info->revs[i].rev) {
|
|
|
|
rev_str = part_info->revs[i].str;
|
|
|
|
|
|
|
|
if (rev_str != NULL) {
|
|
|
|
snprintf(buf, buf_size, "%s - Rev: %s",
|
|
|
|
part_info->device_str, rev_str);
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2016-10-04 08:32:25 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)",
|
|
|
|
part_info->device_str, rev_id);
|
|
|
|
return ERROR_OK;
|
|
|
|
} else {
|
2020-01-06 16:19:31 +00:00
|
|
|
snprintf(buf, buf_size, "Cannot identify target as an STM32 L4 or WB device");
|
2015-08-22 16:36:52 +00:00
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
static int stm32l4_mass_erase(struct flash_bank *bank)
|
2015-08-22 16:36:52 +00:00
|
|
|
{
|
2019-12-14 18:37:41 +00:00
|
|
|
int retval, retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
struct target *target = bank->target;
|
2020-01-05 22:19:41 +00:00
|
|
|
struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
|
|
|
|
|
|
|
|
uint32_t action = FLASH_MER1;
|
|
|
|
|
|
|
|
if (stm32l4_info->part_info->has_dual_bank)
|
|
|
|
action |= FLASH_MER2;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
if (target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_reg(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
/* mass erase flash memory */
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT / 10);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2020-01-05 22:19:41 +00:00
|
|
|
|
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, action);
|
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, action | FLASH_STRT);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
2019-12-14 18:37:41 +00:00
|
|
|
goto err_lock;
|
2015-08-22 16:36:52 +00:00
|
|
|
|
|
|
|
retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
|
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
err_lock:
|
|
|
|
retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
2019-12-14 18:37:41 +00:00
|
|
|
return retval2;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (CMD_ARGC < 1) {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x mass_erase <STM32L4 bank>");
|
2015-08-22 16:36:52 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_mass_erase(bank);
|
2015-08-22 16:36:52 +00:00
|
|
|
if (retval == ERROR_OK) {
|
|
|
|
/* set all sectors as erased */
|
|
|
|
for (i = 0; i < bank->num_sectors; i++)
|
|
|
|
bank->sectors[i].is_erased = 1;
|
|
|
|
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x mass erase complete");
|
2015-08-22 16:36:52 +00:00
|
|
|
} else {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x mass erase failed");
|
2018-08-16 12:04:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
COMMAND_HANDLER(stm32l4_handle_option_read_command)
|
|
|
|
{
|
|
|
|
if (CMD_ARGC < 2) {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x option_read <STM32L4 bank> <option_reg offset>");
|
2018-08-16 12:04:45 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
uint32_t reg_offset, reg_addr;
|
2018-08-16 12:04:45 +00:00
|
|
|
uint32_t value = 0;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
reg_offset = strtoul(CMD_ARGV[1], NULL, 16);
|
|
|
|
reg_addr = stm32l4_get_flash_reg(bank, reg_offset);
|
2018-08-16 12:04:45 +00:00
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_read_flash_reg(bank, reg_offset, &value);
|
2018-08-16 12:04:45 +00:00
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
|
2018-08-16 12:04:45 +00:00
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
COMMAND_HANDLER(stm32l4_handle_option_write_command)
|
|
|
|
{
|
|
|
|
if (CMD_ARGC < 3) {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x option_write <STM32L4 bank> <option_reg offset> <value> [mask]");
|
2018-08-16 12:04:45 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
2015-08-22 16:36:52 +00:00
|
|
|
}
|
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
uint32_t reg_offset;
|
2018-08-16 12:04:45 +00:00
|
|
|
uint32_t value = 0;
|
|
|
|
uint32_t mask = 0xFFFFFFFF;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
reg_offset = strtoul(CMD_ARGV[1], NULL, 16);
|
2018-08-16 12:04:45 +00:00
|
|
|
value = strtoul(CMD_ARGV[2], NULL, 16);
|
|
|
|
if (CMD_ARGC > 3)
|
|
|
|
mask = strtoul(CMD_ARGV[3], NULL, 16);
|
|
|
|
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "%s Option written.\n"
|
2018-08-16 12:04:45 +00:00
|
|
|
"INFO: a reset or power cycle is required "
|
|
|
|
"for the new settings to take effect.", bank->driver->name);
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_option(bank, reg_offset, value, mask);
|
2018-08-16 12:04:45 +00:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
COMMAND_HANDLER(stm32l4_handle_option_load_command)
|
|
|
|
{
|
|
|
|
if (CMD_ARGC < 1)
|
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_reg(bank);
|
2018-08-16 12:04:45 +00:00
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_unlock_option_reg(bank);
|
2018-08-16 12:04:45 +00:00
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
/* Write the OBLLAUNCH bit in CR -> Cause device "POR" and option bytes reload */
|
2020-01-05 22:19:41 +00:00
|
|
|
retval = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_OBLLAUNCH);
|
2018-08-16 12:04:45 +00:00
|
|
|
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "stm32l4x option load (POR) completed.");
|
2015-08-22 16:36:52 +00:00
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2018-08-16 12:04:45 +00:00
|
|
|
COMMAND_HANDLER(stm32l4_handle_lock_command)
|
|
|
|
{
|
|
|
|
struct target *target = NULL;
|
|
|
|
|
|
|
|
if (CMD_ARGC < 1)
|
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
target = bank->target;
|
|
|
|
|
|
|
|
if (target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set readout protection level 1 by erasing the RDP option byte */
|
|
|
|
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, 0, 0x000000FF) != ERROR_OK) {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "%s failed to lock device", bank->driver->name);
|
2018-08-16 12:04:45 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
COMMAND_HANDLER(stm32l4_handle_unlock_command)
|
|
|
|
{
|
|
|
|
struct target *target = NULL;
|
|
|
|
|
|
|
|
if (CMD_ARGC < 1)
|
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
target = bank->target;
|
|
|
|
|
|
|
|
if (target->state != TARGET_HALTED) {
|
|
|
|
LOG_ERROR("Target not halted");
|
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, RDP_LEVEL_0, 0x000000FF) != ERROR_OK) {
|
helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.
Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
's/\(command_print(cmd\)->ctx,/\1,/'
's/\(command_print(CMD\)_CTX,/\1,/'
's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
's/\(command_print_sameline(cmd\)->ctx,/\1,/'
's/\(command_print_sameline(CMD\)_CTX,/\1,/'
's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'
This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.
Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-03 08:37:24 +00:00
|
|
|
command_print(CMD, "%s failed to unlock device", bank->driver->name);
|
2018-08-16 12:04:45 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2015-08-22 16:36:52 +00:00
|
|
|
static const struct command_registration stm32l4_exec_command_handlers[] = {
|
|
|
|
{
|
|
|
|
.name = "lock",
|
|
|
|
.handler = stm32l4_handle_lock_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id",
|
|
|
|
.help = "Lock entire flash device.",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "unlock",
|
|
|
|
.handler = stm32l4_handle_unlock_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id",
|
|
|
|
.help = "Unlock entire protected flash device.",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "mass_erase",
|
|
|
|
.handler = stm32l4_handle_mass_erase_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id",
|
|
|
|
.help = "Erase entire flash device.",
|
|
|
|
},
|
2018-08-16 12:04:45 +00:00
|
|
|
{
|
|
|
|
.name = "option_read",
|
|
|
|
.handler = stm32l4_handle_option_read_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id reg_offset",
|
|
|
|
.help = "Read & Display device option bytes.",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "option_write",
|
|
|
|
.handler = stm32l4_handle_option_write_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id reg_offset value mask",
|
|
|
|
.help = "Write device option bit fields with provided value.",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "option_load",
|
|
|
|
.handler = stm32l4_handle_option_load_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id",
|
|
|
|
.help = "Force re-load of device options (will cause device reset).",
|
|
|
|
},
|
2015-08-22 16:36:52 +00:00
|
|
|
COMMAND_REGISTRATION_DONE
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct command_registration stm32l4_command_handlers[] = {
|
|
|
|
{
|
|
|
|
.name = "stm32l4x",
|
|
|
|
.mode = COMMAND_ANY,
|
|
|
|
.help = "stm32l4x flash command group",
|
|
|
|
.usage = "",
|
|
|
|
.chain = stm32l4_exec_command_handlers,
|
|
|
|
},
|
|
|
|
COMMAND_REGISTRATION_DONE
|
|
|
|
};
|
|
|
|
|
2018-12-13 19:53:59 +00:00
|
|
|
const struct flash_driver stm32l4x_flash = {
|
2015-08-22 16:36:52 +00:00
|
|
|
.name = "stm32l4x",
|
|
|
|
.commands = stm32l4_command_handlers,
|
|
|
|
.flash_bank_command = stm32l4_flash_bank_command,
|
|
|
|
.erase = stm32l4_erase,
|
|
|
|
.protect = stm32l4_protect,
|
|
|
|
.write = stm32l4_write,
|
|
|
|
.read = default_flash_read,
|
|
|
|
.probe = stm32l4_probe,
|
|
|
|
.auto_probe = stm32l4_auto_probe,
|
|
|
|
.erase_check = default_flash_blank_check,
|
|
|
|
.protect_check = stm32l4_protect_check,
|
|
|
|
.info = get_stm32l4_info,
|
2018-02-15 09:25:50 +00:00
|
|
|
.free_driver_priv = default_flash_free_driver_priv,
|
2015-08-22 16:36:52 +00:00
|
|
|
};
|