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flash/nor/efm32: Use Cortex-M 'core_info' field 

Change-Id: I5e477036e5cb7518c35df88878d53261311deb40
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6868
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Marc Schink 2022-03-03 20:35:10 +01:00 committed by Antonio Borneo
parent b6e4d1aa04
commit 1c22c5a82b
1 changed files with 7 additions and 11 deletions
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18
src/flash/nor/efm32.c
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@ -257,23 +257,19 @@ static int efm32x_write_reg_u32(struct flash_bank *bank, target_addr_t offset,
static int efm32x_read_info(struct flash_bank *bank) static int efm32x_read_info(struct flash_bank *bank)
{ {
int ret; int ret;
uint32_t cpuid = 0;
struct efm32x_flash_chip *efm32x_info = bank->driver_priv; struct efm32x_flash_chip *efm32x_info = bank->driver_priv;
struct efm32_info *efm32_info = &(efm32x_info->info); struct efm32_info *efm32_info = &(efm32x_info->info);
memset(efm32_info, 0, sizeof(struct efm32_info)); memset(efm32_info, 0, sizeof(struct efm32_info));
ret = target_read_u32(bank->target, CPUID, &cpuid); const struct cortex_m_common *cortex_m = target_to_cm(bank->target);
if (ret != ERROR_OK)
return ret;
if (((cpuid >> 4) & 0xfff) == 0xc23) { switch (cortex_m->core_info->partno) {
/* Cortex-M3 device */ case CORTEX_M3_PARTNO:
} else if (((cpuid >> 4) & 0xfff) == 0xc24) { case CORTEX_M4_PARTNO:
/* Cortex-M4 device (WONDER GECKO) */ case CORTEX_M0P_PARTNO:
} else if (((cpuid >> 4) & 0xfff) == 0xc60) { break;
/* Cortex-M0+ device */ default:
} else {
LOG_ERROR("Target is not Cortex-Mx Device"); LOG_ERROR("Target is not Cortex-Mx Device");
return ERROR_FAIL; return ERROR_FAIL;
} }