tcl/target: stm32[fl]4x: document the settings for trace

While reviewing on gerrit the change
	https://review.openocd.org/6932/
it get clear that the missing documentation on stm32f4x's code
was triggering errors in the new change.

OpenOCD is currently unable to read traces, but these can be
hopefully be read with some other tool.

Document the settings for enabling trace on stm32[fl]4x.

Change-Id: Ibae77a53de16375d3d500e728678740095547009
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6945
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Antonio Borneo 2022-04-23 16:14:15 +02:00
parent 09ca11066b
commit 386155419b
2 changed files with 8 additions and 0 deletions

View File

@ -100,18 +100,21 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
if { [$_chipname.tpiu cget -protocol] eq "sync" } { if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] { switch [$_chipname.tpiu cget -port-width] {
1 { 1 {
# Set TRACE_IOEN; TRACE_MODE to sync 1 bit; GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0 mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x40021020 0x00000000 0x0000ff00 mmw 0x40021020 0x00000000 0x0000ff00
mmw 0x40021000 0x000000a0 0x000000f0 mmw 0x40021000 0x000000a0 0x000000f0
mmw 0x40021008 0x000000f0 0x00000000 mmw 0x40021008 0x000000f0 0x00000000
} }
2 { 2 {
# Set TRACE_IOEN; TRACE_MODE to sync 2 bit; GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0 mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x40021020 0x00000000 0x000fff00 mmw 0x40021020 0x00000000 0x000fff00
mmw 0x40021000 0x000002a0 0x000003f0 mmw 0x40021000 0x000002a0 0x000003f0
mmw 0x40021008 0x000003f0 0x00000000 mmw 0x40021008 0x000003f0 0x00000000
} }
4 { 4 {
# Set TRACE_IOEN; TRACE_MODE to sync 4 bit; GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0 mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x40021020 0x00000000 0x0fffff00 mmw 0x40021020 0x00000000 0x0fffff00
mmw 0x40021000 0x00002aa0 0x00003ff0 mmw 0x40021000 0x00002aa0 0x00003ff0
@ -119,6 +122,7 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
} }
} }
} else { } else {
# Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0 mmw 0xE0042004 0x00000020 0x000000c0
} }
} }

View File

@ -110,18 +110,21 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
if { [$_chipname.tpiu cget -protocol] eq "sync" } { if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] { switch [$_chipname.tpiu cget -port-width] {
1 { 1 {
# Set TRACE_IOEN; TRACE_MODE to sync 1 bit; GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0 mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x48001020 0x00000000 0x0000ff00 mmw 0x48001020 0x00000000 0x0000ff00
mmw 0x48001000 0x000000a0 0x000000f0 mmw 0x48001000 0x000000a0 0x000000f0
mmw 0x48001008 0x000000f0 0x00000000 mmw 0x48001008 0x000000f0 0x00000000
} }
2 { 2 {
# Set TRACE_IOEN; TRACE_MODE to sync 2 bit; GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0 mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x48001020 0x00000000 0x000fff00 mmw 0x48001020 0x00000000 0x000fff00
mmw 0x48001000 0x000002a0 0x000003f0 mmw 0x48001000 0x000002a0 0x000003f0
mmw 0x48001008 0x000003f0 0x00000000 mmw 0x48001008 0x000003f0 0x00000000
} }
4 { 4 {
# Set TRACE_IOEN; TRACE_MODE to sync 4 bit; GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0 mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x48001020 0x00000000 0x0fffff00 mmw 0x48001020 0x00000000 0x0fffff00
mmw 0x48001000 0x00002aa0 0x00003ff0 mmw 0x48001000 0x00002aa0 0x00003ff0
@ -129,6 +132,7 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
} }
} }
} else { } else {
# Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0 mmw 0xE0042004 0x00000020 0x000000c0
} }
} }