Commit Graph

23 Commits

Author SHA1 Message Date
pierre Kuo 5e005f4129 target/arm_disassembler: add exception related disassembly
Add ERET/HVC/SMC disassebly decoding flow, below is testing result

> mdw 0x5c 4
0x0000005c: e160006e e1400072 e1600073 ee110f10
> arm disassemble 0x5c 4
0x0000005c	0xe160006e	ERET
0x00000060	0xe1400072	HVC 0x0002
0x00000064	0xe1600073	SMC 0x0003
0x00000068	0xee110f10	MRC p15, 0x00, r0, c1, c0, 0x00
>

Change-Id: I1beccff885b5b37747edd0b2e9fb2297ce466a00
Signed-off-by: pierre Kuo <vichy.kuo@gmail.com>
Reviewed-on: http://openocd.zylin.com/2548
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-03-09 06:35:21 +00:00
Spencer Oliver 08d4411b59 update files to correct FSF address
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1426
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05 19:52:42 +00:00
Spencer Oliver 7bfcc10839 build: add helper/types.h to config.h
this header is used in numerous files and adding to config.h
simplifies its use globally.

Change-Id: Id724a9950b90504721233022c7fb5768e9bc5548
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/649
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2012-05-21 16:15:26 +00:00
Spencer Oliver 374127301e build: cleanup src/target directory
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/430
Tested-by: jenkins
2012-02-06 11:00:36 +00:00
Zachary T Welch df0e90ec8c change #include "types.h" to <helper/types.h>
Changes from the flat namespace to heirarchical one.  Instead of writing:

	#include "types.h"

the following form should be used.

	#include <helper/types.h>

The exception is from .c files in the same directory.
2009-12-03 04:22:52 -08:00
Zachary T Welch 0f1163e823 target_t -> struct target
Remove misleading typedef and redundant suffix from struct target.
2009-11-13 11:58:14 -08:00
Zachary T Welch 55edfdf2ab arm_instruction_t -> struct arm_instruction
Remove misleading typedef and redundant suffix from struct arm_instruction.
2009-11-13 11:58:12 -08:00
Zachary T Welch c25e00b528 arm_load_store_multiple_instr_t -> struct arm_load_store_multiple_instr
Remove misleading typedef and redundant suffix from struct arm_load_store_multiple_instr.
2009-11-13 11:58:10 -08:00
Zachary T Welch 7de3c44320 arm_load_store_instr_t -> struct arm_load_store_instr
Remove misleading typedef and redundant suffix from struct arm_load_store_instr.
2009-11-13 11:58:10 -08:00
Zachary T Welch f9e091a2d3 arm_data_proc_instr_t -> struct arm_data_proc_instr
Remove misleading typedef and redundant suffix from struct arm_data_proc_instr.
2009-11-13 11:58:10 -08:00
Zachary T Welch 67f2f83937 arm_b_bl_bx_blx_instr_t -> struct arm_b_bl_bx_blx_instr
Remove misleading typedef and redundant suffix from struct arm_b_bl_bx_blx_instr.
2009-11-13 11:58:09 -08:00
Zachary T Welch 3885ab5a5a src/target: remove 'extern' and wrap headers
Remove extern keywords from function prototypes and wrap long lines.
2009-11-09 09:44:33 -08:00
zwelch 309870e414 David Brownell <david-b@pacbell.net>:
Initial support for disassembling Thumb2 code.  This works only for
Cortex-M3 cores so far.  Eventually other cores will also need Thumb2
support ... but they don't yet support any kind of disassembly.

 - Update the 16-bit Thumb decoder:
 
     * Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added
       by ARMv6.  (It already seems to treat CPY as MOV.)

     * Understand CB, CBNZ, WFI, IT, and other opcodes added by
       in Thumb2.

 - A new Thumb2 instruction decode routine is provided.
 
     * This has a different signature:  pass the target, not the
       instruction, so it can fetch a second halfword when needed.  
       The instruction size is likewise returned to the caller.

     * 32-bit instructions are recognized but not yet decoded.
   
 - Start using the current "UAL" syntax in some cases.  "SWI" is
   renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM".

 - Define a new "cortex_m3 disassemble addr count" command to give
   access to this disassembly.

Sanity checked against "objdump -d" output; a bunch of the new
instructions checked out fine.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-15 23:39:37 +00:00
zwelch 2e77919853 Remove whitespace at end of lines, step 1.
- Replace '\s*$' with ''.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23 22:49:23 +00:00
zwelch 0e2c2fe1d1 - Fixes '>>' whitespace
- Replace ')\(>>\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(>>\)(' with '\1 \2 ('.
- Replace '\(\w\)\(>>\)\(\w\)' with '\1 \2 \3'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2369 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23 22:40:42 +00:00
zwelch db7e77237c Transform 'u32' to 'uint32_t' in src/target/arm*
- Replace '\([^_]\)u32' with '\1uint32_t'.
- Replace '^u32' with 'uint32_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18 07:08:52 +00:00
zwelch f876d5e9c7 Transform 'u16' to 'uint16_t'
- Replace '\([^_]\)u16' with '\1uint16_t'.
- Replace '^u16' with 'uint16_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18 07:07:59 +00:00
zwelch 86173cdbdd Transform 'u8' to 'uint8_t' in src/target
- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18 07:04:08 +00:00
drath 53d1f9b2ca - added manpage for OpenOCD (thanks to Uwe Hermann)
- fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry
- added support for auto image type detection (thanks to Vincent Palatin)
- further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental)



git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-06-14 09:47:00 +00:00
drath 237e894805 - split fileio handling into fileio part and image handling
- reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported)
- added XScale debug handler binary to repository
- added Thumb disassembling (thanks to Vincent Palatin for this patch)
- added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported)
This checkin is experimental, not suitable for general use


git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-05-29 11:23:42 +00:00
drath 4a5f45e87d - merged XScale branch back into trunk
- fixed some compiler warnigns in amt_jtagaccel.c, bitbang.c, parport.c
- free working area and register stuff if str7x block write algorithm failed
- check PC after exiting a target algorithm in armv4_5.c


git-svn-id: svn://svn.berlios.de/openocd/trunk@135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2007-03-28 16:31:55 +00:00
drath 1f76f69999 - keep additional information for decoded instructions
git-svn-id: svn://svn.berlios.de/openocd/trunk@69 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-06-16 16:19:08 +00:00
drath b9628accd6 - the 'help' command now takes an optional argument to display help only on a certain command (thanks to Andrew Dyer for this enhancement)
- OpenOCD now includes the ability to diassemble instructions on its own (only ARM for now, Thumb might follow). 
The command is "armv4_5 disassemble <address> <count> ['thumb']" (thumb is currently unsupported).
I've compared the produced disassembly against GDB/GNU Objdump output, and it seems to be correct, but there may still be some bugs left.


git-svn-id: svn://svn.berlios.de/openocd/trunk@68 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2006-06-12 16:49:49 +00:00