Commit Graph

12 Commits

Author SHA1 Message Date
Matthias Welwarsky 5bee7f5b2c cortex_a: add 'dacrfixup' to cortex-a command group
work around issues with software breakpoints when the text segment
is mapped read-only by the OS. Set DACR to "all-manager" to bypass
TLB permission checks on memory access.

Change-Id: I79fd9b32b04a4d538d489896470ee30b26b72b30
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3107
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-12-29 21:43:45 +00:00
Andreas Fritiofson dc574aa1da target/arm: Remove usage of struct arm_jtag in ARMv7 targets
The Cortex-A and Cortex-M keeps an arm_jtag struct around just to be
able to pass a pointer to it to one common JTAG function which anyway
only uses the TAP field.

Refactor the function to take a TAP directly, remove the legacy struct
from cortex instances and store the TAP pointer only in the DAP.

Cortex-M makes a call to arm_jtag_setup_connection() with the struct
but the function does nothing useful for a Cortex-M target so remove
the call.

Change-Id: I3b33709ef55372ef14522ed4337e9f2e817ae3ab
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2015-12-29 20:27:01 +00:00
Evan Hunter 987201c6dc Cortex A/R : Allow interrupt disable during single-step
Example usage:
	cortex_a maskisr on
	cortex_a maskisr off
	cortex_r maskisr on
	cortex_r maskisr off

Change-Id: I799288d9b848a06f561ba29ec1eb8e5eeace5685
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2876
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-07 20:36:13 +00:00
Olivier Schonken 6e32887f91 cortex_a: Add Cortex-A5 identification
Add Cortex-A5 identification to ROM-table display, and also
to cortex_a_init_debug_access. This change is mostly cosmetic.

Change-Id: I7b1dd8755d70d45eb5f315aa1918d44a813b3cdf
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/2483
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11 16:17:58 +00:00
Alexander Stein 1567caea2c cortex_a: Add support for A7 MPCore
A7 MPCore needs unlocking the debug registers same as with A15 MPCore.
Found out by hacking on the code.

Change-Id: I613cb4fb35007b85b4a9a401577b47768bc1a08b
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-on: http://openocd.zylin.com/2344
Tested-by: jenkins
Reviewed-by: Kamal Dasu <kamal.dasu@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10 00:57:09 +00:00
Kamal Dasu e519099ab7 cortex_a: Add support for A15 MPCore
Added Cortex-A15 support for DAP AHB-AP init code as per ADI V5 spec.
Also added changes to make the APB MEM-AP to work with A15.
Made the the cortex_a target code  generic to work with A8, A9
and A15 single core or multicore implementation. Added armv7a code
for os_border calculation to work for known A8, A9 and A15
platforms based on the ARM DDI 0344H, ARM DDI 0407F, ARM DDI 0406C
ARMV7A architecture docs.

Change-Id: Ib2803ab62588bf40f1ae4b9192b619af31525a1a
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1601
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10 00:56:45 +00:00
Kamal Dasu 59c2239bfd cortex_a: target implementation renames cortex_a8 to cortex_a
A previous commit changes the target name used by tcl scripts.
commit d9ba56c295
target: rename cortex_a8 to cortex_a

The current change renames target functions and definitions in the
implementation from cortex_a8 to cortex_a.
This prepares the implementation to support Cortex-A8, A9, A15-MPCore
in one place.

Change-Id: I73b5a38a92c12ba5bd3b806fbbb664817575a6d7
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1599
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-07-03 21:45:04 +00:00
Spencer Oliver 08d4411b59 update files to correct FSF address
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1426
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05 19:52:42 +00:00
Spencer Oliver 374127301e build: cleanup src/target directory
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/430
Tested-by: jenkins
2012-02-06 11:00:36 +00:00
Spencer Oliver 3a550e5b5f cleanup: rename armv4_5 to arm for readability
Nothing more than a name change, just to make reading
the code a bit simpler.

Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/390
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-23 11:38:26 +00:00
Michel Jaouen 00ded4eb01 armv7a ,cortex a : add L1, L2 cache support, va to pa support 2011-09-30 09:45:26 +02:00
Øyvind Harboe dec80e1cff cortex_a: rename cortex_a8.c/h to cortex_a.c/h
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 11:29:10 +01:00