This is still limited to pre-Snowflake parts and the first 64K of
flash.
Change-Id: I9ca872ada3d1a87dba6261464b2a72a15eda5ecf
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2264
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
TI's ICDI adapter supports some additional commands which a user might
want to run for debugging or other purposes, the most useful of them
being "debug unlock" that fully mass-erases the device and unprotects
the flash.
Change-Id: I26990e736094367f92106fa891e9bb8fb0382efb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2263
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to my inspection of an Olimex ARM-USB-OCD-H adapter ACBUS0
is connected directly to an SN74LVC2T45 buffer input B2, and the
corresponding output A2 is connected directly to the JTAG
connector. It seems the information in the Olimex flyer is incorrect
for the -H version and TRST can't be tri-stated, ACBUS2 is unused.
The older ARM-USB-OCD device has SN74AC244 for an output buffer and
ACBUS2 controls its !2OE, ACBUS0 connected to 2A1 (2Y1 is nTRST), in
accordance with the information flyer.
Change-Id: I22828b7b959b6f62c3f51367feb8fab9705641e5
Reported-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2286
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tim Sander <tim@krieglstein.org>
Change 2288 fixed the extraneous reset caused by set_configuration that
crashed the LPC Link-2 running JLink firmware and works on windows platforms.
On Linux however, conditional code was still calling USB reset and caused
the adapter to crash on any non-windows platforms.
Change-Id: Ibf2a02d0dcdd91ccb71d86231cd8311dcadfee1e
Signed-off-by: anders@openpuma.org
Reviewed-on: http://openocd.zylin.com/2297
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to [1], we shouldn't reselect an already active configuration to avoid needless device reset. This is known to cause issues with e.g. LPC Link2 with JLink firmware.
[1] http://libusb.sourceforge.net/api-1.0/caveats.html#configsel
Change-Id: I3568ada77780a521548c450090db7173f8d0b2dd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Anders Oleson <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2288
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There were two problems with the _protect() feature:
1. The address written was off by a factor of two because the address
register takes 16-bit rather than 8-bit addresses. As a result the
wrong sectors were (un)protected with the protect command. This has
been fixed.
2. The protection settings issued via the lock or unlock region commands
don't persist after reset. Making them persist requires modifying the
LOCK bits in the User Row using the infrastructure described below.
The Atmel SAMD2x MCUs provide a User Row (the size of which is one
page). This contains a few settings that users may wish to modify from
the debugger, especially during production. This change adds commands
to inspect and set:
- EEPROM size, the size in bytes of the emulated EEPROM region of the
Flash.
- Bootloader size, the size in bytes of the protected "boot" section of
the Flash.
This is done by a careful read-modify-write of the special User Row
page, avoiding erasing when possible and disallowing the changing of
documented reserved bits. The Atmel SAMD20 datasheet was used for bit
positions and descriptions, size tables, etc. and testing was done on a
SAMD20 Xplained Pro board.
It's technically possible to store arbitrary user data (ex: serial
numbers, MAC addresses, etc) in the remaining portion of the User Row
page (that is, beyond the first 64 bits of it). The infrastructure used
by the eeprom and bootloader commands can be used to access this as
well, and this seems safer than exposing the User Row as a normal Flash
sector that openocd understands due to the delicate nature of some of
the data stored there.
Change-Id: I29ca1bdbdc7884bc0ba0ad18af1b6bab78c7ad38
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2326
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reference code for the SAMD2x disables caching in the NVM controller when
issuing NVM commands. Let's do this as well to be consistent and safer.
Add a "chip-erase" for the Atmel SAMD targets that issues a complete Chip Erase
via the Device Service Unit (DSU). This can be used to "unlock" or otherwise
unbrick a chip that can't be halted or inspected, allowing the user to reflash
with new firmware.
Add a "set-security" command which issues an SSB. Once that's done and the
device is power-cycled, the flash cannot be written to until a "chip-erase" is
issued. The chip-erase cannot be issued by openocd at this time because
the device will not respond to a request for the DAP IDCODE.
Change-Id: I80122f0bbf7e3aedffe052c1e77d69dc2dba25ed
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2239
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When looking for a debug base address of a core, one should search
through all the ROM tables, not just the top-level one.
This code also assumes that the first found entry (in a depth-first
search) will correspond to core 0, the second to core 1 etc.
The patch is supposed to be an alternative implementation of
http://openocd.zylin.com/#/c/1313/.
Change-Id: Ifc88971a02fe3d9c00d9bf72a822ade5804d4e09
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1920
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since 6733253219 jlink adapter driver
supports SWD in addition to JTAG.
Change-Id: I9376aa02d9281f3e2734d8f127cd42162633d95b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2324
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This allows GDB to automatically switch to the thread that has
been interrupted and show you where it has stopped.
Change-Id: Icb9500dc42a61eb977e9fac55ce9503c9926bf5d
Signed-off-by: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/2303
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Versaloon firmware has been updated for reporting
errors if fail on swd transactions.
Change-Id: I49ac0ad034cc9ad83cc4e43953579811d1243063
Signed-off-by: Simon Qian <openocd@versaloon.com>
Reviewed-on: http://openocd.zylin.com/2302
Reviewed-by: Fatih Aşıcı <fatih.asici@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If the user executes a command with an invalid subcommand, the error
message is extremely unhelpful:
> flash write test.elf
flash write test.elf: command requires more arguments
This is because any command line that starts with a valid command group is
classified as a group, triggering ocd_bouncer to print the confusing
message.
Fix by requiring that to be a command group, the command line must not
contain any unknown tokens after the last valid (sub-)command group. That
is OK because command groups don't have handlers defined and thus can't
take any parameters.
Also fix the error message for "unknown" type to be similar to the error
message that is printed (by Jim) for non-existent primary commands.
Change-Id: I26950349f0909fd3961c4f9ab9b198c221cea9fc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2285
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove this underutilized feature. Despite the fact that a lot of configs
specifies a arbitrary "variant", only the xscale target actually defines
any.
In the case of xscale, the use of -variant is dubious since
1) it's used as a redundant irlen specifier,
2) it carries a comment that it doesn't really need it and
3) only two xscale configs even specify it.
If there's a future target that needs a variant set, a target specific
option could be added when needed.
Change-Id: I1ba25a946f0d80872cbd96ddcc48f92695c4ae20
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2283
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added calls to libusb_error_name() where applicable in order to easier
understand the error messages.
Change-Id: I3fe3d4b5624ae0de37c36e54a371eba5535ccaa1
Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
Reviewed-on: http://openocd.zylin.com/2289
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Previous to this version the code of handle_flash_probe_command would
probe a bank twice: first time by auto-probe through a call to
flash_command_get_bank and second time by calling the probe function
directly. This change adds a flash_command_get_bank_maybe_probe wich
is a more generic version of the flash_command_get_bank, that would
allow commands to decide whether auto-probing should be performed or
not.
Change-Id: If150ca9c169ffe05e8c7eba36338d333360811e3
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2093
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code treats registers that are shadowed in FIQ mode in a special
way: to read them out the target is first switches to USR mode. But
since USR != ANY the current implementation later skips register read,
and the loop becomes endless in case any !valid ARM_MODE_ANY is
present at the moment arm_dpm_full_context() is called. This was
reported in https://sourceforge.net/p/openocd/tickets/76/. The issue
surfaced because 2efb1f14f6 added two
ARM_MODE_ANY registers ("sp" and "lr") which were not normally read,
so at the time a user was calling "arm reg" they were not valid.
Fix this by changing the mode appropriately while keeping the "mode"
variable state intact so it would later match register's mode.
Compile-tested only.
Change-Id: I01840e8fa20ec392220138a3f1497ac25deb080a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2278
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for QSPI flash controller driver for
Marvell's Wireless Microcontroller platform.
For more information please refer,
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
Following things have been tested on 88MC200 (Winbond W25Q80BV flash chip):
1. Flash sector level erase
2. Flash chip erase
3. Flash write in normal SPI mode
4. Flash fill (write and verify) in normal SPI mode
Change-Id: If4414ae3f77ff170b84e426a35b66c44590c5e06
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Reviewed-on: http://openocd.zylin.com/2280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The hla_serial command allows for a programming device serial number to be
specified in addition to USB VID/PID. This allows for multiple ST-LINK/V2
programmers to be attached to a single machine and operated using openocd.
Change-Id: I350654bf676eb26ba3a90450acfa55d2a5d2d791
Signed-off-by: Austin Phillips <austin_phillips@hotmail.com>
Reviewed-on: http://openocd.zylin.com/2198
Tested-by: jenkins
Reviewed-by: Martin Glunz <mg@wunderkis.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The new FL1-K family is replacing the FL-K family. The data from all
three was based on the datasheet. In addition the 8MB S25FL164K was
tested successfully with OpenOCD on a custom board.
Change-Id: Idafeed86da12a481c0db92cc0de7ba28f50c2252
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
It's possible for us to fail to read the part ID code so make sure that
part_info is initialized to NULL before attempting to do so, otherwise
we could proceed and use it uninitialized and then segfault.
Change-Id: I0a3f3d3947690b66f0981b5046340449521e0b33
Signed-off-by: Jack Peel <jack.peel@synapse.com>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2276
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This combination is known to work properly with 2MHz JTAG clock.
Change-Id: Ie5ec3d3b415efbb13faee7d34e0c7f862b78350c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2266
Tested-by: jenkins
Without this SheevaPlug debugging interface can't be matched.
Change-Id: Ifca149130d03c1aa165ed1123e8540e49485f023
Reported-by: Andreas Schneider <schneider.andi@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2265
Tested-by: jenkins
Since now auto-detection for flash size works nicely, there's no
reason to keep numerous configs around.
Change-Id: If0cbc37985abf17ef7c1f7d0688e76500fac228f
Signed-off-by: Vanya Sergeev <vsergeev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1960
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds config to allow JTAG debugging of an ARM core of a modern
hybrid SoC by Research Centre "Module"
(http://www.module.ru/en/company/). К1879ХБ1Я is targetted at set-top
boxes and other multimedia equipment, the official SDK is Linux-based.
Change-Id: Ib2ae5784d25699f952682e66b025a3f677a76d5d
Signed-off-by: Бурага Александр <dtp-avb@yandex.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2272
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
According to the research by Eldar, TINY-H adapter has nTRST connected
to ACBUS0 directly via a 100 Ohms series resistor. I think it's safe
to assume the older TINY adapter does the same.
See high-res photos at [1].
This patch should fix issues with JTAG for the case when nTRST is
actually connected but is missing from the config.
[1] https://wikidevi.com/wiki/Olimex_ARM-USB-TINY-H
Change-Id: Iaaee7be30536ebb502802d38b82cd9573408f854
Reported-by: Хайруллин Эльдар <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2247
Tested-by: jenkins
Reviewed-by: demokmail <demokmail@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Luckily, TI's website has predictable URLs for the datasheets, so it
was trivial to download all the pdfs corresponding to the currently
available 71 TivaC devices. Then they were processed with pdftotext
and parsed by this script:
BEGIN { capture = -1 }
/^Device Identification 0 \(DID0\)$/ { state = "waitingclass0" }
/^Device Identification 1 \(DID1\)$/ { state = "waitingpartno0" }
/^CLASS$/ { if (state == "waitingclass0") state = "waitingclass"
else if (state == "waitingclass") capture = 4 }
/^PARTNO$/ { if (state == "waitingpartno0") state = "waitingpartno"
else if (state == "waitingpartno") capture = 4 }
(FNR == 3) { family = $2 }
{
if (capture >= 0) {
if (capture == 0) {
if (state == "waitingclass")
class = $0
else if (state == "waitingpartno")
partno = $0
}
capture--
}
}
END { print "{" class ", " partno ", \"" family "\"}," }
Change-Id: I6820c409fe535f08394c203276b5af4406fe8b92
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2262
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This should make current Tiva C parts usable apart from the protection.
Runtime tested on TM4C123GXL (Blizzard) and TM4C1294XL (Snowflake).
Change-Id: Ia64e9d39fbd2b7049578bbfade72435e5203ddf5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2257
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This struct and libusb_get_device_descriptor() method are not present
in libusb-0.1 API, so when libusb-1.0 is unavailable, this code breaks
the build. Fix by using the appropriate struct (which is apparently
filled automatically on device initialisation).
While at it, change return values for consistency with the callers.
Change-Id: I7d85ab9a70401a155a65122397008ae4d81382fe
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2252
Tested-by: jenkins
Reviewed-by: Austin Phillips <austin_phillips@hotmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This is for mx6q TO1.1.
Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2253
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
When SWD mode is not supported by the target adapter, the call should
return an error instead of segfaulting.
Change-Id: I1626097deb93ecfbe78a6e82d812c7a673dbbde5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2256
Tested-by: jenkins
Commit f701c0cb seems to have introduced a regression for non-JTAG
transports as the newly created "tap" (DAP actually) ended up being
disabled, thus resulting in total lack of functionality.
This was exposed by a debug log demonstrating ftdi SWD transport
connection to mdr32f9q2i, the target wasn't examined on init and
couldn't be reset.
Change-Id: If53cbe800d4adc177aa3ac3219860e7fa15b3e49
Reported-by: Хайруллин Эльдар <eldar.khayrullin@mail.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2261
Tested-by: jenkins
Reviewed-by: Angus Gratton <gus@projectgus.com>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This was very helpful when debugging programs during async loading.
Change-Id: Ia2eacc3e105403f70f51b1242b675e2ffe86e8ca
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2203
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds initial support for the STM32L0 family, specifically the ID
code 417 variant. The 'L0 has 128B rather than 256B pages as well as a
different number of pages per sector. It also has several key registers
and register sets in different locations from the STM32L1xx parts.
This change therefore takes the opportunity to reorganize part information into
a const table (it was previously determined by a set of control statements) and
abstracts away some of the low-level details to make them generic for L1 and
L0 parts.
We also include the first bank's size (for dual bank parts) in the new
device information table (and correct that size for the 0x437 variant
which is 256 rather than 192KB).
The 'L0 parts will not use the built-in loader/helper for Flash writing.
Tested on STM32L053 (dicovery board and Nucleo board) and STM32L152
(discovery board).
Change-Id: I57f7a8ab02caee266de71b31ae82a50d85728a0b
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This was somehow missed in the chip ID table and of course that's
exactly the one on my board (as such, tested on hardware).
Change-Id: I212d7c729d979e0357f1d4635f40935e25fe6ff3
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2260
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
