Currently the following memory layout is typically used on RK3588:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ 3.5M, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[ 10M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[11.5M, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
SPL can safely load U-Boot proper + FDT to [10M, 11.5M) with this layout.
However, on ROCK 5A the SPL stacks is overlapping:
[ -X, 16M) - SPL pre-reloc stack (SPL_STACK)
[15.5M, 16M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 16M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 15M, 16M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
Because bind and probe udevice instanses is allocated on the pre-reloc
malloc heap, there is going to be an overlap when reloc malloc heap
reaches close to 512 KiB of usage.
Migrate to use common bss, stack and malloc heap size and addresses to
mitigate these limitations and allow for a larger U-Boot proper size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for new boards defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
With the stack and text base used by U-Boot SPL and proper on RK3399
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.
Currently the following memory layout is typically used on RK3399:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[ -16K, 3M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ -16K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ 4M, +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
[ -X, 64M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 63M, 64M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
SPL can safely load U-Boot proper + FDT to [2M, 4M-16K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.
Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With the stack and text base used by U-Boot SPL and proper on RK3328
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.
Currently the following memory layout is typically used on RK3328:
[ 0, 256K) - SPL binary
[ 256K, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper binary (TEXT_BASE)
[ -X, 3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[ -8K, 3M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[ -X, 4M) - SPL pre-reloc stack (SPL_STACK)
[ -8K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[ 32M, +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
SPL can safely load U-Boot proper + FDT to [2M, 4M-8K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.
Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On Rockchip the typical aarch64 boot steps are as follows:
- BROM load TPL to SRAM
- TPL init full DRAM
- use stack in SRAM at TPL_STACK addr
- use malloc heap on stack, size is TPL_SYS_MALLOC_F_LEN
- TPL jump back to BROM
- BROM load SPL to beginning of DRAM
- SPL init storage devices
- use bss in DRAM at SPL_BSS_START_ADDR, size is SPL_BSS_MAX_SIZE
- use stack in DRAM at SPL_STACK addr (or CUSTOM_SYS_INIT_SP_ADDR)
- use malloc heap on stack, size is SPL_SYS_MALLOC_F_LEN
- SPL load FIT images from storage to DRAM
- use stack in DRAM at SPL_STACK_R_ADDR
- use new malloc heap on stack, size is SPL_STACK_R_MALLOC_SIMPLE_LEN
- SPL jump to TF-A at 0x40000
- (optional) TF-A load OPTEE
- TF-A jump to U-Boot proper at TEXT_BASE
- U-Boot proper init pre-reloc devices
- use stack in DRAM at CUSTOM_SYS_INIT_SP_ADDR
- use malloc heap on stack, size is SYS_MALLOC_F_LEN
- U-Boot proper relocate to end of usable DRAM
- U-Boot proper init devices and complete boot
SPL have access to full DRAM, however, current configuration for text
base, stack addr and malloc heap size used at the different boot steps
are at risk of overlapping, e.g. when U-Boot proper + FDT grows close
to 1 MiB on RK3328/RK3399 or when pre-reloc and reloc stack and malloc
heap overlap on ROCK 5A.
Fix this by defining safe defaults for bss, stack and malloc size and
addresses. A range at around [60 MiB, 64 MiB) was chosen to be used for
bss and stack until U-Boot proper have been relocated to end of usable
DRAM. The range was primarily chosen to be able to accommodate SoCs with
a small amount of embedded DRAM, e.g. RK3308G has 64 MiB DRAM.
Overiew of the new common memory layout:
[ 0, 2M) - SPL / TF-A / reserved
[ 2M, +X) - U-Boot proper pre-reloc
[ -X, 64M) - bss, stack and malloc heap
During SPL pre-reloc phase:
[ 0, 256K) - SPL binary is loaded by BROM to beginning of DRAM
[ -X, 63M) - SPL pre-reloc stack
[ -32K, 63M) - SPL pre-reloc malloc heap
[63.5M, +32K) - SPL bss
After SPL reloc phase:
[ 0, 256K) - SPL binary
[ 256K, +X) - TF-A image is loaded by SPL
[ 2M, +X) - U-Boot proper + FDT image is loaded by SPL
[ -X, 62M) - SPL reloc stack
[ 60M, 62M) - SPL reloc malloc heap
[ -32K, 63M) - SPL init malloc heap, memory allocated during SPL
pre-reloc phase is still in use at reloc phase
[63.5M, +32K) - SPL bss
During U-Boot proper pre-reloc phase:
[ 0, 2M) - TF-A / reserved
[ 2M, +X) - U-Boot proper + FDT
[ -X, 63M) - U-Boot proper pre-reloc stack (shared addr with SPL)
[ -64K, 63M) - U-Boot proper pre-reloc malloc heap
After U-Boot proper has relocated to top of memory we should be able to
use 2M+ for loading kernel, initrd, scripts etc.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pine64 PineTab2 is a tablet computer based on the Rockchip RK3566
SoC. The table features 4/8 GB LPDDR4 RAM and 64/128 GB eMMC storage.
Features tested on a Pine64 PineTab2 8GB v2.0:
- SD-card boot
- eMMC boot
- SPI Flash boot
- USB host
Device tree is imported from linux maintainer branch v6.9-armsoc/dts64,
commit 1b7e19448f8f ("arm64: dts: rockchip: Add devicetree for Pine64
PineTab2").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3588S/RK3588 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3588S/RK3588 boards that follow reference board design.
Also fix the alphabetical order of RK3588 boards listed in Makefile and
documentation.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
TB-RK3588X board is a Rockchip Toybrick RK3588 based development board.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB Memory LPDDR4x
Mali G610MC4 GPU
2× MIPI-CSI0 Connector
1x 2Lanes PCIe3.0 Connector
1x SATA3.0 Connector
32GB eMMC Module
2x USB 2.0, 2x USB 3.0
1x HDMI Output, 1x HDMI Input
2x Ethernet Port
Functions work normally:
[1] USB2.0 Host
[2] Ethernet0 with PHY RTL8211F
More information can be obtained from the following websites:
[1] https://t.rock-chips.com/en/wiki/EN/tb-rk3588x_en/index.html
[2] http://t.rock-chips.com/
Kernel commits:
8ffe365f8dc7 ("arm64: dts: rockchip: Add devicetree support for TB-RK3588X board")
7140387ff49d ("dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X")
Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The USB2PHY regs already contain working default reset values for RK3328
and RK35xx as evidenced by the fact that this driver never has changed a
single value for these SoCs.
Reduce to only configure utmi_suspend_n and utmi_sel bits similar to
what is currently done on RK3399. Also add missing clkout_ctl for RK3588.
When enabled utmi_suspend_n is changed to normal mode and utmi_sel to
use otg/host controller utmi interface to phy. When disabled
utmi_suspend_n is changed to suspend mode and utmi_sel to use GRF utmi
interface to phy.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
On RK3399 the USB2PHY regs are located in the common GRF, remaining SoCs
that is supported by this driver have the USB2PHY regs in a different
GRF.
When support for RK356x, RK3588 and RK3328 was added this driver was
never updated to use correct GRF and have instead incorrectly written
to wrong GRF for these SoCs.
The default reset values for the USB2PHY have made USB mostly working
even when wrong GRF was used, however, following have been observed:
scanning bus usb@fd840000 for devices...
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
unable to get device descriptor (error=-1)
Fix this by using a regmap from rockchip,usbgrf prop and fall back to
getting a regmap for parent udevice instead of always getting the
common GRF.
Also protect against accidental clear of bit 0 in a reg with offset 0,
only bind driver to enabled otg/host-ports and remove unused headers.
Fixes: 3da15f0b49 ("phy: rockchip-inno-usb2: Add USB2 PHY for rk3568")
Fixes: cdf9010f6e ("phy: rockchip-inno-usb2: add initial support for rk3588 PHY")
Fixes: 9aa93d8403 ("phy: rockchip-inno-usb2: Add USB2 PHY for RK3328")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
FIT checksum validation is very slow in SPL due to D-cache not being
enabled.
Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation,
from seconds to milliseconds.
This change enables caches in SPL on all Rockchip ARM64 boards, the
Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to
disable caches for a specific board or SoC if needed.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Cool Pi CM5 EVB works as a mother board connect with CM5.
CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S
CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header
The dts is from linux-6.8 rc1.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
The NanoPi R4S has an RK3399 SoC, which has efuse supported by
ROCKCHIP_EFUSE, not ROCKCHIP_OTP.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The rockchip-efuse driver supports the efuse found on RK3399. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.
Enable the driver and reading cpuid by default for RK3399.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
The rockchip-efuse driver supports the efuse found on RK3328. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.
Enable the driver and reading cpuid by default for RK3328.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Add Kconfig options to enable support for booting from SPI NOR flash on
Orange Pi R1 Plus boards.
The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.
=> sf probe
SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1376768 bytes read in 66 ms (19.9 MiB/s)
=> sf update ${fileaddr} 0 ${filesize}
device 0 offset 0x0, size 0x150200
1126912 bytes written, 249856 bytes skipped in 14.22s, speed 100542 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.
The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.
=> sf probe
SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
=> load mmc 1:1 10000000 u-boot-rockchip-spi.bin
1359872 bytes read in 65 ms (20 MiB/s)
=> sf update ${fileaddr} 0 ${filesize}
device 0 offset 0x0, size 0x14c000
1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as it does for SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This reverts commit 3523c07867.
Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.
This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.
Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:
U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000)
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC2
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.
Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-nanopi-r2* boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add DM_REGULATOR_GPIO=y and SPL_DM_REGULATOR_GPIO=y to support the
regulator-gpio compatible.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-rock-pi-e with new defaults.
Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_MDIO=y to ensure device tree props can be used by PHY driver.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add myself as a reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-roc-cc with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-rock64 with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.
Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Update defconfig for rk3328-evb with new defaults.
Add DM_RESET=y to support using reset signals.
Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.
Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Add SYSINFO=y to support the sysinfo uclass.
Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The original link returns a custom 404, so let's point to a link that
works today instead.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This migrates the plaintext README in
board/theobroma-systems/ringneck_px30 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
This migrates the plaintext README in
board/theobroma-systems/puma_rk3399 to doc/board/theobroma-systems and
while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
There are multiple Device Trees in U-Boot git repo for Puma, so let's
make the MAINTAINERS entry match them all.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Since commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper
bind the device before relocation.
While this is usually not much of an issue, it is when there's a lookup
for devices by code running before the relocation. Such is the case of
env_init() which calls env_driver_lookup() which calls
env_get_location() which is a weak symbol and may call
arch_env_get_location() also a weak symbol. Those are two functions that
may traverse UCLASS to find some devices (e.g.
board/theobroma-systems/common/common.c:arch_env_get_location()).
This allows something in the env_init() call stack to be able to use
uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the
behavior with what seems to be all SoCs except RK356x family.
Additionally, if any other env function (e.g. env_load) were to be used
before relocation, this is also required as otherwise it wouldn't be
able to find the MMC device(s).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.
While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
hardware.h is only defining macros which are "wrappers" around writel().
writel() is however not available in hardware.h, <asm/io.h> needs to be
included. This means in order to use the wrappers in hardware.h, one
also needs to include the <asm/io.h> header.
However, this cannot be done currently because hardware.h is included in
include/configs files, which are implicitly included by every code file
by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
fail because ALIGN (the ARM assembly directive) got redefined by some
of the include files coming from <asm.io.h>.
Because nothing in the include/configs file actually use hardware.h,
let's remove the inclusion of hardware.h from the include/configs files
and explicitly add it wherever it is required.
This prepares for the next commit where <asm/io.h> will be included in
hardware.h.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
It's one thing to have the register mapped via a well-defined struct but
it's another to be able to make use of it. For that to happen, one needs
to cast the physical address memory of the beginning of the register
address space with the struct. Since this cannot change, let's hardcode
it in the include files so that users do not need to duplicate this line
of code in their own implementation.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Rockchip SoCs can automatically switch between jtag and sdmmc based on
the following rules:
- all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF,
- force_jtag bit in GRF is 1,
- SDMMC_DET is low (no card detected),
Note that the BootROM may mux all SDMMC pins in their SDMMC function or
not, depending on the boot medium that were tried.
Because SDMMC_DET pin is not guaranteed to be used as an SD card card
detect pin, it could be low at boot or even switch at runtime, which
would enable the jtag function and render the SD card unusable.
This is the case for RK3588 Jaguar for example which has an SD card
connector without an SD card card detect signal and has SDMMC_DET
connected to ground.
Because enabling JTAG at runtime could be a security issue and also to
make sure that we have a consistent behavior on all boards by default,
let's disable this force_jtag feature.
However, let's make it easy to reenable it for debugging purposes by
hiding it behind a Kconfig symbol.
Note that soc_con[0] is reserved. But considering that it's way more
user-friendly to access soc_con1 from the TRM with soc_con[1] than
soc_con[0], and that soc_con0 would actually be located at 4 bytes
before soc_con1, let's just make soc_con0 part of the soc_con array.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There's only one user of rockchip_capsule_update_board_setup, which is
in board.c, and only one board defines it, so instead of having a header
only for one function symbol, let's just use a weak symbol instead.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The functions aren't used anywhere else than in board.c, therefore,
let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from
the misc.h header file.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
