2022-06-25 16:19:46 +00:00
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# SPDX-License-Identifier: GPL-2.0-or-later
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2016-11-06 19:19:26 +00:00
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noinst_LTLIBRARIES += %D%/libocdflashnor.la
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%C%_libocdflashnor_la_SOURCES = \
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%D%/core.c \
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%D%/tcl.c \
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2009-12-04 12:10:42 +00:00
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$(NOR_DRIVERS) \
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2016-11-06 19:19:26 +00:00
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%D%/drivers.c \
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$(NORHEADERS)
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2009-12-04 00:47:49 +00:00
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NOR_DRIVERS = \
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2016-11-06 19:19:26 +00:00
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%D%/aduc702x.c \
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%D%/aducm360.c \
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%D%/ambiqmicro.c \
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%D%/at91sam4.c \
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%D%/at91sam4l.c \
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%D%/at91samd.c \
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%D%/at91sam3.c \
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%D%/at91sam7.c \
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2016-08-01 13:57:20 +00:00
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%D%/ath79.c \
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2016-11-06 19:19:26 +00:00
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%D%/atsamv.c \
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2017-10-27 19:43:25 +00:00
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%D%/atsame5.c \
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2016-11-06 19:19:26 +00:00
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%D%/avrf.c \
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2017-09-12 06:51:29 +00:00
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%D%/bluenrg-x.c \
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2017-12-28 23:38:21 +00:00
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%D%/cc3220sf.c \
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2018-01-19 02:48:11 +00:00
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%D%/cc26xx.c \
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2016-11-06 19:19:26 +00:00
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%D%/cfi.c \
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%D%/dsp5680xx_flash.c \
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%D%/efm32.c \
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%D%/em357.c \
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2018-08-29 00:18:01 +00:00
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%D%/esirisc_flash.c \
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2016-11-06 19:19:26 +00:00
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%D%/faux.c \
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2019-01-01 20:37:34 +00:00
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%D%/fespi.c \
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2016-11-06 19:19:26 +00:00
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%D%/fm3.c \
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%D%/fm4.c \
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%D%/jtagspi.c \
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%D%/kinetis.c \
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%D%/kinetis_ke.c \
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%D%/lpc2000.c \
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%D%/lpc288x.c \
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%D%/lpc2900.c \
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%D%/lpcspifi.c \
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2016-07-14 18:00:23 +00:00
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%D%/max32xxx.c \
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2016-11-06 19:19:26 +00:00
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%D%/mdr.c \
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2017-06-03 02:20:26 +00:00
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%D%/msp432.c \
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2016-11-06 19:19:26 +00:00
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%D%/mrvlqspi.c \
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%D%/niietcm4.c \
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%D%/non_cfi.c \
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2020-11-26 02:25:09 +00:00
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%D%/npcx.c \
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2017-08-31 19:09:42 +00:00
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%D%/nrf5.c \
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2016-11-06 19:19:26 +00:00
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%D%/numicro.c \
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%D%/ocl.c \
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%D%/pic32mx.c \
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%D%/psoc4.c \
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2016-04-30 13:10:05 +00:00
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%D%/psoc5lp.c \
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2017-09-25 11:25:22 +00:00
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%D%/psoc6.c \
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2019-04-13 20:44:45 +00:00
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%D%/renesas_rpchf.c \
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2021-03-02 21:21:28 +00:00
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%D%/rp2040.c \
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Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
(tested only in single/quad mode as most devices either don't
support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
(superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
and single 8-line modes, (not in hyper flash mode)
Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.
Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2016-12-21 09:35:58 +00:00
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%D%/sfdp.c \
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2019-04-02 14:44:18 +00:00
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%D%/sh_qspi.c \
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2016-11-06 19:19:26 +00:00
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%D%/sim3x.c \
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%D%/spi.c \
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%D%/stmsmi.c \
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Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
(tested only in single/quad mode as most devices either don't
support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
(superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
and single 8-line modes, (not in hyper flash mode)
Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.
Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2016-12-21 09:35:58 +00:00
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%D%/stmqspi.c \
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2016-11-06 19:19:26 +00:00
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%D%/stellaris.c \
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%D%/stm32f1x.c \
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%D%/stm32f2x.c \
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%D%/stm32lx.c \
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%D%/stm32l4x.c \
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2017-11-13 13:05:28 +00:00
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%D%/stm32h7x.c \
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2016-11-06 19:19:26 +00:00
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%D%/str7x.c \
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%D%/str9x.c \
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%D%/str9xpec.c \
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2019-08-19 22:45:27 +00:00
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%D%/swm050.c \
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2016-11-06 19:19:26 +00:00
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%D%/tms470.c \
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%D%/virtual.c \
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2018-12-09 16:58:41 +00:00
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%D%/w600.c \
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2016-12-11 12:11:41 +00:00
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%D%/xcf.c \
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2016-11-06 19:19:26 +00:00
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%D%/xmc1xxx.c \
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%D%/xmc4xxx.c
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2009-12-02 23:54:15 +00:00
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2016-11-06 19:19:26 +00:00
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NORHEADERS = \
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%D%/core.h \
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2017-12-28 23:38:21 +00:00
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%D%/cc3220sf.h \
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2020-01-08 09:15:40 +00:00
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%D%/bluenrg-x.h \
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2018-01-19 02:48:11 +00:00
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%D%/cc26xx.h \
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2016-11-06 19:19:26 +00:00
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%D%/cfi.h \
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%D%/driver.h \
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%D%/imp.h \
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%D%/non_cfi.h \
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%D%/ocl.h \
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Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
(tested only in single/quad mode as most devices either don't
support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
(superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
and single 8-line modes, (not in hyper flash mode)
Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.
Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2016-12-21 09:35:58 +00:00
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%D%/sfdp.h \
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2017-06-03 02:20:26 +00:00
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%D%/spi.h \
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2018-12-16 16:30:41 +00:00
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%D%/stm32l4x.h \
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Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
(tested only in single/quad mode as most devices either don't
support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
(superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
and single 8-line modes, (not in hyper flash mode)
Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.
Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2016-12-21 09:35:58 +00:00
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%D%/stmqspi.h \
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2017-06-03 02:20:26 +00:00
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%D%/msp432.h
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