Commit Graph

1891 Commits

Author SHA1 Message Date
Marc Schink
1c22c5a82b flash/nor/efm32: Use Cortex-M 'core_info' field
Change-Id: I5e477036e5cb7518c35df88878d53261311deb40
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6868
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:45:56 +00:00
Marc Schink
b6e4d1aa04 flash/nor/sim3x: Fix typo
Change-Id: I2143c81d44b49bed9585c4aaee2bb6e2165345f2
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6869
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-03-12 09:45:15 +00:00
Tarek BOCHKATI
6673f90e08 flash/stm32h7x: fix FLASH_WPSN_PRG mask used for protection
STM32H7Ax/7Bx devices have a different WPSN mask (0xFFFFFFFF),
(0xFF for STM32H74x/75x and STM32H72x/73x devices).

And when supporting STM32H7Ax/7Bx devices, stm32x_protect() was
not updated accordingly.

Change-Id: I081217af3e5ed815b67bfdfec7f4ebaa3152a865
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: 0b7eca1769 (flash/stm32h7x: add support of STM32H7Ax/H7Bx devices)
Reviewed-on: https://review.openocd.org/c/openocd/+/6858
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2022-03-12 09:44:31 +00:00
Tomas Vanek
57c1e49180 flash/stm32f1x,f2x: fix endianess in slow fallback flash write
Use target_write_memory() instead of target_write_u16()

Change-Id: I2389fe7a5fa18c9bc9c1aad8b8ddd64608bf2566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6705
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:32:09 +00:00
Tarek BOCHKATI
8b740af10d flash/stm32l4x: fix maybe-uninitialized compiler error
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function

fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-01 08:36:52 +00:00
Tomas Vanek
13cd75b6ec flash/nor/stm32xx: fix segfault accessing Cortex-M part number
Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]

Use the new and safe helper to get Cortex-M part number.

While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.

Add missing checks for target_was_examined() to flash probes.

[1] 6545: fix crash in case cortex_m->core_info is not set
    https://review.openocd.org/c/openocd/+/6545

Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 20:28:02 +00:00
Simon Johansson
29912328f0 flash/nor/stm32f2x: Fix erase of bank 2 sectors
This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.

On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.

Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 10:58:41 +00:00
Hans-Erik Floryd
efb0b116da flash/nor/atsame5: add LAN9255 devices
Support Microchip LAN9255 devices with embedded SAME53J MCU.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-29 18:18:53 +00:00
Doug Brunner
aad8718058 flash/nor/efr32: fixed lockbits and user data
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys.

As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation.

There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv.

To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address.

There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect().

This addresses ticket #185.

Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev.
No new Clang analyzer warnings, no new sanitizer warnings.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b
Reviewed-on: https://review.openocd.org/c/openocd/+/6665
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-05 17:57:08 +00:00
Jaehoon Park
fdf17dba56 flash/nor/spi: add micron MT25QU01G
1Gbit SPI flash on VCU118 Rev. 2.0

Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9
Reviewed-on: https://review.openocd.org/c/openocd/+/6764
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-12-11 17:49:46 +00:00
Tomas Vanek
f735faa931 target,flash: allow target_free_working_area on NULL area pointer
Standard C library free() allows NULL pointer as a parameter.

Change target_free_working_area() to conform this convention.

Remove NULL pointer tests before target_free_working_area() calls.

While on it add missing setting pointer to NULL after target_free_working_area().

Change-Id: I7c692ab04a9933398ba5bc614723ad0bdecb87b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6712
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:59:20 +00:00
Tim Newsome
35f284fe7c flash/nor/fespi: algorithm, large address, errors
* Move more smarts into the target algorithm code, and rewrite that in C
  so it's easier to understand/maintain.
* Support >24-bit addresses.
* Check for errors.

Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6679
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-03 21:58:55 +00:00
Tomas Vanek
21d11f13ec flash/nor/at91samd: remove 'at91samd info' command
The command is a stub only, does nothing.

Change-Id: Ib3b8c2122a9f6f2e179bee34ac56d0adf367bfcc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:53:36 +00:00
Tomas Vanek
abd94b8325 flash/nor/kinetis_ke: remove 'kinetis mdm test_securing' cmd
The command might be a leftover from development of the driver.
There is no documentation what it does.

Change-Id: Iaa5aa1ac51638bd6acce172a5dd03846a165dc27
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6728
Tested-by: jenkins
Reviewed-by: Ivan-Artekit <ivan@artekit.eu>
2021-12-03 21:53:07 +00:00
Tomas Vanek
55da5b47cb flash/nor/kinetis_ke: add .help fields for tcl commands
Add help texts from similar driver kinetis.c

While on it fix one existing help: the flash is obviously not NAND

Change-Id: Ibd295105586b008aaabf2fb4e4a75bf551266e38
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6727
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03 21:52:49 +00:00
Doug Brunner
1ad6ed38b6 flash/nor/efm32: fixed BG1x identification
The EFM32 flash driver misidentifies the EFR32BG1B on my board as EFR32MG1B.
Looks like this was caused by a copy-paste error, fixed.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: I3067f7ba132c2562487da8c2371f63a4843230c1
Reviewed-on: https://review.openocd.org/c/openocd/+/6666
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-29 09:50:17 +00:00
Antonio Borneo
cbfd0b9aad flash/psoc6: initialize usage field
The missing initialization triggers a run-time error message:
	Error: BUG: command 'psoc6 reset_halt' does not have the '.usage'
		field filled out

Change-Id: I975e4ba99bd939aa924a9d62b1ab76b2ab5bf193
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6720
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:04:55 +00:00
Antonio Borneo
facbb481b8 flash/rp2040: don't initialize to NULL fields in struct
When a struct is initialized, missing fields are already filled
with zero or NULL.
This change simplifies scripts to compare documentation and
registered commands.

Change-Id: I96fbdfa98bbb1f2b5e2a9532faf5a15cb5bc28dd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6719
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:04:42 +00:00
Antonio Borneo
b46cb18c91 openocd: use unique name for struct command_registration
Just to avoid name clash when comparing documentation with
registered commands through scripts.

Change-Id: I8832545d8d9236ea5dabe6e73732f51e5246caff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6717
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-23 11:04:02 +00:00
Antonio Borneo
b5d1b719e5 openocd: use single line for register_commands*()
Do not split in multiple lines the calls to register_commands*().
No change in code behaviour, just make it easy to grep in the code
and identify the commands that can be registered.
This would help detecting undocumented commands.

Change-Id: Id654e107cdabf7ee31fc3d227c1d2a59acc5669e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6716
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23 11:03:38 +00:00
Janco Kock
aa8a79809e flash/nor/at91samd: Add SAMR35J18B support
Add support for the mcu SAMR35J18B

Signed-off-by: Janco <janco@factorylab.nl>
Change-Id: I45d801485ad1c16d1b3086516a2b6d71d13f3fc7
Reviewed-on: https://review.openocd.org/c/openocd/+/6664
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-18 02:17:41 +00:00
asier70
5a0b4889d0 flash/nor/stm32f1x: Add support for GD32E23x
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.

Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com>
Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8
Reviewed-on: https://review.openocd.org/c/openocd/+/6527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-15 15:35:50 +00:00
Antonio Borneo
a498a3deaa jtagspi: fix build on MacOS
Commit be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte
addresses") introduces two incorrect format string for uint32_t
data types.
This cause build failure on MacOS:

src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_DEBUG("status=0x%02" PRIx8, *status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~

src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~

Fix the format string.

Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte addresses")
Reviewed-on: https://review.openocd.org/c/openocd/+/6701
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-13 22:36:03 +00:00
Tarek BOCHKATI
9d574aa3fa flash/stm32h7x: don't read flash size using the H74/H75x CPU2
CPU2 (Cortex-M4) cannot read flash size register.
assume the maximum flash size without triggering an error message

Change-Id: I5c3328b7cc42e3aa57165075021227d7936f3d26
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6670
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-13 10:53:26 +00:00
Tarek BOCHKATI
50f977b058 flash/stm32h7x: avoid using magic numbers for device ids
Change-Id: I4d682ee828404974abd9a42f98b840d77835cfe0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6669
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-11-13 10:53:01 +00:00
Andreas Bolsch
be57b0ab84 Update jtagspi driver for 1-, 2- and 4-byte addresses
jtagspi driver always used 3-byte addresses regardless of actual
device capcity. Now select 1- to 4-byte addresses depending on
device capacity.
Some devices need a special command to activate the 4-byte address
mode, a special command to accomplish this, and a further command
for setting device properties are added.
Additionally, restriction (start of range had to be page aligned)
removed.
Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address
modes.

Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4876
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2021-11-12 20:31:46 +00:00
Jimmy
7901cf2124 flash/nor/stm32lx: fixed writes at high adapter speeds
The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.

The status polls are done on the target for efficiency,
since the half-pages are very small.

Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598
Tested-by: jenkins
Reviewed-by: Jelle De Vleeschouwer
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2021-11-03 20:32:54 +00:00
Antonio Borneo
8a522d96c7 flash/nor/psoc6: fix doxygen comment
Commit 64c2e03b23 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.

Fix the doxygen comment.

Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-10-25 16:10:40 +00:00
Yasushi SHOJI
05752557dd helper: Remove src/helper from include dirs
The header files under src/helper/ can currently be included with
either

    #include <bits.h>
    or
    #include <helper/bits.h>

This is because we specify both "src/" and "src/helper/" directories
as include directories.  Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.

This commit remove "src/helper/" from our include dir and make C files
include explicitly.

Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-10-02 13:18:15 +00:00
Antonio Borneo
c4e6034e26 armv7m.h: relax dependency from 'arm_adi_v5.h'
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.

Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.

Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.

Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 12:59:12 +00:00
Oleksij Rempel
a0bd3c9924 Partially Revert "flash/stm32l4x: introduce flash programming without loader"
This partially reverts commit 1247eee4e6.

There is no reasonable use cases where work-area should be enabled
and working, and it can't be used for the flash loader.

Instead of introducing driver specific property, users can disable
flash load by disabling work-area, for example by setting it to 0.

But still we keep the function stm32l4_write_block_without_loader
to be used when workarea is not available (no sufficient size or zero)

Change-Id: Ibb046c74df354c6067bac978e8ef7efb47d9fd2b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6569
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-09-18 18:15:35 +00:00
Tarek BOCHKATI
a1903f2867 flash/stm32l4x: fix dual bank support for STM32L552xC devices
For STM32L552xC devices with 256K flash:
  dual bank mode is activated if DB256 is set
  page size is 2KB if DBANK is set

For parts with 512K (aka STM32L5x2xE):
  DBANK controls both of dual/single bank mode and page size as well.

Change-Id: I8be668d5552fefe81acffaf2e3e35ef5e938162e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6538
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-18 18:15:15 +00:00
Tarek BOCHKATI
b61a280860 flash/stm32l4x: fix flash programming in 64-bit hosts
stm32l4_work_area struct is shared between the loader and stm32l4x flash driver

'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.

however when used in openocd code, their size depends on the host
  if the host is 32-bit, then the size is 4 bytes each.
  if the host is 64-bit, then the size is 8 bytes each.

to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).

Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556
Tested-by: jenkins
Reviewed-by: Yestin Sun <sunyi0804@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-09-12 14:26:31 +00:00
Tarek BOCHKATI
e63297045b flash/stm32l4x: do not use magic number for dual bank option bits
Change-Id: I27211e7d44b48f65546e31710ec6ae129acb416f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6537
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:06:42 +00:00
Tarek BOCHKATI
5070425d6a flash/stm32l4x: introduce is_max_flash_size and use it
Change-Id: Idb421b9cf737d222baf4dd890032f69dec7a366e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6536
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:05:15 +00:00
Tarek BOCHKATI
cdb6ea4f9f flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.

Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:03:02 +00:00
Tarek BOCHKATI
f24a283ac7 flash/nor/tcl: 'flash list' command: add the flash bank target
add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.

Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:26:10 +00:00
Tarek BOCHKATI
9f733ba2f2 flash/nor/tcl: fix the flash name returned by 'flash list' command
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
 - to fix this by returning the flash name
 - and add a new item 'driver' in the returned list

example:
before the change
> flash list
  {name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}

after the change
> flash list
  {name stm32l5x.flash_ns driver stm32l4x ...}
  {name stm32l5x.flash_alias_s driver stm32l4x ...}
  {name stm32l5x.otp driver stm32l4x ...}

Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:56 +00:00
Tarek BOCHKATI
48f267d4ad flash/stm32l4x: avoid using magic numbers for device ids
Change-Id: I54c41f31c16b91904e8cbca823b90caa3807826d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6437
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:40 +00:00
Tarek BOCHKATI
4f371e8eed flash/stm32l4x: add support of STM32WB1x
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)

note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
      STM32WB1x flash size is not a power of 2

Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:34 +00:00
Tarek BOCHKATI
af3575b931 flash/stm32l4x: add support of STM32G05/G06x
this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5

Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:26 +00:00
Tarek BOCHKATI
4b1492bb8e flash/stm32l4x: switch to to c loader instead of assembly loader
switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.

besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:13 +00:00
Wealian Liao
385eedfc6f flash/nor: add support for Nuvoton NPCX series flash
Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.

Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 06:42:54 +00:00
Tarek BOCHKATI
c281c64469 flash/stm32l4x: free write_algorithm work area if no space left for the buffer
If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.

Fixes: ba131f30a0 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:52:26 +00:00
Tarek BOCHKATI
c2ad18d68b flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:51:52 +00:00
Tarek BOCHKATI
6c1e1a212a flash/stm32l4x: add support of STM32WL5x dual core
according the RM0453, the second core  have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs

the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.

note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)

Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 13:13:02 +00:00
Sebastiaan de Schaetzen
64fbd60787 flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations
When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:45 +00:00
Tarek BOCHKATI
43d31a8fd5 flash/stm32l4x: add support of STM32G0Bx/G0Cx devices
this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5

notes:
 - 128k variant is always single bank
 - 256k variant flash is contiguous (no gap) in dual bank mode
 - BKER is bit 13 vs bit 11 for other devices
   > added cr_bker_mask in stm32l4_flash_bank struct
 - BSY2 for bank 2 operations
   > added sr_bsy_mask in stm32l4_flash_bank struct
   > proposed optimization: always wait for (BSY1 | BSY2) with
     STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)

TODO: update flashloader to use the proper BSY bits
      temporarily don't use the loader in dual bank mode

Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:17 +00:00
Tarek BOCHKATI
e7e46ba61e flash/stm32l4x: remove stm32l4_part_info.default_flash_regs
This struct element is replaced by the usage of F_HAS_L5_FLASH_REGS flag:
since over this driver stm32l4_flash_regs is the default register layout,
and the only exception is STM32L5 family,
so it's simpler to manage it using a flag.

Note: the same flag will be used with STM32U5 devices, as they have
the same registers layout, which explains the move of stm32l5_s_flash_regs
before the switch(device_id) in order to not re-write this for STM32U5.

Change-Id: I3b67a6f558d9350f609a22524012b6fceb7de7c2
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6435
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:37:38 +00:00
Tarek BOCHKATI
1247eee4e6 flash/stm32l4x: introduce flash programming without loader
this capability permits to program the flash if we cannot reserve a workarea.

the introduction the command 'stm32l4x flashloader <bank_id> [enable|disable]'
helps to automatically skip using the flashloader if needed.

Change-Id: Id29213c85ee5c7c487cfee21554f5a7ea50db6c9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6273
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:27:17 +00:00